From 3b68d713f550337ab91f4896ee682adb22c1769b Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Thu, 3 Sep 2020 11:30:28 +0800 Subject: [PATCH] radeonsi: fix user fence space when MCBP is enabled MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When MCBP is enabled, IB maybe preempted which will also update the preempted fence field of the user fence. So we need to reserve enough space for each user fence. Fixes: 89d2dac5548 "radeonsi: enable preemption if the kernel enabled it" Reviewed-by: Marek Olšák Signed-off-by: Qiang Yu Part-of: (cherry picked from commit 3d5bed0e883217242a4357116399f60486580170) --- .pick_status.json | 2 +- src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 8 +++++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 2a1ecf11dd1..a579a83636a 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1714,7 +1714,7 @@ "description": "radeonsi: fix user fence space when MCBP is enabled", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "master_sha": null, "because_sha": "89d2dac55486464832552dfc3349054c29a82922" }, diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index f51c7782033..c531d72ca45 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -1683,8 +1683,14 @@ finalize: /* Success. */ uint64_t *user_fence = NULL; + /* Need to reserve 4 QWORD for user fence: + * QWORD[0]: completed fence + * QWORD[1]: preempted fence + * QWORD[2]: reset fence + * QWORD[3]: preempted then reset + **/ if (has_user_fence) - user_fence = acs->ctx->user_fence_cpu_address_base + acs->ring_type; + user_fence = acs->ctx->user_fence_cpu_address_base + acs->ring_type * 4; amdgpu_fence_submitted(cs->fence, seq_no, user_fence); }