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r600/nir: Fix u64vec2 immediate lowering

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There were a couple of issues here:

 1. We should be using nir_const_value_for_uint instead of setting the
    union fields directly to ensure the rest of the union is zeroed.

 2. It was always filling out the first two components of val even if
    the incoming constant had 2 64-bit components.

Fixes: 165fb5117b ("r600/sfn: add lowering passes to get 64 bit ops lowered to 32 bit vec2")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19689>
(cherry picked from commit f3f1c28f8e)
This commit is contained in:
Jason Ekstrand 2022-11-11 15:02:07 -06:00 • committed by Eric Engestrom
parent af63185bda
commit 3b5c8ec1a9
2 changed files with 5 additions and 5 deletions
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2
.pick_status.json
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@ -4054,7 +4054,7 @@
"description": "r600/nir: Fix u64vec2 immediate lowering",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "165fb5117bf70402e66d34538d4085e060f57fea"
},

8
src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp
View file

@ -929,12 +929,12 @@ Lower64BitToVec2::lower(nir_instr *instr)
}
case nir_instr_type_load_const: {
auto lc = nir_instr_as_load_const(instr);
assert(lc->def.num_components < 3);
nir_const_value val[4] = {{0}};
assert(lc->def.num_components <= 2);
nir_const_value val[4];
for (uint i = 0; i < lc->def.num_components; ++i) {
uint64_t v = lc->value[i].u64;
val[0].u32 = v & 0xffffffff;
val[1].u32 = (v >> 32) & 0xffffffff;
val[i * 2 + 0] = nir_const_value_for_uint(v & 0xffffffff, 32);
val[i * 2 + 1] = nir_const_value_for_uint(v >> 32, 32);
}
return nir_build_imm(b, 2 * lc->def.num_components, 32, val);