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radeonsi: fix sdma copy for gfx10

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The shared sdma code used the "sdma_supports_compression" field from info
but radeonsi code still relied on gfx level checks.

Fixes: f5ecc5ffd5 ("ac,radv,radeonsi: add ac_emit_sdma_copy_tiled_sub_window()")
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41966>
This commit is contained in:
Pierre-Eric Pelloux-Prayer 2026-06-02 10:30:41 +02:00 • committed by Marge Bot
parent 7e040483ec
commit 3b3181a14d
1 changed files with 2 additions and 4 deletions
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6
src/gallium/drivers/radeonsi/si_sdma_copy_image.c
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@ -35,7 +35,6 @@ static unsigned minify_as_blocks(unsigned width, unsigned level, unsigned blk_w)
static bool si_sdma_v4_v5_copy_texture(struct si_context *sctx, struct si_texture *sdst,
struct si_texture *ssrc)
{
bool is_v5 = sctx->gfx_level >= GFX10;
bool is_v7 = sctx->gfx_level >= GFX12;
unsigned bpp = sdst->surface.bpe;
uint64_t dst_address = sdst->buffer.gpu_address + sdst->surface.u.gfx9.surf_offset;
@ -97,8 +96,7 @@ static bool si_sdma_v4_v5_copy_texture(struct si_context *sctx, struct si_textur
copy_width <= (1 << 16) && copy_height <= (1 << 16)))
return false;
} else {
/* Only SDMA 5 supports DCC with SDMA */
dcc = is_v5 && vi_dcc_enabled(tiled, 0);
dcc = vi_dcc_enabled(tiled, 0) && sctx->screen->info.sdma_supports_compression;
/* Check if everything fits into the bitfields */
if (!(tiled_width <= (1 << 14) && tiled_height <= (1 << 14) &&
@ -416,7 +414,7 @@ bool si_sdma_copy_image(struct si_context *sctx, struct si_texture *dst, struct
return false;
/* Decompress DCC on older chips where SDMA can't read it. */
if (vi_dcc_enabled(src, 0) && sctx->gfx_level < GFX10)
if (vi_dcc_enabled(src, 0) && !sctx->screen->info.sdma_supports_compression)
si_decompress_dcc(sctx, src);
/* Always flush the gfx queue to get the winsys to handle the dependencies for us. */