diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index 2ff330bf398..0b05118bb7f 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -200,451 +200,6 @@ fd_query_memory_info(struct pipe_screen *pscreen, info->avail_device_memory = mem; } - -/* -TODO either move caps to a2xx/a3xx specific code, or maybe have some -tables for things that differ if the delta is not too much.. - */ -static int -fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) -{ - struct fd_screen *screen = fd_screen(pscreen); - - /* this is probably not totally correct.. but it's a start: */ - switch (param) { - /* Supported features (boolean caps). */ - case PIPE_CAP_NPOT_TEXTURES: - case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: - case PIPE_CAP_ANISOTROPIC_FILTER: - case PIPE_CAP_BLEND_EQUATION_SEPARATE: - case PIPE_CAP_TEXTURE_SWIZZLE: - case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT: - case PIPE_CAP_SEAMLESS_CUBE_MAP: - case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: - case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: - case PIPE_CAP_STRING_MARKER: - case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: - case PIPE_CAP_TEXTURE_BARRIER: - case PIPE_CAP_INVALIDATE_BUFFER: - case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS: - case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE: - case PIPE_CAP_GL_SPIRV: - case PIPE_CAP_FBFETCH_COHERENT: - case PIPE_CAP_HAS_CONST_BW: - return 1; - - case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: - case PIPE_CAP_MULTI_DRAW_INDIRECT: - case PIPE_CAP_DRAW_PARAMETERS: - case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: - case PIPE_CAP_DEPTH_BOUNDS_TEST: - return is_a6xx(screen); - - case PIPE_CAP_VERTEX_INPUT_ALIGNMENT: - return is_a2xx(screen) ? PIPE_VERTEX_INPUT_ALIGNMENT_4BYTE : PIPE_VERTEX_INPUT_ALIGNMENT_NONE; - - case PIPE_CAP_FS_COORD_PIXEL_CENTER_INTEGER: - return is_a2xx(screen); - case PIPE_CAP_FS_COORD_PIXEL_CENTER_HALF_INTEGER: - return !is_a2xx(screen); - - case PIPE_CAP_PACKED_UNIFORMS: - return !is_a2xx(screen); - - case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: - case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: - return screen->has_robustness; - - case PIPE_CAP_COMPUTE: - return has_compute(screen); - - case PIPE_CAP_TEXTURE_TRANSFER_MODES: - if (screen->gen >= 6) - return PIPE_TEXTURE_TRANSFER_BLIT; - return 0; - - case PIPE_CAP_PCI_GROUP: - case PIPE_CAP_PCI_BUS: - case PIPE_CAP_PCI_DEVICE: - case PIPE_CAP_PCI_FUNCTION: - return 0; - - case PIPE_CAP_SUPPORTED_PRIM_MODES: - case PIPE_CAP_SUPPORTED_PRIM_MODES_WITH_RESTART: - return screen->primtypes_mask; - - case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD: - case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES: - case PIPE_CAP_PRIMITIVE_RESTART: - case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX: - case PIPE_CAP_VS_INSTANCEID: - case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: - case PIPE_CAP_INDEP_BLEND_ENABLE: - case PIPE_CAP_INDEP_BLEND_FUNC: - case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: - case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: - case PIPE_CAP_CONDITIONAL_RENDER: - case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: - case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: - case PIPE_CAP_CLIP_HALFZ: - return is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen) || - is_a6xx(screen); - - case PIPE_CAP_FAKE_SW_MSAA: - return !fd_screen_get_param(pscreen, PIPE_CAP_TEXTURE_MULTISAMPLE); - - case PIPE_CAP_TEXTURE_MULTISAMPLE: - case PIPE_CAP_IMAGE_STORE_FORMATTED: - case PIPE_CAP_IMAGE_LOAD_FORMATTED: - return is_a5xx(screen) || is_a6xx(screen); - - case PIPE_CAP_SURFACE_SAMPLE_COUNT: - return is_a6xx(screen); - - case PIPE_CAP_DEPTH_CLIP_DISABLE: - return is_a3xx(screen) || is_a4xx(screen) || is_a6xx(screen); - - case PIPE_CAP_POST_DEPTH_COVERAGE: - case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE: - case PIPE_CAP_DEMOTE_TO_HELPER_INVOCATION: - return is_a6xx(screen); - - case PIPE_CAP_SAMPLER_REDUCTION_MINMAX: - case PIPE_CAP_SAMPLER_REDUCTION_MINMAX_ARB: - return is_a6xx(screen) && screen->info->a6xx.has_sampler_minmax; - - case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS: - return is_a6xx(screen) && screen->info->a6xx.has_sample_locations; - - case PIPE_CAP_POLYGON_OFFSET_CLAMP: - return is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen); - - case PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF: - return 0; - - case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: - if (is_a3xx(screen)) - return 16; - if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen)) - return 64; - return 0; - case PIPE_CAP_MAX_TEXEL_BUFFER_ELEMENTS_UINT: - /* We could possibly emulate more by pretending 2d/rect textures and - * splitting high bits of index into 2nd dimension.. - */ - if (is_a3xx(screen)) - return A3XX_MAX_TEXEL_BUFFER_ELEMENTS_UINT; - - /* Note that the Vulkan blob on a540 and 640 report a - * maxTexelBufferElements of just 65536 (the GLES3.2 and Vulkan - * minimum). - */ - if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen)) - return A4XX_MAX_TEXEL_BUFFER_ELEMENTS_UINT; - - return 0; - - case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK: - return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_FREEDRENO; - - case PIPE_CAP_TEXTURE_FLOAT_LINEAR: - case PIPE_CAP_CUBE_MAP_ARRAY: - case PIPE_CAP_SAMPLER_VIEW_TARGET: - case PIPE_CAP_TEXTURE_QUERY_LOD: - return is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen); - - case PIPE_CAP_START_INSTANCE: - /* Note that a5xx can do this, it just can't (at least with - * current firmware) do draw_indirect with base_instance. - * Since draw_indirect is needed sooner (gles31 and gl40 vs - * gl42), hide base_instance on a5xx. :-/ - */ - return is_a4xx(screen) || is_a6xx(screen); - - case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: - return 64; - - case PIPE_CAP_INT64: - case PIPE_CAP_DOUBLES: - return is_ir3(screen); - - case PIPE_CAP_GLSL_FEATURE_LEVEL: - case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY: - if (is_a6xx(screen)) - return 460; - else if (is_ir3(screen)) - return 140; - else - return 120; - - case PIPE_CAP_ESSL_FEATURE_LEVEL: - if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen)) - return 320; - if (is_ir3(screen)) - return 300; - return 120; - - case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: - if (is_a6xx(screen)) - return 64; - if (is_a5xx(screen)) - return 4; - if (is_a4xx(screen)) - return 4; - return 0; - - case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: - if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen)) - return 4; - return 0; - - /* TODO if we need this, do it in nir/ir3 backend to avoid breaking - * precompile: */ - case PIPE_CAP_FORCE_PERSAMPLE_INTERP: - return 0; - - case PIPE_CAP_FBFETCH: - if (fd_device_version(screen->dev) >= FD_VERSION_GMEM_BASE && - is_a6xx(screen)) - return screen->max_rts; - return 0; - case PIPE_CAP_SAMPLE_SHADING: - if (is_a6xx(screen)) - return 1; - return 0; - - case PIPE_CAP_CONTEXT_PRIORITY_MASK: - return screen->priority_mask; - - case PIPE_CAP_DRAW_INDIRECT: - if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen)) - return 1; - return 0; - - case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: - if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen)) - return 1; - return 0; - - case PIPE_CAP_LOAD_CONSTBUF: - /* name is confusing, but this turns on std430 packing */ - if (is_ir3(screen)) - return 1; - return 0; - - case PIPE_CAP_NIR_IMAGES_AS_DEREF: - return 0; - - case PIPE_CAP_VS_LAYER_VIEWPORT: - case PIPE_CAP_TES_LAYER_VIEWPORT: - return is_a6xx(screen); - - case PIPE_CAP_MAX_VIEWPORTS: - if (is_a6xx(screen)) - return 16; - return 1; - - case PIPE_CAP_MAX_VARYINGS: - return is_a6xx(screen) ? 31 : 16; - - case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: - /* We don't really have a limit on this, it all goes into the main - * memory buffer. Needs to be at least 120 / 4 (minimum requirement - * for GL_MAX_TESS_PATCH_COMPONENTS). - */ - return 128; - - case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET: - return 64 * 1024 * 1024; - - case PIPE_CAP_SHAREABLE_SHADERS: - if (is_ir3(screen)) - return 1; - return 0; - - /* Geometry shaders.. */ - case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES: - return 256; - case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS: - return 2048; - case PIPE_CAP_MAX_GS_INVOCATIONS: - return 32; - - /* Only a2xx has the half-border clamp mode in HW, just have mesa/st lower - * it for later HW. - */ - case PIPE_CAP_GL_CLAMP: - return is_a2xx(screen); - - case PIPE_CAP_CLIP_PLANES: - /* Gens that support GS, have GS lowered into a quasi-VS which confuses - * the frontend clip-plane lowering. So we handle this in the backend - * - */ - if (pscreen->get_shader_param(pscreen, PIPE_SHADER_GEOMETRY, - PIPE_SHADER_CAP_MAX_INSTRUCTIONS)) - return 1; - - /* On a3xx, there is HW support for GL user clip planes that - * occasionally has to fall back to shader key-based lowering to clip - * distances in the VS, and we don't support clip distances so that is - * always shader-based lowering in the FS. - * - * On a4xx, there is no HW support for clip planes, so they are - * always lowered to clip distances. We also lack SW support for the - * HW's clip distances in HW, so we do shader-based lowering in the FS - * in the driver backend. - * - * On a5xx-a6xx, we have the HW clip distances hooked up, so we just let - * mesa/st lower desktop GL's clip planes to clip distances in the last - * vertex shader stage. - * - * NOTE: but see comment above about geometry shaders - */ - return !is_a5xx(screen); - - /* Stream output. */ - case PIPE_CAP_MAX_VERTEX_STREAMS: - if (is_a6xx(screen)) /* has SO + GS */ - return PIPE_MAX_SO_BUFFERS; - return 0; - case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: - if (is_ir3(screen)) - return PIPE_MAX_SO_BUFFERS; - return 0; - case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: - case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: - case PIPE_CAP_FS_POSITION_IS_SYSVAL: - case PIPE_CAP_TGSI_TEXCOORD: - case PIPE_CAP_SHADER_ARRAY_COMPONENTS: - case PIPE_CAP_TEXTURE_QUERY_SAMPLES: - case PIPE_CAP_FS_FINE_DERIVATIVE: - if (is_ir3(screen)) - return 1; - return 0; - case PIPE_CAP_SHADER_GROUP_VOTE: - return is_a6xx(screen); - case PIPE_CAP_FS_FACE_IS_INTEGER_SYSVAL: - return 1; - case PIPE_CAP_FS_POINT_IS_SYSVAL: - return is_a2xx(screen); - case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: - case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: - if (is_ir3(screen)) - return 16 * 4; /* should only be shader out limit? */ - return 0; - - /* Texturing. */ - case PIPE_CAP_MAX_TEXTURE_2D_SIZE: - if (is_a6xx(screen) || is_a5xx(screen) || is_a4xx(screen)) - return 16384; - else - return 8192; - case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - if (is_a6xx(screen) || is_a5xx(screen) || is_a4xx(screen)) - return 15; - else - return 14; - - case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - if (is_a3xx(screen)) - return 11; - return 12; - - case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: - if (is_a6xx(screen)) - return 2048; - return (is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen)) - ? 256 - : 0; - - /* Render targets. */ - case PIPE_CAP_MAX_RENDER_TARGETS: - return screen->max_rts; - case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: - return (is_a3xx(screen) || is_a6xx(screen)) ? 1 : 0; - - /* Queries. */ - case PIPE_CAP_OCCLUSION_QUERY: - return is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen) || - is_a6xx(screen); - case PIPE_CAP_QUERY_TIMESTAMP: - case PIPE_CAP_QUERY_TIME_ELAPSED: - /* only a4xx, requires new enough kernel so we know max_freq: */ - return (screen->max_freq > 0) && - (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen)); - case PIPE_CAP_TIMER_RESOLUTION: - return ticks_to_ns(1); - case PIPE_CAP_QUERY_BUFFER_OBJECT: - case PIPE_CAP_QUERY_SO_OVERFLOW: - case PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE: - return is_a6xx(screen); - - case PIPE_CAP_VENDOR_ID: - return 0x5143; - case PIPE_CAP_DEVICE_ID: - return 0xFFFFFFFF; - case PIPE_CAP_ACCELERATED: - return 1; - - case PIPE_CAP_VIDEO_MEMORY: - return (int)(get_memory_size(screen) >> 20); - - case PIPE_CAP_QUERY_MEMORY_INFO: /* Enables GL_ATI_meminfo */ - return get_memory_size(screen) != 0; - - case PIPE_CAP_UMA: - return 1; - case PIPE_CAP_MEMOBJ: - return fd_device_version(screen->dev) >= FD_VERSION_MEMORY_FD; - case PIPE_CAP_NATIVE_FENCE_FD: - return fd_device_version(screen->dev) >= FD_VERSION_FENCE_FD; - case PIPE_CAP_FENCE_SIGNAL: - return screen->has_syncobj; - case PIPE_CAP_CULL_DISTANCE: - return is_a6xx(screen); - case PIPE_CAP_SHADER_STENCIL_EXPORT: - return is_a6xx(screen); - case PIPE_CAP_TWO_SIDED_COLOR: - return 0; - case PIPE_CAP_THROTTLE: - return screen->driconf.enable_throttling; - default: - return u_pipe_screen_get_param_defaults(pscreen, param); - } -} - -static float -fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param) -{ - switch (param) { - case PIPE_CAPF_MIN_LINE_WIDTH: - case PIPE_CAPF_MIN_LINE_WIDTH_AA: - case PIPE_CAPF_MIN_POINT_SIZE: - case PIPE_CAPF_MIN_POINT_SIZE_AA: - return 1; - case PIPE_CAPF_POINT_SIZE_GRANULARITY: - case PIPE_CAPF_LINE_WIDTH_GRANULARITY: - return 0.1f; - case PIPE_CAPF_MAX_LINE_WIDTH: - case PIPE_CAPF_MAX_LINE_WIDTH_AA: - return 127.0f; - case PIPE_CAPF_MAX_POINT_SIZE: - case PIPE_CAPF_MAX_POINT_SIZE_AA: - return 4092.0f; - case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: - return 16.0f; - case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: - return 15.0f; - case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE: - case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE: - case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY: - return 0.0f; - } - mesa_loge("unknown paramf %d", param); - return 0; -} - static int fd_screen_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_type shader, @@ -1530,8 +1085,6 @@ fd_screen_create(int fd, pscreen->destroy = fd_screen_destroy; pscreen->get_screen_fd = fd_screen_get_fd; pscreen->query_memory_info = fd_query_memory_info; - pscreen->get_param = fd_screen_get_param; - pscreen->get_paramf = fd_screen_get_paramf; pscreen->get_shader_param = fd_screen_get_shader_param; pscreen->get_compute_param = fd_get_compute_param; pscreen->get_compiler_options = fd_get_compiler_options;