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asahi: enable robustness

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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616>
This commit is contained in:
Alyssa Rosenzweig 2024-01-06 09:27:36 -04:00 • committed by Marge Bot
parent 591ce607e0
commit 3a6083dea3
3 changed files with 14 additions and 3 deletions
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5
src/gallium/drivers/asahi/agx_pipe.c
View file

@ -1501,6 +1501,7 @@ agx_create_context(struct pipe_screen *screen, void *priv, unsigned flags)
ctx->sample_mask = ~0;
ctx->support_lod_bias = !(flags & PIPE_CONTEXT_NO_LOD_BIAS);
ctx->robust = (flags & PIPE_CONTEXT_ROBUST_BUFFER_ACCESS);
return pctx;
}
@ -1708,6 +1709,10 @@ agx_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
return (int)(system_memory >> 20);
}
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
return true;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return 4;

11
src/gallium/drivers/asahi/agx_state.c
View file

@ -2123,7 +2123,7 @@ agx_get_shader_variant(struct agx_screen *screen, struct pipe_context *pctx,
static void
agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so,
nir_shader *nir, bool support_lod_bias)
nir_shader *nir, bool support_lod_bias, bool robust)
{
if (nir->info.stage == MESA_SHADER_KERNEL)
nir->info.stage = MESA_SHADER_COMPUTE;
@ -2138,6 +2138,11 @@ agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so,
*/
.lower_buffer_image = true,
.lower_image_atomic = true,
/* Buffer access is based on raw pointers and hence needs lowering to be
robust */
.lower_ubo = robust,
.lower_ssbo = robust,
};
/* We need to lower robustness before bindings, since robustness lowering
@ -2249,7 +2254,7 @@ agx_create_shader_state(struct pipe_context *pctx,
so->tess.output_stride = agx_tcs_output_stride(nir);
}
agx_shader_initialize(dev, so, nir, ctx->support_lod_bias);
agx_shader_initialize(dev, so, nir, ctx->support_lod_bias, ctx->robust);
/* We're done with the NIR, throw it away */
ralloc_free(nir);
@ -2326,7 +2331,7 @@ agx_create_compute_state(struct pipe_context *pctx,
assert(cso->ir_type == PIPE_SHADER_IR_NIR && "TGSI kernels unsupported");
nir_shader *nir = (void *)cso->prog;
agx_shader_initialize(dev, so, nir, ctx->support_lod_bias);
agx_shader_initialize(dev, so, nir, ctx->support_lod_bias, ctx->robust);
agx_get_shader_variant(agx_screen(pctx->screen), pctx, so, &pctx->debug,
&key, NULL);

1
src/gallium/drivers/asahi/agx_state.h
View file

@ -557,6 +557,7 @@ struct agx_context {
/* Acts as a context-level shader key */
bool support_lod_bias;
bool robust;
/* Set of batches. When full, the LRU entry (the batch with the smallest
* seqnum) is flushed to free a slot.