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r300: remove unused SIN/COS lowering
Reviewed-by: Emma Anholt <emma@anholt.net> Reviewed-by: Filip Gawin <filip.gawin@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
This commit is contained in:
Pavel Ondračka
Marge Bot
parent
daac72de3a
commit
3a3b9b7a63
4 changed files with 2 additions and 173 deletions
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@ -91,7 +91,6 @@ void r3xx_compile_fragment_program(struct r300_fragment_program_compiler* c)
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struct radeon_program_transformation native_rewrite_r300[] = {
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{ &radeonTransformALU, NULL },
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{ &radeonStubDeriv, NULL },
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{ &r300_transform_trig_simple, NULL },
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{ NULL, NULL }
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};
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@ -805,17 +805,11 @@ void r3xx_compile_vertex_program(struct r300_vertex_program_compiler *c)
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int opt = !c->Base.disable_optimizations;
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/* Lists of instruction transformations. */
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struct radeon_program_transformation alu_rewrite_r500[] = {
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struct radeon_program_transformation alu_rewrite[] = {
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{ &r300_transform_vertex_alu, NULL },
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{ NULL, NULL }
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};
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struct radeon_program_transformation alu_rewrite_r300[] = {
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{ &r300_transform_vertex_alu, NULL },
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{ &r300_transform_trig_simple, NULL },
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{ NULL, NULL }
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};
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/* Note: These passes have to be done separately from ALU rewrite,
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* otherwise non-native ALU instructions with source conflits
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* or non-native modifiers will not be treated properly.
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@ -834,8 +828,7 @@ void r3xx_compile_vertex_program(struct r300_vertex_program_compiler *c)
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struct radeon_compiler_pass vs_list[] = {
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/* NAME DUMP PREDICATE FUNCTION PARAM */
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{"add artificial outputs", 0, 1, rc_vs_add_artificial_outputs, NULL},
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{"native rewrite", 1, is_r500, rc_local_transform, alu_rewrite_r500},
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{"native rewrite", 1, !is_r500, rc_local_transform, alu_rewrite_r300},
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{"native rewrite", 1, 1, rc_local_transform, alu_rewrite},
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{"emulate modifiers", 1, !is_r500, rc_local_transform, emulate_modifiers},
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{"deadcode", 1, opt, rc_dataflow_deadcode, NULL},
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{"dataflow optimize", 1, opt, rc_optimize, NULL},
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@ -855,159 +855,6 @@ int r300_transform_vertex_alu(
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}
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}
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static void sincos_constants(struct radeon_compiler* c, unsigned int *constants)
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{
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static const float SinCosConsts[2][4] = {
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{
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1.273239545, /* 4/PI */
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-0.405284735, /* -4/(PI*PI) */
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3.141592654, /* PI */
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0.2225 /* weight */
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},
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{
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0.75,
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0.5,
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0.159154943, /* 1/(2*PI) */
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6.283185307 /* 2*PI */
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}
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};
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int i;
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for(i = 0; i < 2; ++i)
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constants[i] = rc_constants_add_immediate_vec4(&c->Program.Constants, SinCosConsts[i]);
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}
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/**
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* Approximate sin(x), where x is clamped to (-pi/2, pi/2).
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*
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* MUL tmp.xy, src, { 4/PI, -4/(PI^2) }
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* MAD tmp.x, tmp.y, |src|, tmp.x
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* MAD tmp.y, tmp.x, |tmp.x|, -tmp.x
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* MAD dest, tmp.y, weight, tmp.x
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*/
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static void sin_approx(
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struct radeon_compiler* c, struct rc_instruction * inst,
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struct rc_dst_register dst, struct rc_src_register src, const unsigned int* constants)
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{
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unsigned int tempreg = rc_find_free_temporary(c);
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emit2(c, inst->Prev, RC_OPCODE_MUL, NULL, dstregtmpmask(tempreg, RC_MASK_XY),
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swizzle_xxxx(src),
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srcreg(RC_FILE_CONSTANT, constants[0]));
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emit3(c, inst->Prev, RC_OPCODE_MAD, NULL, dstregtmpmask(tempreg, RC_MASK_X),
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swizzle_yyyy(srcreg(RC_FILE_TEMPORARY, tempreg)),
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absolute(swizzle_xxxx(src)),
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swizzle_xxxx(srcreg(RC_FILE_TEMPORARY, tempreg)));
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emit3(c, inst->Prev, RC_OPCODE_MAD, NULL, dstregtmpmask(tempreg, RC_MASK_Y),
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swizzle_xxxx(srcreg(RC_FILE_TEMPORARY, tempreg)),
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absolute(swizzle_xxxx(srcreg(RC_FILE_TEMPORARY, tempreg))),
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negate(swizzle_xxxx(srcreg(RC_FILE_TEMPORARY, tempreg))));
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emit3(c, inst->Prev, RC_OPCODE_MAD, NULL, dst,
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swizzle_yyyy(srcreg(RC_FILE_TEMPORARY, tempreg)),
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swizzle_wwww(srcreg(RC_FILE_CONSTANT, constants[0])),
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swizzle_xxxx(srcreg(RC_FILE_TEMPORARY, tempreg)));
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}
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/**
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* Translate the trigonometric functions COS and SIN
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* using only the basic instructions
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* MOV, ADD, MUL, MAD, FRC
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*/
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int r300_transform_trig_simple(struct radeon_compiler* c,
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struct rc_instruction* inst,
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void* unused)
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{
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unsigned int constants[2];
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unsigned int tempreg;
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if (inst->U.I.Opcode != RC_OPCODE_COS &&
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inst->U.I.Opcode != RC_OPCODE_SIN)
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return 0;
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tempreg = rc_find_free_temporary(c);
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sincos_constants(c, constants);
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if (inst->U.I.Opcode == RC_OPCODE_COS) {
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/* MAD tmp.x, src, 1/(2*PI), 0.75 */
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/* FRC tmp.x, tmp.x */
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/* MAD tmp.z, tmp.x, 2*PI, -PI */
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emit3(c, inst->Prev, RC_OPCODE_MAD, NULL, dstregtmpmask(tempreg, RC_MASK_W),
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swizzle_xxxx(inst->U.I.SrcReg[0]),
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swizzle_zzzz(srcreg(RC_FILE_CONSTANT, constants[1])),
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swizzle_xxxx(srcreg(RC_FILE_CONSTANT, constants[1])));
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emit1(c, inst->Prev, RC_OPCODE_FRC, NULL, dstregtmpmask(tempreg, RC_MASK_W),
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swizzle_wwww(srcreg(RC_FILE_TEMPORARY, tempreg)));
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emit3(c, inst->Prev, RC_OPCODE_MAD, NULL, dstregtmpmask(tempreg, RC_MASK_W),
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swizzle_wwww(srcreg(RC_FILE_TEMPORARY, tempreg)),
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swizzle_wwww(srcreg(RC_FILE_CONSTANT, constants[1])),
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negate(swizzle_zzzz(srcreg(RC_FILE_CONSTANT, constants[0]))));
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sin_approx(c, inst, inst->U.I.DstReg,
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swizzle_wwww(srcreg(RC_FILE_TEMPORARY, tempreg)),
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constants);
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} else if (inst->U.I.Opcode == RC_OPCODE_SIN) {
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emit3(c, inst->Prev, RC_OPCODE_MAD, NULL, dstregtmpmask(tempreg, RC_MASK_W),
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swizzle_xxxx(inst->U.I.SrcReg[0]),
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swizzle_zzzz(srcreg(RC_FILE_CONSTANT, constants[1])),
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swizzle_yyyy(srcreg(RC_FILE_CONSTANT, constants[1])));
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emit1(c, inst->Prev, RC_OPCODE_FRC, NULL, dstregtmpmask(tempreg, RC_MASK_W),
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swizzle_wwww(srcreg(RC_FILE_TEMPORARY, tempreg)));
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emit3(c, inst->Prev, RC_OPCODE_MAD, NULL, dstregtmpmask(tempreg, RC_MASK_W),
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swizzle_wwww(srcreg(RC_FILE_TEMPORARY, tempreg)),
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swizzle_wwww(srcreg(RC_FILE_CONSTANT, constants[1])),
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negate(swizzle_zzzz(srcreg(RC_FILE_CONSTANT, constants[0]))));
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sin_approx(c, inst, inst->U.I.DstReg,
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swizzle_wwww(srcreg(RC_FILE_TEMPORARY, tempreg)),
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constants);
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} else {
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struct rc_dst_register dst;
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emit3(c, inst->Prev, RC_OPCODE_MAD, NULL, dstregtmpmask(tempreg, RC_MASK_XY),
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swizzle_xxxx(inst->U.I.SrcReg[0]),
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swizzle_zzzz(srcreg(RC_FILE_CONSTANT, constants[1])),
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swizzle(srcreg(RC_FILE_CONSTANT, constants[1]), RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_W));
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emit1(c, inst->Prev, RC_OPCODE_FRC, NULL, dstregtmpmask(tempreg, RC_MASK_XY),
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srcreg(RC_FILE_TEMPORARY, tempreg));
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emit3(c, inst->Prev, RC_OPCODE_MAD, NULL, dstregtmpmask(tempreg, RC_MASK_XY),
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srcreg(RC_FILE_TEMPORARY, tempreg),
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swizzle_wwww(srcreg(RC_FILE_CONSTANT, constants[1])),
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negate(swizzle_zzzz(srcreg(RC_FILE_CONSTANT, constants[0]))));
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dst = inst->U.I.DstReg;
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dst.WriteMask = inst->U.I.DstReg.WriteMask & RC_MASK_X;
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sin_approx(c, inst, dst,
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swizzle_xxxx(srcreg(RC_FILE_TEMPORARY, tempreg)),
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constants);
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dst.WriteMask = inst->U.I.DstReg.WriteMask & RC_MASK_Y;
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sin_approx(c, inst, dst,
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swizzle_yyyy(srcreg(RC_FILE_TEMPORARY, tempreg)),
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constants);
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}
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rc_remove_instruction(inst);
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return 1;
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}
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static void r300_transform_SIN_COS(struct radeon_compiler *c,
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struct rc_instruction *inst,
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unsigned srctmp)
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{
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if (inst->U.I.Opcode == RC_OPCODE_COS) {
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emit1(c, inst->Prev, RC_OPCODE_COS, &inst->U.I, inst->U.I.DstReg,
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srcregswz(RC_FILE_TEMPORARY, srctmp, RC_SWIZZLE_WWWW));
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} else if (inst->U.I.Opcode == RC_OPCODE_SIN) {
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emit1(c, inst->Prev, RC_OPCODE_SIN, &inst->U.I,
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inst->U.I.DstReg, srcregswz(RC_FILE_TEMPORARY, srctmp, RC_SWIZZLE_WWWW));
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}
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rc_remove_instruction(inst);
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}
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/**
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* Replaces DDX/DDY instructions with MOV 0 to avoid using dummy shaders on r300/r400.
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*
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@ -40,16 +40,6 @@ int r300_transform_vertex_alu(
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struct rc_instruction * inst,
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void*);
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int r300_transform_trig_simple(
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struct radeon_compiler * c,
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struct rc_instruction * inst,
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void*);
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int r300_transform_trig_scale_vertex(
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struct radeon_compiler *c,
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struct rc_instruction *inst,
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void*);
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int radeonStubDeriv(
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struct radeon_compiler * c,
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struct rc_instruction * inst,
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