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radeonsi: don't merge SET_* packets that have a different index in si_pm4_state
Oops.
Fixes: c8e2c6faf6 ("radeonsi: use SET_SH_REG_INDEX with index=3 for registers containing CU_EN")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
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2 changed files with 3 additions and 1 deletions
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@ -63,13 +63,14 @@ static void si_pm4_set_reg_custom(struct si_pm4_state *state, unsigned reg, uint
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assert(state->ndw + 2 <= state->max_dw);
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if (opcode != state->last_opcode || reg != (state->last_reg + 1)) {
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if (opcode != state->last_opcode || reg != (state->last_reg + 1) || idx != state->last_idx) {
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si_pm4_cmd_begin(state, opcode);
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state->pm4[state->ndw++] = reg | (idx << 28);
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}
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assert(reg <= UINT16_MAX);
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state->last_reg = reg;
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state->last_idx = idx;
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state->pm4[state->ndw++] = val;
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si_pm4_cmd_end(state, false);
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}
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@ -48,6 +48,7 @@ struct si_pm4_state {
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uint16_t last_pm4;
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uint16_t ndw; /* number of dwords in pm4 */
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uint8_t last_opcode;
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uint8_t last_idx;
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/* For shader states only */
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bool is_shader;
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