radeonsi: don't merge SET_* packets that have a different index in si_pm4_state

Oops.

Fixes: c8e2c6faf6 ("radeonsi: use SET_SH_REG_INDEX with index=3 for registers containing CU_EN")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
This commit is contained in:
Marek Olšák 2023-02-21 11:33:13 -05:00 committed by Marge Bot
parent 0d543d76d7
commit 3a26d2b1a7
2 changed files with 3 additions and 1 deletions

View file

@ -63,13 +63,14 @@ static void si_pm4_set_reg_custom(struct si_pm4_state *state, unsigned reg, uint
assert(state->ndw + 2 <= state->max_dw);
if (opcode != state->last_opcode || reg != (state->last_reg + 1)) {
if (opcode != state->last_opcode || reg != (state->last_reg + 1) || idx != state->last_idx) {
si_pm4_cmd_begin(state, opcode);
state->pm4[state->ndw++] = reg | (idx << 28);
}
assert(reg <= UINT16_MAX);
state->last_reg = reg;
state->last_idx = idx;
state->pm4[state->ndw++] = val;
si_pm4_cmd_end(state, false);
}

View file

@ -48,6 +48,7 @@ struct si_pm4_state {
uint16_t last_pm4;
uint16_t ndw; /* number of dwords in pm4 */
uint8_t last_opcode;
uint8_t last_idx;
/* For shader states only */
bool is_shader;