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radeonsi/nir: lower uniforms to UBO loads

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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle 2017-07-04 11:09:50 +02:00
parent b7d36efc2d
commit 3997b10f74
1 changed files with 10 additions and 0 deletions
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10
src/gallium/drivers/radeonsi/si_shader_nir.c
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@ -32,6 +32,12 @@
#include "compiler/nir_types.h"
static int
type_size(const struct glsl_type *type)
{
return glsl_count_attribute_slots(type, false);
}
static void scan_instruction(struct tgsi_shader_info *info,
nir_instr *instr)
{
@ -345,6 +351,10 @@ si_lower_nir(struct si_shader_selector* sel)
* - ensure constant offsets for texture instructions are folded
* and copy-propagated
*/
NIR_PASS_V(sel->nir, nir_lower_io, nir_var_uniform, type_size,
(nir_lower_io_options)0);
NIR_PASS_V(sel->nir, nir_lower_uniforms_to_ubo);
NIR_PASS_V(sel->nir, nir_lower_returns);
NIR_PASS_V(sel->nir, nir_lower_vars_to_ssa);
NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar);