Faith Ekstrand 2023-12-07 09:35:38 -06:00 committed by Marge Bot
parent ce8d966085
commit 3955e596df
2 changed files with 8 additions and 4 deletions

View file

@ -123,6 +123,10 @@ fn nir_options(dev: &nv_device_info) -> nir_shader_compiler_options {
op.has_sudot_4x8 = dev.sm >= 70; op.has_sudot_4x8 = dev.sm >= 70;
op.max_unroll_iterations = 32; op.max_unroll_iterations = 32;
// We set .ftz on f32 by default so we can support fmulz whenever the client
// doesn't explicitly request denorms.
op.has_fmulz_no_denorms = true;
op op
} }

View file

@ -703,7 +703,7 @@ impl<'a> ShaderFromNir<'a> {
dst dst
} }
nir_op_fexp2 => b.mufu(MuFuOp::Exp2, srcs[0]), nir_op_fexp2 => b.mufu(MuFuOp::Exp2, srcs[0]),
nir_op_ffma => { nir_op_ffma | nir_op_ffmaz => {
let ftype = FloatType::from_bits(alu.def.bit_size().into()); let ftype = FloatType::from_bits(alu.def.bit_size().into());
assert!(alu.def.bit_size() == 32); assert!(alu.def.bit_size() == 32);
let dst = b.alloc_ssa(RegFile::GPR, 1); let dst = b.alloc_ssa(RegFile::GPR, 1);
@ -713,7 +713,7 @@ impl<'a> ShaderFromNir<'a> {
saturate: self.try_saturate_alu_dst(&alu.def), saturate: self.try_saturate_alu_dst(&alu.def),
rnd_mode: self.float_ctl[ftype].rnd_mode, rnd_mode: self.float_ctl[ftype].rnd_mode,
ftz: self.float_ctl[ftype].ftz, ftz: self.float_ctl[ftype].ftz,
dnz: false, dnz: alu.op == nir_op_ffmaz,
}); });
dst dst
} }
@ -732,7 +732,7 @@ impl<'a> ShaderFromNir<'a> {
}); });
dst dst
} }
nir_op_fmul => { nir_op_fmul | nir_op_fmulz => {
let ftype = FloatType::from_bits(alu.def.bit_size().into()); let ftype = FloatType::from_bits(alu.def.bit_size().into());
assert!(alu.def.bit_size() == 32); assert!(alu.def.bit_size() == 32);
let dst = b.alloc_ssa(RegFile::GPR, 1); let dst = b.alloc_ssa(RegFile::GPR, 1);
@ -742,7 +742,7 @@ impl<'a> ShaderFromNir<'a> {
saturate: self.try_saturate_alu_dst(&alu.def), saturate: self.try_saturate_alu_dst(&alu.def),
rnd_mode: self.float_ctl[ftype].rnd_mode, rnd_mode: self.float_ctl[ftype].rnd_mode,
ftz: self.float_ctl[ftype].ftz, ftz: self.float_ctl[ftype].ftz,
dnz: false, dnz: alu.op == nir_op_fmulz,
}); });
dst dst
} }