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gv100/ir: set ftz bit on floating point operations
Fixes Unigine Heavens ambient occlusion Signed-off-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5881>
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2 changed files with 8 additions and 2 deletions
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@ -35,7 +35,7 @@ GV100LegalizeSSA::handleCMP(Instruction *i)
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Value *pred = bld.getSSA(1, FILE_PREDICATE);
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bld.mkCmp(OP_SET, reverseCondCode(i->asCmp()->setCond), TYPE_U8, pred,
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i->sType, bld.mkImm(0), i->getSrc(2));
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i->sType, bld.mkImm(0), i->getSrc(2))->ftz = i->ftz;
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bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), i->getSrc(0), i->getSrc(1), pred);
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return true;
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}
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@ -189,6 +189,7 @@ GV100LegalizeSSA::handleSET(Instruction *i)
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xsetp->src(0).mod = i->src(0).mod;
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xsetp->src(1).mod = i->src(1).mod;
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xsetp->setSrc(2, src2);
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xsetp->ftz = i->ftz;
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i = bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), bld.mkImm(0), met, pred);
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i->src(2).mod = Modifier(NV50_IR_MOD_NOT);
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@ -235,6 +236,7 @@ GV100LegalizeSSA::handleSUB(Instruction *i)
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bld.mkOp2(OP_ADD, i->dType, i->getDef(0), i->getSrc(0), i->getSrc(1));
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xadd->src(0).mod = i->src(0).mod;
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xadd->src(1).mod = i->src(1).mod ^ Modifier(NV50_IR_MOD_NEG);
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xadd->ftz = i->ftz;
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return true;
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}
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@ -244,6 +246,9 @@ GV100LegalizeSSA::visit(Instruction *i)
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bool lowered = false;
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bld.setPosition(i, false);
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if (i->sType == TYPE_F32 && i->dType != TYPE_F16 &&
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prog->getType() != Program::TYPE_COMPUTE)
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handleFTZ(i);
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switch (i->op) {
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case OP_AND:
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@ -64,13 +64,14 @@ private:
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void handleDIV(Instruction *); // integer division, modulus
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void handleRCPRSQLib(Instruction *, Value *[]);
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void handleRCPRSQ(Instruction *); // double precision float recip/rsqrt
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void handleFTZ(Instruction *);
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void handleSET(CmpInstruction *);
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void handleTEXLOD(TexInstruction *);
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void handleShift(Instruction *);
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void handleBREV(Instruction *);
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protected:
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void handleFTZ(Instruction *);
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BuildUtil bld;
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};
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