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radeonsi: clamp shadow texture reference in nir for aco
This is ported from the LLVM ac_shader_abi->clamp_shadow_reference code. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
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b5409131ef
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1 changed files with 50 additions and 5 deletions
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@ -209,11 +209,8 @@ static nir_ssa_def *build_tess_factor_ring_desc(nir_builder *b, struct si_screen
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return nir_vec(b, comp, 4);
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}
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static bool lower_abi_instr(nir_builder *b, nir_instr *instr, struct lower_abi_state *s)
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static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_state *s)
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{
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if (instr->type != nir_instr_type_intrinsic)
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return false;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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struct si_shader *shader = s->shader;
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@ -536,6 +533,51 @@ static bool lower_abi_instr(nir_builder *b, nir_instr *instr, struct lower_abi_s
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return true;
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}
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static bool lower_tex(nir_builder *b, nir_instr *instr, struct lower_abi_state *s)
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{
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nir_tex_instr *tex = nir_instr_as_tex(instr);
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const struct si_shader_selector *sel = s->shader->selector;
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enum amd_gfx_level gfx_level = sel->screen->info.gfx_level;
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b->cursor = nir_before_instr(instr);
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/* Section 8.23.1 (Depth Texture Comparison Mode) of the
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* OpenGL 4.5 spec says:
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*
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* "If the texture’s internal format indicates a fixed-point
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* depth texture, then D_t and D_ref are clamped to the
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* range [0, 1]; otherwise no clamping is performed."
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*
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* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
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* so the depth comparison value isn't clamped for Z16 and
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* Z24 anymore. Do it manually here for GFX8-9; GFX10 has
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* an explicitly clamped 32-bit float format.
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*/
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/* LLVM keep non-uniform sampler as index, so can't do this in NIR. */
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if (tex->is_shadow && gfx_level >= GFX8 && gfx_level <= GFX9 && s->shader->use_aco) {
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int samp_index = nir_tex_instr_src_index(tex, nir_tex_src_sampler_handle);
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int comp_index = nir_tex_instr_src_index(tex, nir_tex_src_comparator);
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assert(samp_index >= 0 && comp_index >= 0);
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nir_ssa_def *sampler = tex->src[samp_index].src.ssa;
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nir_ssa_def *compare = tex->src[comp_index].src.ssa;
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/* Must have been lowered to descriptor. */
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assert(sampler->num_components > 1);
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nir_ssa_def *upgraded = nir_channel(b, sampler, 3);
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upgraded = nir_i2b(b, nir_ubfe_imm(b, upgraded, 29, 1));
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nir_ssa_def *clamped = nir_fsat(b, compare);
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compare = nir_bcsel(b, upgraded, clamped, compare);
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nir_instr_rewrite_src_ssa(instr, &tex->src[comp_index].src, compare);
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return true;
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}
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return false;
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}
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bool si_nir_lower_abi(nir_shader *nir, struct si_shader *shader, struct si_shader_args *args)
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{
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struct lower_abi_state state = {
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@ -551,7 +593,10 @@ bool si_nir_lower_abi(nir_shader *nir, struct si_shader *shader, struct si_shade
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bool progress = false;
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nir_foreach_block_safe(block, impl) {
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nir_foreach_instr_safe(instr, block) {
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progress |= lower_abi_instr(&b, instr, &state);
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if (instr->type == nir_instr_type_intrinsic)
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progress |= lower_intrinsic(&b, instr, &state);
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else if (instr->type == nir_instr_type_tex)
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progress |= lower_tex(&b, instr, &state);
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}
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}
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