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nouveau: wrap all nouveau_pushbuf_space calls

Browse source 
This makes it easier to insert locking code around libdrm.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10752>
This commit is contained in:
Karol Herbst 2021-06-26 10:24:45 +02:00 • committed by Marge Bot
parent 5fe8fedf24
commit 3866a5433a
20 changed files with 43 additions and 37 deletions
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4
src/gallium/drivers/nouveau/nouveau_video.c
View file

@ -73,7 +73,7 @@ nouveau_vpe_fini(struct nouveau_decoder *dec) {
if (!dec->cmds)
return;
nouveau_pushbuf_space(push, 16, 2, 0);
PUSH_SPACE_EX(push, 16, 2, 0);
nouveau_bufctx_reset(dec->bufctx, NV31_VIDEO_BIND_CMD);
#define BCTX_ARGS dec->bufctx, NV31_VIDEO_BIND_CMD, NOUVEAU_BO_RD
@ -588,7 +588,7 @@ nouveau_create_decoder(struct pipe_context *context,
#endif
nouveau_pushbuf_bufctx(dec->push, dec->bufctx);
nouveau_pushbuf_space(push, 32, 4, 0);
PUSH_SPACE_EX(push, 32, 4, 0);
BEGIN_NV04(push, SUBC_MPEG(NV01_SUBCHAN_OBJECT), 1);
PUSH_DATA (push, dec->mpeg->handle);

8
src/gallium/drivers/nouveau/nouveau_winsys.h
View file

@ -25,13 +25,19 @@ PUSH_AVAIL(struct nouveau_pushbuf *push)
return push->end - push->cur;
}
static inline bool
PUSH_SPACE_EX(struct nouveau_pushbuf *push, uint32_t size, uint32_t relocs, uint32_t pushes)
{
return nouveau_pushbuf_space(push, size, relocs, pushes) == 0;
}
static inline bool
PUSH_SPACE(struct nouveau_pushbuf *push, uint32_t size)
{
/* Provide a buffer so that fences always have room to be emitted */
size += 8;
if (PUSH_AVAIL(push) < size)
return nouveau_pushbuf_space(push, size, 0, 0) == 0;
return PUSH_SPACE_EX(push, size, 0, 0);
return true;
}

4
src/gallium/drivers/nouveau/nv30/nv30_clear.c
View file

@ -148,7 +148,7 @@ nv30_clear_render_target(struct pipe_context *pipe, struct pipe_surface *ps,
refn.bo = mt->base.bo;
refn.flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_WR;
if (nouveau_pushbuf_space(push, 32, 1, 0) ||
if (!PUSH_SPACE_EX(push, 32, 1, 0) ||
nouveau_pushbuf_refn (push, &refn, 1))
return;
@ -214,7 +214,7 @@ nv30_clear_depth_stencil(struct pipe_context *pipe, struct pipe_surface *ps,
refn.bo = mt->base.bo;
refn.flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_WR;
if (nouveau_pushbuf_space(push, 32, 1, 0) ||
if (!PUSH_SPACE_EX(push, 32, 1, 0) ||
nouveau_pushbuf_refn (push, &refn, 1))
return;

10
src/gallium/drivers/nouveau/nv30/nv30_transfer.c
View file

@ -155,7 +155,7 @@ nv30_transfer_rect_blit(XFER_ARGS)
u32 texfmt, texswz;
u32 format, stride;
if (nouveau_pushbuf_space(push, 512, 8, 0) ||
if (!PUSH_SPACE_EX(push, 512, 8, 0) ||
nouveau_pushbuf_refn (push, refs, ARRAY_SIZE(refs)))
return;
@ -431,7 +431,7 @@ nv30_transfer_rect_sifm(XFER_ARGS)
si_arg |= NV03_SIFM_FORMAT_FILTER_BILINEAR;
}
if (nouveau_pushbuf_space(push, 64, 6, 0) ||
if (!PUSH_SPACE_EX(push, 64, 6, 0) ||
nouveau_pushbuf_refn (push, refs, 2))
return;
@ -516,7 +516,7 @@ nv30_transfer_rect_m2mf(XFER_ARGS)
while (h) {
unsigned lines = (h > 2047) ? 2047 : h;
if (nouveau_pushbuf_space(push, 32, 2, 0) ||
if (!PUSH_SPACE_EX(push, 32, 2, 0) ||
nouveau_pushbuf_refn (push, refs, 2))
return;
@ -708,7 +708,7 @@ nv30_transfer_copy_data(struct nouveau_context *nv,
lines = (pages > 2047) ? 2047 : pages;
pages -= lines;
if (nouveau_pushbuf_space(push, 32, 2, 0) ||
if (!PUSH_SPACE_EX(push, 32, 2, 0) ||
nouveau_pushbuf_refn (push, refs, 2))
return;
@ -732,7 +732,7 @@ nv30_transfer_copy_data(struct nouveau_context *nv,
}
if (size) {
if (nouveau_pushbuf_space(push, 32, 2, 0) ||
if (!PUSH_SPACE_EX(push, 32, 2, 0) ||
nouveau_pushbuf_refn (push, refs, 2))
return;

2
src/gallium/drivers/nouveau/nv50/nv50_compute.c
View file

@ -547,7 +547,7 @@ nv50_compute_upload_input(struct nv50_context *nv50, const uint32_t *input)
nouveau_pushbuf_bufctx(push, nv50->bufctx);
nouveau_pushbuf_validate(push);
nouveau_pushbuf_space(push, 0, 0, 1);
PUSH_SPACE_EX(push, 0, 0, 1);
BEGIN_NV04(push, NV50_CP(USER_PARAM(1)), size / 4);
nouveau_pushbuf_data(push, bo, offset, size);

6
src/gallium/drivers/nouveau/nv50/nv50_surface.c
View file

@ -295,7 +295,7 @@ nv50_clear_render_target(struct pipe_context *pipe,
PUSH_DATAf(push, color->f[2]);
PUSH_DATAf(push, color->f[3]);
if (nouveau_pushbuf_space(push, 64 + sf->depth, 1, 0))
if (!PUSH_SPACE_EX(push, 64 + sf->depth, 1, 0))
return;
PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
@ -394,7 +394,7 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
mode |= NV50_3D_CLEAR_BUFFERS_S;
}
if (nouveau_pushbuf_space(push, 64 + sf->depth, 1, 0))
if (!PUSH_SPACE_EX(push, 64 + sf->depth, 1, 0))
return;
PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
@ -771,7 +771,7 @@ nv50_clear_buffer(struct pipe_context *pipe,
PUSH_DATA (push, color.ui[2]);
PUSH_DATA (push, color.ui[3]);
if (nouveau_pushbuf_space(push, 64, 1, 0))
if (!PUSH_SPACE_EX(push, 64, 1, 0))
return;
PUSH_REFN(push, buf->bo, buf->domain | NOUVEAU_BO_WR);

2
src/gallium/drivers/nouveau/nv50/nv50_vbo.c
View file

@ -631,7 +631,7 @@ nv50_draw_elements(struct nv50_context *nv50, bool shorten,
BEGIN_NV04(push, NV50_3D(VERTEX_BEGIN_GL), 1);
PUSH_DATA (push, prim);
nouveau_pushbuf_space(push, 16, 0, 1);
PUSH_SPACE_EX(push, 16, 0, 1);
PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
switch (index_size) {

6
src/gallium/drivers/nouveau/nv50/nv98_video.c
View file

@ -275,7 +275,7 @@ nv98_create_decoder(struct pipe_context *context,
dec->comm = (struct comm *)(dec->fence_map + (COMM_OFFSET/sizeof(*dec->fence_map)));
/* So lets test if the fence is working? */
nouveau_pushbuf_space(push[0], 16, 1, 0);
PUSH_SPACE_EX(push[0], 16, 1, 0);
PUSH_REFN (push[0], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
BEGIN_NV04(push[0], SUBC_BSP(0x240), 3);
PUSH_DATAh(push[0], dec->fence_bo->offset);
@ -286,7 +286,7 @@ nv98_create_decoder(struct pipe_context *context,
PUSH_DATA (push[0], 0);
PUSH_KICK (push[0]);
nouveau_pushbuf_space(push[1], 16, 1, 0);
PUSH_SPACE_EX(push[1], 16, 1, 0);
PUSH_REFN (push[1], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
BEGIN_NV04(push[1], SUBC_VP(0x240), 3);
PUSH_DATAh(push[1], (dec->fence_bo->offset + 0x10));
@ -297,7 +297,7 @@ nv98_create_decoder(struct pipe_context *context,
PUSH_DATA (push[1], 0);
PUSH_KICK (push[1]);
nouveau_pushbuf_space(push[2], 16, 1, 0);
PUSH_SPACE_EX(push[2], 16, 1, 0);
PUSH_REFN (push[2], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
BEGIN_NV04(push[2], SUBC_PPP(0x240), 3);
PUSH_DATAh(push[2], (dec->fence_bo->offset + 0x20));

2
src/gallium/drivers/nouveau/nv50/nv98_video_bsp.c
View file

@ -108,7 +108,7 @@ nv98_decoder_bsp(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
nouveau_vp3_vp_caps(dec, desc, target, comm_seq, vp_caps, is_ref, refs);
nouveau_pushbuf_space(push, 32, num_refs, 0);
PUSH_SPACE_EX(push, 32, num_refs, 0);
nouveau_pushbuf_refn(push, bo_refs, num_refs);
bsp_addr = bsp_bo->offset >> 8;

2
src/gallium/drivers/nouveau/nv50/nv98_video_ppp.c
View file

@ -94,7 +94,7 @@ nv98_decoder_ppp(struct nouveau_vp3_decoder *dec, union pipe_desc desc, struct n
struct nouveau_pushbuf *push = dec->pushbuf[2];
unsigned ppp_caps = 0x10;
nouveau_pushbuf_space(push, 32, 4, 0);
PUSH_SPACE_EX(push, 32, 4, 0);
switch (codec) {
case PIPE_VIDEO_FORMAT_MPEG12: {

2
src/gallium/drivers/nouveau/nv50/nv98_video_vp.c
View file

@ -112,7 +112,7 @@ nv98_decoder_vp(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
if (!is_ref && (dec->refs[target->valid_ref].decoded_top && dec->refs[target->valid_ref].decoded_bottom))
nv98_decoder_kick_ref(dec, target);
nouveau_pushbuf_space(push, 32 + codec_extra, num_refs, 0);
PUSH_SPACE_EX(push, 32 + codec_extra, num_refs, 0);
nouveau_pushbuf_refn(push, bo_refs, num_refs);

4
src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
View file

@ -464,7 +464,7 @@ nvc0_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info)
PUSH_DATA (push, (info->block[1] << 16) | info->block[0]);
PUSH_DATA (push, info->block[2]);
nouveau_pushbuf_space(push, 32, 2, 1);
PUSH_SPACE_EX(push, 32, 2, 1);
PUSH_REFN(push, screen->text, NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RD);
if (unlikely(info->indirect)) {
@ -511,7 +511,7 @@ nvc0_compute_update_indirect_invocations(struct nvc0_context *nvc0,
struct nv04_resource *res = nv04_resource(info->indirect);
uint32_t offset = res->offset + info->indirect_offset;
nouveau_pushbuf_space(push, 16, 0, 8);
PUSH_SPACE_EX(push, 16, 0, 8);
PUSH_REFN(push, res->bo, NOUVEAU_BO_RD | res->domain);
BEGIN_1IC0(push, NVC0_3D(MACRO_COMPUTE_COUNTER), 7);
PUSH_DATA(push, 6);

4
src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c
View file

@ -129,7 +129,7 @@ nvc0_hw_query_write_compute_invocations(struct nvc0_context *nvc0,
{
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
nouveau_pushbuf_space(push, 16, 0, 8);
PUSH_SPACE_EX(push, 16, 0, 8);
PUSH_REFN(push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_WR);
BEGIN_1IC0(push, NVC0_3D(MACRO_COMPUTE_COUNTER_TO_QUERY), 4);
PUSH_DATA (push, nvc0->compute_invocations);
@ -435,7 +435,7 @@ nvc0_hw_get_query_result_resource(struct nvc0_context *nvc0,
if ((flags & PIPE_QUERY_WAIT) && hq->state != NVC0_HW_QUERY_STATE_READY)
nvc0_hw_query_fifo_wait(nvc0, q);
nouveau_pushbuf_space(push, 32, 2, 3);
PUSH_SPACE_EX(push, 32, 2, 3);
PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR);
BEGIN_1IC0(push, NVC0_3D(MACRO_QUERY_BUFFER_WRITE), 9);

2
src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
View file

@ -364,7 +364,7 @@ nvc0_tfb_validate(struct nvc0_context *nvc0)
if (!targ->clean)
nvc0_hw_query_fifo_wait(nvc0, nvc0_query(targ->pq));
nouveau_pushbuf_space(push, 0, 0, 1);
PUSH_SPACE_EX(push, 0, 0, 1);
BEGIN_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 5);
PUSH_DATA (push, 1);
PUSH_DATAh(push, buf->address + targ->pipe.buffer_offset);

4
src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
View file

@ -788,7 +788,7 @@ nvc0_draw_stream_output(struct nvc0_context *nvc0,
}
while (num_instances--) {
nouveau_pushbuf_space(push, 16, 0, 1);
PUSH_SPACE_EX(push, 16, 0, 1);
BEGIN_NVC0(push, NVC0_3D(VERTEX_BEGIN_GL), 1);
PUSH_DATA (push, mode);
BEGIN_NVC0(push, NVC0_3D(DRAW_TFB_BASE), 1);
@ -869,7 +869,7 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info,
pushes = draws;
}
nouveau_pushbuf_space(push, 16, 0, pushes + !!buf_count);
PUSH_SPACE_EX(push, 16, 0, pushes + !!buf_count);
PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
if (buf_count)
PUSH_REFN(push, buf_count->bo, NOUVEAU_BO_RD | buf_count->domain);

6
src/gallium/drivers/nouveau/nvc0/nvc0_video.c
View file

@ -299,7 +299,7 @@ nvc0_create_decoder(struct pipe_context *context,
dec->comm = (struct comm *)(dec->fence_map + (COMM_OFFSET/sizeof(*dec->fence_map)));
/* So lets test if the fence is working? */
nouveau_pushbuf_space(push[0], 16, 1, 0);
PUSH_SPACE_EX(push[0], 16, 1, 0);
PUSH_REFN (push[0], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
BEGIN_NVC0(push[0], SUBC_BSP(0x240), 3);
PUSH_DATAh(push[0], dec->fence_bo->offset);
@ -310,7 +310,7 @@ nvc0_create_decoder(struct pipe_context *context,
PUSH_DATA (push[0], 0);
PUSH_KICK (push[0]);
nouveau_pushbuf_space(push[1], 16, 1, 0);
PUSH_SPACE_EX(push[1], 16, 1, 0);
PUSH_REFN (push[1], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
BEGIN_NVC0(push[1], SUBC_VP(0x240), 3);
PUSH_DATAh(push[1], (dec->fence_bo->offset + 0x10));
@ -321,7 +321,7 @@ nvc0_create_decoder(struct pipe_context *context,
PUSH_DATA (push[1], 0);
PUSH_KICK (push[1]);
nouveau_pushbuf_space(push[2], 16, 1, 0);
PUSH_SPACE_EX(push[2], 16, 1, 0);
PUSH_REFN (push[2], dec->fence_bo, NOUVEAU_BO_GART|NOUVEAU_BO_RDWR);
BEGIN_NVC0(push[2], SUBC_PPP(0x240), 3);
PUSH_DATAh(push[2], (dec->fence_bo->offset + 0x20));

2
src/gallium/drivers/nouveau/nvc0/nvc0_video_bsp.c
View file

@ -162,7 +162,7 @@ nvc0_decoder_bsp_end(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
nouveau_vp3_vp_caps(dec, desc, target, comm_seq, vp_caps, is_ref, refs);
nouveau_pushbuf_space(push, 32, num_refs, 0);
PUSH_SPACE_EX(push, 32, num_refs, 0);
nouveau_pushbuf_refn(push, bo_refs, num_refs);
bsp_addr = bsp_bo->offset >> 8;

2
src/gallium/drivers/nouveau/nvc0/nvc0_video_ppp.c
View file

@ -94,7 +94,7 @@ nvc0_decoder_ppp(struct nouveau_vp3_decoder *dec, union pipe_desc desc, struct n
struct nouveau_pushbuf *push = dec->pushbuf[2];
unsigned ppp_caps = 0x10;
nouveau_pushbuf_space(push, 32, 4, 0);
PUSH_SPACE_EX(push, 32, 4, 0);
switch (codec) {
case PIPE_VIDEO_FORMAT_MPEG12: {

2
src/gallium/drivers/nouveau/nvc0/nvc0_video_vp.c
View file

@ -112,7 +112,7 @@ nvc0_decoder_vp(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
if (!is_ref && (dec->refs[target->valid_ref].decoded_top && dec->refs[target->valid_ref].decoded_bottom))
nvc0_decoder_kick_ref(dec, target);
nouveau_pushbuf_space(push, 32 + codec_extra, num_refs, 0);
PUSH_SPACE_EX(push, 32 + codec_extra, num_refs, 0);
nouveau_pushbuf_refn(push, bo_refs, num_refs);

6
src/gallium/drivers/nouveau/nvc0/nve4_compute.c
View file

@ -545,7 +545,7 @@ nve4_compute_upload_input(struct nvc0_context *nvc0,
struct nv04_resource *res = nv04_resource(info->indirect);
uint32_t offset = res->offset + info->indirect_offset;
nouveau_pushbuf_space(push, 32, 0, 1);
PUSH_SPACE_EX(push, 32, 0, 1);
PUSH_REFN(push, res->bo, NOUVEAU_BO_RD | res->domain);
BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + 8);
@ -829,7 +829,7 @@ nve4_upload_indirect_desc(struct nouveau_pushbuf *push,
PUSH_DATA (push, length);
PUSH_DATA (push, 1);
nouveau_pushbuf_space(push, 32, 0, 1);
PUSH_SPACE_EX(push, 32, 0, 1);
PUSH_REFN(push, res->bo, NOUVEAU_BO_RD | res->domain);
BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + (length / 4));
@ -923,7 +923,7 @@ nve4_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info)
}
/* upload descriptor and flush */
nouveau_pushbuf_space(push, 32, 1, 0);
PUSH_SPACE_EX(push, 32, 1, 0);
PUSH_REFN(push, screen->text, NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RD);
BEGIN_NVC0(push, NVE4_CP(LAUNCH_DESC_ADDRESS), 1);
PUSH_DATA (push, desc_gpuaddr >> 8);