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gallium: all drivers should accept two-dimensional constant buffer indexing

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Most older drivers seem to just ignore the Dimension setting, so virtually
no changes should be needed.

Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
This commit is contained in:
Nicolai Hähnle 2017-08-23 17:41:27 +02:00
parent 0c7272a66c
commit 37dd8e8dee
2 changed files with 4 additions and 9 deletions
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2
src/gallium/auxiliary/nir/tgsi_to_nir.c
View file

@ -624,7 +624,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index,
assert(!dim);
break;
case TGSI_FILE_CONSTANT:
if (dim) {
if (dim && (dim->Index > 0 || dim->Indirect)) {
op = nir_intrinsic_load_ubo;
} else {
op = nir_intrinsic_load_uniform;

11
src/gallium/docs/source/screen.rst
View file

@ -446,21 +446,16 @@ support different features.
* ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
* ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
only permit binding one constant buffer per shader, and the shaders will
not permit two-dimensional access to constants.
only permit binding one constant buffer per shader.
If a value greater than 0 is returned, the driver can have multiple
constant buffers bound to shader stages. The CONST register file can
be accessed with two-dimensional indices, like in the example below.
constant buffers bound to shader stages. The CONST register file is
accessed with two-dimensional indices, like in the example below.
DCL CONST[0][0..7] # declare first 8 vectors of constbuf 0
DCL CONST[3][0] # declare first vector of constbuf 3
MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
For backwards compatibility, one-dimensional access to CONST register
file is still supported. In that case, the constbuf index is assumed
to be 0.
* ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
* ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
* ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing