From 37cd18e30ea671f8ba6ac4c602947d29355f1b02 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Fri, 9 Feb 2024 23:57:23 -0800 Subject: [PATCH] intel/elk: Remove encoding for Gfx9+ Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/compiler/elk/elk_disasm.c | 228 +----- src/intel/compiler/elk/elk_eu_emit.c | 251 ++---- src/intel/compiler/elk/elk_eu_validate.c | 86 +- src/intel/compiler/elk/elk_gram.y | 17 +- src/intel/compiler/elk/elk_inst.h | 985 ++++++----------------- 5 files changed, 351 insertions(+), 1216 deletions(-) diff --git a/src/intel/compiler/elk/elk_disasm.c b/src/intel/compiler/elk/elk_disasm.c index 15fdb42f783..b6391379fc3 100644 --- a/src/intel/compiler/elk/elk_disasm.c +++ b/src/intel/compiler/elk/elk_disasm.c @@ -1012,15 +1012,11 @@ dest_3src(FILE *file, const struct intel_device_info *devinfo, unsigned subreg_nr; enum elk_reg_type type; - if (devinfo->ver < 10 && is_align1) + if (is_align1) return 0; if (devinfo->ver == 6 && elk_inst_3src_a16_dst_reg_file(devinfo, inst)) reg_file = ELK_MESSAGE_REGISTER_FILE; - else if (devinfo->ver >= 12) - reg_file = elk_inst_3src_a1_dst_reg_file(devinfo, inst); - else if (is_align1 && elk_inst_3src_a1_dst_reg_file(devinfo, inst)) - reg_file = ELK_ARCHITECTURE_REGISTER_FILE; else reg_file = ELK_GENERAL_REGISTER_FILE; @@ -1028,13 +1024,8 @@ dest_3src(FILE *file, const struct intel_device_info *devinfo, if (err == -1) return 0; - if (is_align1) { - type = elk_inst_3src_a1_dst_type(devinfo, inst); - subreg_nr = elk_inst_3src_a1_dst_subreg_nr(devinfo, inst); - } else { - type = elk_inst_3src_a16_dst_type(devinfo, inst); - subreg_nr = elk_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4; - } + type = elk_inst_3src_a16_dst_type(devinfo, inst); + subreg_nr = elk_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4; subreg_nr /= elk_reg_type_to_size(type); if (subreg_nr) @@ -1289,57 +1280,24 @@ src0_3src(FILE *file, const struct intel_device_info *devinfo, bool is_scalar_region; bool is_align1 = elk_inst_3src_access_mode(devinfo, inst) == ELK_ALIGN_1; - if (devinfo->ver < 10 && is_align1) + if (is_align1) return 0; - if (is_align1) { - if (devinfo->ver >= 12 && !elk_inst_3src_a1_src0_is_imm(devinfo, inst)) { - _file = elk_inst_3src_a1_src0_reg_file(devinfo, inst); - } else if (elk_inst_3src_a1_src0_reg_file(devinfo, inst) == - ELK_ALIGN1_3SRC_GENERAL_REGISTER_FILE) { - _file = ELK_GENERAL_REGISTER_FILE; - } else if (elk_inst_3src_a1_src0_type(devinfo, inst) == - ELK_REGISTER_TYPE_NF) { - _file = ELK_ARCHITECTURE_REGISTER_FILE; - } else { - _file = ELK_IMMEDIATE_VALUE; - uint16_t imm_val = elk_inst_3src_a1_src0_imm(devinfo, inst); - enum elk_reg_type type = elk_inst_3src_a1_src0_type(devinfo, inst); + _file = ELK_GENERAL_REGISTER_FILE; + reg_nr = elk_inst_3src_src0_reg_nr(devinfo, inst); + subreg_nr = elk_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4; + type = elk_inst_3src_a16_src_type(devinfo, inst); - if (type == ELK_REGISTER_TYPE_W) { - format(file, "%dW", imm_val); - } else if (type == ELK_REGISTER_TYPE_UW) { - format(file, "0x%04xUW", imm_val); - } else if (type == ELK_REGISTER_TYPE_HF) { - format(file, "0x%04xHF", imm_val); - } - return 0; - } - - reg_nr = elk_inst_3src_src0_reg_nr(devinfo, inst); - subreg_nr = elk_inst_3src_a1_src0_subreg_nr(devinfo, inst); - type = elk_inst_3src_a1_src0_type(devinfo, inst); - _vert_stride = vstride_from_align1_3src_vstride( - devinfo, elk_inst_3src_a1_src0_vstride(devinfo, inst)); - _horiz_stride = hstride_from_align1_3src_hstride( - elk_inst_3src_a1_src0_hstride(devinfo, inst)); - _width = implied_width(_vert_stride, _horiz_stride); + if (elk_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) { + _vert_stride = ELK_VERTICAL_STRIDE_0; + _width = ELK_WIDTH_1; + _horiz_stride = ELK_HORIZONTAL_STRIDE_0; } else { - _file = ELK_GENERAL_REGISTER_FILE; - reg_nr = elk_inst_3src_src0_reg_nr(devinfo, inst); - subreg_nr = elk_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4; - type = elk_inst_3src_a16_src_type(devinfo, inst); - - if (elk_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) { - _vert_stride = ELK_VERTICAL_STRIDE_0; - _width = ELK_WIDTH_1; - _horiz_stride = ELK_HORIZONTAL_STRIDE_0; - } else { - _vert_stride = ELK_VERTICAL_STRIDE_4; - _width = ELK_WIDTH_4; - _horiz_stride = ELK_HORIZONTAL_STRIDE_1; - } + _vert_stride = ELK_VERTICAL_STRIDE_4; + _width = ELK_WIDTH_4; + _horiz_stride = ELK_HORIZONTAL_STRIDE_1; } + is_scalar_region = _vert_stride == ELK_VERTICAL_STRIDE_0 && _width == ELK_WIDTH_1 && _horiz_stride == ELK_HORIZONTAL_STRIDE_0; @@ -1376,44 +1334,24 @@ src1_3src(FILE *file, const struct intel_device_info *devinfo, bool is_scalar_region; bool is_align1 = elk_inst_3src_access_mode(devinfo, inst) == ELK_ALIGN_1; - if (devinfo->ver < 10 && is_align1) + if (is_align1) return 0; - if (is_align1) { - if (devinfo->ver >= 12) { - _file = elk_inst_3src_a1_src1_reg_file(devinfo, inst); - } else if (elk_inst_3src_a1_src1_reg_file(devinfo, inst) == - ELK_ALIGN1_3SRC_GENERAL_REGISTER_FILE) { - _file = ELK_GENERAL_REGISTER_FILE; - } else { - _file = ELK_ARCHITECTURE_REGISTER_FILE; - } + _file = ELK_GENERAL_REGISTER_FILE; + reg_nr = elk_inst_3src_src1_reg_nr(devinfo, inst); + subreg_nr = elk_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4; + type = elk_inst_3src_a16_src_type(devinfo, inst); - reg_nr = elk_inst_3src_src1_reg_nr(devinfo, inst); - subreg_nr = elk_inst_3src_a1_src1_subreg_nr(devinfo, inst); - type = elk_inst_3src_a1_src1_type(devinfo, inst); - - _vert_stride = vstride_from_align1_3src_vstride( - devinfo, elk_inst_3src_a1_src1_vstride(devinfo, inst)); - _horiz_stride = hstride_from_align1_3src_hstride( - elk_inst_3src_a1_src1_hstride(devinfo, inst)); - _width = implied_width(_vert_stride, _horiz_stride); + if (elk_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) { + _vert_stride = ELK_VERTICAL_STRIDE_0; + _width = ELK_WIDTH_1; + _horiz_stride = ELK_HORIZONTAL_STRIDE_0; } else { - _file = ELK_GENERAL_REGISTER_FILE; - reg_nr = elk_inst_3src_src1_reg_nr(devinfo, inst); - subreg_nr = elk_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4; - type = elk_inst_3src_a16_src_type(devinfo, inst); - - if (elk_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) { - _vert_stride = ELK_VERTICAL_STRIDE_0; - _width = ELK_WIDTH_1; - _horiz_stride = ELK_HORIZONTAL_STRIDE_0; - } else { - _vert_stride = ELK_VERTICAL_STRIDE_4; - _width = ELK_WIDTH_4; - _horiz_stride = ELK_HORIZONTAL_STRIDE_1; - } + _vert_stride = ELK_VERTICAL_STRIDE_4; + _width = ELK_WIDTH_4; + _horiz_stride = ELK_HORIZONTAL_STRIDE_1; } + is_scalar_region = _vert_stride == ELK_VERTICAL_STRIDE_0 && _width == ELK_WIDTH_1 && _horiz_stride == ELK_HORIZONTAL_STRIDE_0; @@ -1450,58 +1388,24 @@ src2_3src(FILE *file, const struct intel_device_info *devinfo, bool is_scalar_region; bool is_align1 = elk_inst_3src_access_mode(devinfo, inst) == ELK_ALIGN_1; - if (devinfo->ver < 10 && is_align1) + if (is_align1) return 0; - if (is_align1) { - if (devinfo->ver >= 12 && !elk_inst_3src_a1_src2_is_imm(devinfo, inst)) { - _file = elk_inst_3src_a1_src2_reg_file(devinfo, inst); - } else if (elk_inst_3src_a1_src2_reg_file(devinfo, inst) == - ELK_ALIGN1_3SRC_GENERAL_REGISTER_FILE) { - _file = ELK_GENERAL_REGISTER_FILE; - } else { - _file = ELK_IMMEDIATE_VALUE; - uint16_t imm_val = elk_inst_3src_a1_src2_imm(devinfo, inst); - enum elk_reg_type type = elk_inst_3src_a1_src2_type(devinfo, inst); + _file = ELK_GENERAL_REGISTER_FILE; + reg_nr = elk_inst_3src_src2_reg_nr(devinfo, inst); + subreg_nr = elk_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4; + type = elk_inst_3src_a16_src_type(devinfo, inst); - if (type == ELK_REGISTER_TYPE_W) { - format(file, "%dW", imm_val); - } else if (type == ELK_REGISTER_TYPE_UW) { - format(file, "0x%04xUW", imm_val); - } else if (type == ELK_REGISTER_TYPE_HF) { - format(file, "0x%04xHF", imm_val); - } - return 0; - } - - reg_nr = elk_inst_3src_src2_reg_nr(devinfo, inst); - subreg_nr = elk_inst_3src_a1_src2_subreg_nr(devinfo, inst); - type = elk_inst_3src_a1_src2_type(devinfo, inst); - /* FINISHME: No vertical stride on src2. Is using the hstride in place - * correct? Doesn't seem like it, since there's hstride=1 but - * no vstride=1. - */ - _vert_stride = vstride_from_align1_3src_hstride( - elk_inst_3src_a1_src2_hstride(devinfo, inst)); - _horiz_stride = hstride_from_align1_3src_hstride( - elk_inst_3src_a1_src2_hstride(devinfo, inst)); - _width = implied_width(_vert_stride, _horiz_stride); + if (elk_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) { + _vert_stride = ELK_VERTICAL_STRIDE_0; + _width = ELK_WIDTH_1; + _horiz_stride = ELK_HORIZONTAL_STRIDE_0; } else { - _file = ELK_GENERAL_REGISTER_FILE; - reg_nr = elk_inst_3src_src2_reg_nr(devinfo, inst); - subreg_nr = elk_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4; - type = elk_inst_3src_a16_src_type(devinfo, inst); - - if (elk_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) { - _vert_stride = ELK_VERTICAL_STRIDE_0; - _width = ELK_WIDTH_1; - _horiz_stride = ELK_HORIZONTAL_STRIDE_0; - } else { - _vert_stride = ELK_VERTICAL_STRIDE_4; - _width = ELK_WIDTH_4; - _horiz_stride = ELK_HORIZONTAL_STRIDE_1; - } + _vert_stride = ELK_VERTICAL_STRIDE_4; + _width = ELK_WIDTH_4; + _horiz_stride = ELK_HORIZONTAL_STRIDE_1; } + is_scalar_region = _vert_stride == ELK_VERTICAL_STRIDE_0 && _width == ELK_WIDTH_1 && _horiz_stride == ELK_HORIZONTAL_STRIDE_0; @@ -1772,12 +1676,7 @@ inst_has_type(const struct elk_isa_info *isa, return true; if (num_sources >= 3) { - if (elk_inst_3src_access_mode(devinfo, inst) == ELK_ALIGN_1) - return elk_inst_3src_a1_src0_type(devinfo, inst) == type || - elk_inst_3src_a1_src1_type(devinfo, inst) == type || - elk_inst_3src_a1_src2_type(devinfo, inst) == type; - else - return elk_inst_3src_a16_src_type(devinfo, inst) == type; + return elk_inst_3src_a16_src_type(devinfo, inst) == type; } else if (num_sources == 2) { return elk_inst_src0_type(devinfo, inst) == type || elk_inst_src1_type(devinfo, inst) == type; @@ -1786,32 +1685,6 @@ inst_has_type(const struct elk_isa_info *isa, } } -static int -swsb(FILE *file, const struct elk_isa_info *isa, const elk_inst *inst) -{ - const struct intel_device_info *devinfo = isa->devinfo; - const enum elk_opcode opcode = elk_inst_opcode(isa, inst); - const uint32_t x = elk_inst_swsb(devinfo, inst); - const bool is_unordered = - opcode == ELK_OPCODE_SEND || opcode == ELK_OPCODE_SENDC || - opcode == ELK_OPCODE_MATH || - (devinfo->has_64bit_float_via_math_pipe && - inst_has_type(isa, inst, ELK_REGISTER_TYPE_DF)); - const struct tgl_swsb swsb = tgl_swsb_decode(devinfo, is_unordered, x); - if (swsb.regdist) - format(file, " %s@%d", - (swsb.pipe == TGL_PIPE_FLOAT ? "F" : - swsb.pipe == TGL_PIPE_INT ? "I" : - swsb.pipe == TGL_PIPE_LONG ? "L" : - swsb.pipe == TGL_PIPE_ALL ? "A" : "" ), - swsb.regdist); - if (swsb.mode) - format(file, " $%d%s", swsb.sbid, - (swsb.mode & TGL_SBID_SET ? "" : - swsb.mode & TGL_SBID_DST ? ".dst" : ".src")); - return 0; -} - #ifdef DEBUG static __attribute__((__unused__)) int elk_disassemble_imm(const struct elk_isa_info *isa, @@ -2356,10 +2229,6 @@ elk_disassemble_inst(FILE *file, const struct elk_isa_info *isa, format(file, " dst_len = %u,", lsc_msg_desc_dest_len(devinfo, imm_desc)); format(file, " src0_len = %u,", lsc_msg_desc_src0_len(devinfo, imm_desc)); - if (!elk_inst_send_sel_reg32_ex_desc(devinfo, inst)) - format(file, " src1_len = %d", - elk_message_ex_desc_ex_mlen(devinfo, imm_ex_desc)); - err |= control(file, "address_type", lsc_addr_surface_type, lsc_msg_desc_addr_type(devinfo, imm_desc), &space); format(file, " )"); @@ -2485,14 +2354,6 @@ elk_disassemble_inst(FILE *file, const struct elk_isa_info *isa, if (space) string(file, " "); } - if (devinfo->verx10 >= 125 && - elk_inst_send_sel_reg32_ex_desc(devinfo, inst) && - elk_inst_send_ex_bso(devinfo, inst)) { - format(file, " src1_len = %u", - (unsigned) elk_inst_send_src1_len(devinfo, inst)); - - format(file, " ex_bso"); - } if (elk_sfid_is_lsc(sfid) || (sfid == ELK_SFID_URB && devinfo->ver >= 20)) { lsc_disassemble_ex_desc(devinfo, imm_desc, imm_ex_desc, file); @@ -2541,9 +2402,6 @@ elk_disassemble_inst(FILE *file, const struct elk_isa_info *isa, } } - if (devinfo->ver >= 12) - err |= swsb(file, isa, inst); - err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space); err |= control(file, "thread control", thread_ctrl, (devinfo->ver >= 12 ? elk_inst_atomic_control(devinfo, inst) : diff --git a/src/intel/compiler/elk/elk_eu_emit.c b/src/intel/compiler/elk/elk_eu_emit.c index f73418673bc..9590d1f916f 100644 --- a/src/intel/compiler/elk/elk_eu_emit.c +++ b/src/intel/compiler/elk/elk_eu_emit.c @@ -421,8 +421,6 @@ elk_set_desc_ex(struct elk_codegen *p, elk_inst *inst, elk_inst_set_src1_file_type(devinfo, inst, ELK_IMMEDIATE_VALUE, ELK_REGISTER_TYPE_UD); elk_inst_set_send_desc(devinfo, inst, desc); - if (devinfo->ver >= 9) - elk_inst_set_send_ex_desc(devinfo, inst, ex_desc); } static void elk_set_math_message( struct elk_codegen *p, @@ -580,8 +578,6 @@ elk_inst_set_state(const struct elk_isa_info *isa, elk_inst_set_compression(devinfo, insn, state->compressed); elk_inst_set_access_mode(devinfo, insn, state->access_mode); elk_inst_set_mask_control(devinfo, insn, state->mask_control); - if (devinfo->ver >= 12) - elk_inst_set_swsb(devinfo, insn, tgl_swsb_encode(devinfo, state->swsb)); elk_inst_set_saturate(devinfo, insn, state->saturate); elk_inst_set_pred_control(devinfo, insn, state->predicate); elk_inst_set_pred_inv(devinfo, insn, state->pred_inv); @@ -784,192 +780,73 @@ elk_alu3(struct elk_codegen *p, unsigned opcode, struct elk_reg dest, assert(src1.address_mode == ELK_ADDRESS_DIRECT); assert(src2.address_mode == ELK_ADDRESS_DIRECT); - if (elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1) { - assert(dest.file == ELK_GENERAL_REGISTER_FILE || - (dest.file == ELK_ARCHITECTURE_REGISTER_FILE && - dest.nr == ELK_ARF_ACCUMULATOR)); + assert(dest.file == ELK_GENERAL_REGISTER_FILE || + dest.file == ELK_MESSAGE_REGISTER_FILE); + assert(dest.type == ELK_REGISTER_TYPE_F || + dest.type == ELK_REGISTER_TYPE_DF || + dest.type == ELK_REGISTER_TYPE_D || + dest.type == ELK_REGISTER_TYPE_UD || + (dest.type == ELK_REGISTER_TYPE_HF && devinfo->ver >= 8)); + if (devinfo->ver == 6) { + elk_inst_set_3src_a16_dst_reg_file(devinfo, inst, + dest.file == ELK_MESSAGE_REGISTER_FILE); + } + elk_inst_set_3src_dst_reg_nr(devinfo, inst, dest.nr); + elk_inst_set_3src_a16_dst_subreg_nr(devinfo, inst, dest.subnr / 4); + elk_inst_set_3src_a16_dst_writemask(devinfo, inst, dest.writemask); - if (devinfo->ver >= 12) { - elk_inst_set_3src_a1_dst_reg_file(devinfo, inst, dest.file); - elk_inst_set_3src_dst_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); - } else { - if (dest.file == ELK_ARCHITECTURE_REGISTER_FILE) { - elk_inst_set_3src_a1_dst_reg_file(devinfo, inst, - ELK_ALIGN1_3SRC_ACCUMULATOR); - elk_inst_set_3src_dst_reg_nr(devinfo, inst, ELK_ARF_ACCUMULATOR); - } else { - elk_inst_set_3src_a1_dst_reg_file(devinfo, inst, - ELK_ALIGN1_3SRC_GENERAL_REGISTER_FILE); - elk_inst_set_3src_dst_reg_nr(devinfo, inst, dest.nr); - } - } - elk_inst_set_3src_a1_dst_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest) / 8); + assert(src0.file == ELK_GENERAL_REGISTER_FILE); + elk_inst_set_3src_a16_src0_swizzle(devinfo, inst, src0.swizzle); + elk_inst_set_3src_a16_src0_subreg_nr(devinfo, inst, get_3src_subreg_nr(src0)); + elk_inst_set_3src_src0_reg_nr(devinfo, inst, src0.nr); + elk_inst_set_3src_src0_abs(devinfo, inst, src0.abs); + elk_inst_set_3src_src0_negate(devinfo, inst, src0.negate); + elk_inst_set_3src_a16_src0_rep_ctrl(devinfo, inst, + src0.vstride == ELK_VERTICAL_STRIDE_0); - elk_inst_set_3src_a1_dst_hstride(devinfo, inst, ELK_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1); + assert(src1.file == ELK_GENERAL_REGISTER_FILE); + elk_inst_set_3src_a16_src1_swizzle(devinfo, inst, src1.swizzle); + elk_inst_set_3src_a16_src1_subreg_nr(devinfo, inst, get_3src_subreg_nr(src1)); + elk_inst_set_3src_src1_reg_nr(devinfo, inst, src1.nr); + elk_inst_set_3src_src1_abs(devinfo, inst, src1.abs); + elk_inst_set_3src_src1_negate(devinfo, inst, src1.negate); + elk_inst_set_3src_a16_src1_rep_ctrl(devinfo, inst, + src1.vstride == ELK_VERTICAL_STRIDE_0); - if (elk_reg_type_is_floating_point(dest.type)) { - elk_inst_set_3src_a1_exec_type(devinfo, inst, - ELK_ALIGN1_3SRC_EXEC_TYPE_FLOAT); - } else { - elk_inst_set_3src_a1_exec_type(devinfo, inst, - ELK_ALIGN1_3SRC_EXEC_TYPE_INT); - } + assert(src2.file == ELK_GENERAL_REGISTER_FILE); + elk_inst_set_3src_a16_src2_swizzle(devinfo, inst, src2.swizzle); + elk_inst_set_3src_a16_src2_subreg_nr(devinfo, inst, get_3src_subreg_nr(src2)); + elk_inst_set_3src_src2_reg_nr(devinfo, inst, src2.nr); + elk_inst_set_3src_src2_abs(devinfo, inst, src2.abs); + elk_inst_set_3src_src2_negate(devinfo, inst, src2.negate); + elk_inst_set_3src_a16_src2_rep_ctrl(devinfo, inst, + src2.vstride == ELK_VERTICAL_STRIDE_0); - elk_inst_set_3src_a1_dst_type(devinfo, inst, dest.type); - elk_inst_set_3src_a1_src0_type(devinfo, inst, src0.type); - elk_inst_set_3src_a1_src1_type(devinfo, inst, src1.type); - elk_inst_set_3src_a1_src2_type(devinfo, inst, src2.type); + if (devinfo->ver >= 7) { + /* Set both the source and destination types based on dest.type, + * ignoring the source register types. The MAD and LRP emitters ensure + * that all four types are float. The BFE and BFI2 emitters, however, + * may send us mixed D and UD types and want us to ignore that and use + * the destination type. + */ + elk_inst_set_3src_a16_src_type(devinfo, inst, dest.type); + elk_inst_set_3src_a16_dst_type(devinfo, inst, dest.type); - if (src0.file == ELK_IMMEDIATE_VALUE) { - elk_inst_set_3src_a1_src0_imm(devinfo, inst, src0.ud); - } else { - elk_inst_set_3src_a1_src0_vstride( - devinfo, inst, to_3src_align1_vstride(devinfo, src0.vstride)); - elk_inst_set_3src_a1_src0_hstride(devinfo, inst, - to_3src_align1_hstride(src0.hstride)); - elk_inst_set_3src_a1_src0_subreg_nr(devinfo, inst, phys_subnr(devinfo, src0)); - if (src0.type == ELK_REGISTER_TYPE_NF) { - elk_inst_set_3src_src0_reg_nr(devinfo, inst, ELK_ARF_ACCUMULATOR); - } else { - elk_inst_set_3src_src0_reg_nr(devinfo, inst, phys_nr(devinfo, src0)); - } - elk_inst_set_3src_src0_abs(devinfo, inst, src0.abs); - elk_inst_set_3src_src0_negate(devinfo, inst, src0.negate); - } - elk_inst_set_3src_a1_src1_vstride( - devinfo, inst, to_3src_align1_vstride(devinfo, src1.vstride)); - elk_inst_set_3src_a1_src1_hstride(devinfo, inst, - to_3src_align1_hstride(src1.hstride)); + /* From the Bspec, 3D Media GPGPU, Instruction fields, srcType: + * + * "Three source instructions can use operands with mixed-mode + * precision. When SrcType field is set to :f or :hf it defines + * precision for source 0 only, and fields Src1Type and Src2Type + * define precision for other source operands: + * + * 0b = :f. Single precision Float (32-bit). + * 1b = :hf. Half precision Float (16-bit)." + */ + if (src1.type == ELK_REGISTER_TYPE_HF) + elk_inst_set_3src_a16_src1_type(devinfo, inst, 1); - elk_inst_set_3src_a1_src1_subreg_nr(devinfo, inst, phys_subnr(devinfo, src1)); - if (src1.file == ELK_ARCHITECTURE_REGISTER_FILE) { - elk_inst_set_3src_src1_reg_nr(devinfo, inst, ELK_ARF_ACCUMULATOR); - } else { - elk_inst_set_3src_src1_reg_nr(devinfo, inst, phys_nr(devinfo, src1)); - } - elk_inst_set_3src_src1_abs(devinfo, inst, src1.abs); - elk_inst_set_3src_src1_negate(devinfo, inst, src1.negate); - - if (src2.file == ELK_IMMEDIATE_VALUE) { - elk_inst_set_3src_a1_src2_imm(devinfo, inst, src2.ud); - } else { - elk_inst_set_3src_a1_src2_hstride(devinfo, inst, - to_3src_align1_hstride(src2.hstride)); - /* no vstride on src2 */ - elk_inst_set_3src_a1_src2_subreg_nr(devinfo, inst, phys_subnr(devinfo, src2)); - elk_inst_set_3src_src2_reg_nr(devinfo, inst, phys_nr(devinfo, src2)); - elk_inst_set_3src_src2_abs(devinfo, inst, src2.abs); - elk_inst_set_3src_src2_negate(devinfo, inst, src2.negate); - } - - assert(src0.file == ELK_GENERAL_REGISTER_FILE || - src0.file == ELK_IMMEDIATE_VALUE || - (src0.file == ELK_ARCHITECTURE_REGISTER_FILE && - src0.type == ELK_REGISTER_TYPE_NF)); - assert(src1.file == ELK_GENERAL_REGISTER_FILE || - (src1.file == ELK_ARCHITECTURE_REGISTER_FILE && - src1.nr == ELK_ARF_ACCUMULATOR)); - assert(src2.file == ELK_GENERAL_REGISTER_FILE || - src2.file == ELK_IMMEDIATE_VALUE); - - if (devinfo->ver >= 12) { - if (src0.file == ELK_IMMEDIATE_VALUE) { - elk_inst_set_3src_a1_src0_is_imm(devinfo, inst, 1); - } else { - elk_inst_set_3src_a1_src0_reg_file(devinfo, inst, src0.file); - } - - elk_inst_set_3src_a1_src1_reg_file(devinfo, inst, src1.file); - - if (src2.file == ELK_IMMEDIATE_VALUE) { - elk_inst_set_3src_a1_src2_is_imm(devinfo, inst, 1); - } else { - elk_inst_set_3src_a1_src2_reg_file(devinfo, inst, src2.file); - } - } else { - elk_inst_set_3src_a1_src0_reg_file(devinfo, inst, - src0.file == ELK_GENERAL_REGISTER_FILE ? - ELK_ALIGN1_3SRC_GENERAL_REGISTER_FILE : - ELK_ALIGN1_3SRC_IMMEDIATE_VALUE); - elk_inst_set_3src_a1_src1_reg_file(devinfo, inst, - src1.file == ELK_GENERAL_REGISTER_FILE ? - ELK_ALIGN1_3SRC_GENERAL_REGISTER_FILE : - ELK_ALIGN1_3SRC_ACCUMULATOR); - elk_inst_set_3src_a1_src2_reg_file(devinfo, inst, - src2.file == ELK_GENERAL_REGISTER_FILE ? - ELK_ALIGN1_3SRC_GENERAL_REGISTER_FILE : - ELK_ALIGN1_3SRC_IMMEDIATE_VALUE); - } - - } else { - assert(dest.file == ELK_GENERAL_REGISTER_FILE || - dest.file == ELK_MESSAGE_REGISTER_FILE); - assert(dest.type == ELK_REGISTER_TYPE_F || - dest.type == ELK_REGISTER_TYPE_DF || - dest.type == ELK_REGISTER_TYPE_D || - dest.type == ELK_REGISTER_TYPE_UD || - (dest.type == ELK_REGISTER_TYPE_HF && devinfo->ver >= 8)); - if (devinfo->ver == 6) { - elk_inst_set_3src_a16_dst_reg_file(devinfo, inst, - dest.file == ELK_MESSAGE_REGISTER_FILE); - } - elk_inst_set_3src_dst_reg_nr(devinfo, inst, dest.nr); - elk_inst_set_3src_a16_dst_subreg_nr(devinfo, inst, dest.subnr / 4); - elk_inst_set_3src_a16_dst_writemask(devinfo, inst, dest.writemask); - - assert(src0.file == ELK_GENERAL_REGISTER_FILE); - elk_inst_set_3src_a16_src0_swizzle(devinfo, inst, src0.swizzle); - elk_inst_set_3src_a16_src0_subreg_nr(devinfo, inst, get_3src_subreg_nr(src0)); - elk_inst_set_3src_src0_reg_nr(devinfo, inst, src0.nr); - elk_inst_set_3src_src0_abs(devinfo, inst, src0.abs); - elk_inst_set_3src_src0_negate(devinfo, inst, src0.negate); - elk_inst_set_3src_a16_src0_rep_ctrl(devinfo, inst, - src0.vstride == ELK_VERTICAL_STRIDE_0); - - assert(src1.file == ELK_GENERAL_REGISTER_FILE); - elk_inst_set_3src_a16_src1_swizzle(devinfo, inst, src1.swizzle); - elk_inst_set_3src_a16_src1_subreg_nr(devinfo, inst, get_3src_subreg_nr(src1)); - elk_inst_set_3src_src1_reg_nr(devinfo, inst, src1.nr); - elk_inst_set_3src_src1_abs(devinfo, inst, src1.abs); - elk_inst_set_3src_src1_negate(devinfo, inst, src1.negate); - elk_inst_set_3src_a16_src1_rep_ctrl(devinfo, inst, - src1.vstride == ELK_VERTICAL_STRIDE_0); - - assert(src2.file == ELK_GENERAL_REGISTER_FILE); - elk_inst_set_3src_a16_src2_swizzle(devinfo, inst, src2.swizzle); - elk_inst_set_3src_a16_src2_subreg_nr(devinfo, inst, get_3src_subreg_nr(src2)); - elk_inst_set_3src_src2_reg_nr(devinfo, inst, src2.nr); - elk_inst_set_3src_src2_abs(devinfo, inst, src2.abs); - elk_inst_set_3src_src2_negate(devinfo, inst, src2.negate); - elk_inst_set_3src_a16_src2_rep_ctrl(devinfo, inst, - src2.vstride == ELK_VERTICAL_STRIDE_0); - - if (devinfo->ver >= 7) { - /* Set both the source and destination types based on dest.type, - * ignoring the source register types. The MAD and LRP emitters ensure - * that all four types are float. The BFE and BFI2 emitters, however, - * may send us mixed D and UD types and want us to ignore that and use - * the destination type. - */ - elk_inst_set_3src_a16_src_type(devinfo, inst, dest.type); - elk_inst_set_3src_a16_dst_type(devinfo, inst, dest.type); - - /* From the Bspec, 3D Media GPGPU, Instruction fields, srcType: - * - * "Three source instructions can use operands with mixed-mode - * precision. When SrcType field is set to :f or :hf it defines - * precision for source 0 only, and fields Src1Type and Src2Type - * define precision for other source operands: - * - * 0b = :f. Single precision Float (32-bit). - * 1b = :hf. Half precision Float (16-bit)." - */ - if (src1.type == ELK_REGISTER_TYPE_HF) - elk_inst_set_3src_a16_src1_type(devinfo, inst, 1); - - if (src2.type == ELK_REGISTER_TYPE_HF) - elk_inst_set_3src_a16_src2_type(devinfo, inst, 1); - } + if (src2.type == ELK_REGISTER_TYPE_HF) + elk_inst_set_3src_a16_src2_type(devinfo, inst, 1); } return inst; @@ -2672,11 +2549,7 @@ elk_send_indirect_message(struct elk_codegen *p, elk_set_default_swsb(p, tgl_swsb_dst_dep(swsb, 1)); send = next_insn(p, ELK_OPCODE_SEND); elk_set_src0(p, send, retype(payload, ELK_REGISTER_TYPE_UD)); - - if (devinfo->ver >= 12) - elk_inst_set_send_sel_reg32_desc(devinfo, send, true); - else - elk_set_src1(p, send, addr); + elk_set_src1(p, send, addr); } elk_set_dest(p, send, dst); diff --git a/src/intel/compiler/elk/elk_eu_validate.c b/src/intel/compiler/elk/elk_eu_validate.c index 892dff3dbe3..2c5e654f35d 100644 --- a/src/intel/compiler/elk/elk_eu_validate.c +++ b/src/intel/compiler/elk/elk_eu_validate.c @@ -261,15 +261,7 @@ invalid_values(const struct elk_isa_info *isa, const elk_inst *inst) if (num_sources == 3) { if (elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1) { - if (devinfo->ver >= 10) { - ERROR_IF(elk_inst_3src_a1_dst_type (devinfo, inst) == INVALID_REG_TYPE || - elk_inst_3src_a1_src0_type(devinfo, inst) == INVALID_REG_TYPE || - elk_inst_3src_a1_src1_type(devinfo, inst) == INVALID_REG_TYPE || - elk_inst_3src_a1_src2_type(devinfo, inst) == INVALID_REG_TYPE, - "invalid register type encoding"); - } else { - ERROR("Align1 mode not allowed on Gen < 10"); - } + ERROR("Align1 mode not allowed on Gen < 10"); } else { ERROR_IF(elk_inst_3src_a16_dst_type(devinfo, inst) == INVALID_REG_TYPE || elk_inst_3src_a16_src_type(devinfo, inst) == INVALID_REG_TYPE, @@ -638,27 +630,10 @@ general_restrictions_based_on_operand_types(const struct elk_isa_info *isa, if (inst_is_send(isa, inst)) return error_msg; - if (devinfo->ver >= 11) { - if (num_sources == 3) { - ERROR_IF(elk_reg_type_to_size(elk_inst_3src_a1_src1_type(devinfo, inst)) == 1 || - elk_reg_type_to_size(elk_inst_3src_a1_src2_type(devinfo, inst)) == 1, - "Byte data type is not supported for src1/2 register regioning. This includes " - "byte broadcast as well."); - } - if (num_sources == 2) { - ERROR_IF(elk_reg_type_to_size(elk_inst_src1_type(devinfo, inst)) == 1, - "Byte data type is not supported for src1 register regioning. This includes " - "byte broadcast as well."); - } - } - enum elk_reg_type dst_type; if (num_sources == 3) { - if (elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1) - dst_type = elk_inst_3src_a1_dst_type(devinfo, inst); - else - dst_type = elk_inst_3src_a16_dst_type(devinfo, inst); + dst_type = elk_inst_3src_a16_dst_type(devinfo, inst); } else { dst_type = inst_dst_type(isa, inst); } @@ -675,16 +650,7 @@ general_restrictions_based_on_operand_types(const struct elk_isa_info *isa, for (unsigned s = 0; s < num_sources; s++) { enum elk_reg_type src_type; if (num_sources == 3) { - if (elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1) { - switch (s) { - case 0: src_type = elk_inst_3src_a1_src0_type(devinfo, inst); break; - case 1: src_type = elk_inst_3src_a1_src1_type(devinfo, inst); break; - case 2: src_type = elk_inst_3src_a1_src2_type(devinfo, inst); break; - default: unreachable("invalid src"); - } - } else { - src_type = elk_inst_3src_a16_src_type(devinfo, inst); - } + src_type = elk_inst_3src_a16_src_type(devinfo, inst); } else { switch (s) { case 0: src_type = elk_inst_src0_type(devinfo, inst); break; @@ -2281,30 +2247,17 @@ instruction_restrictions(const struct elk_isa_info *isa, ERROR_IF(elk_inst_saturate(devinfo, inst), "BFI2 cannot have saturate modifier"); - enum elk_reg_type dst_type; + ERROR_IF(elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1, + "BFI2 cannot have Align1"); - if (elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1) - dst_type = elk_inst_3src_a1_dst_type(devinfo, inst); - else - dst_type = elk_inst_3src_a16_dst_type(devinfo, inst); + enum elk_reg_type dst_type = elk_inst_3src_a16_dst_type(devinfo, inst); ERROR_IF(dst_type != ELK_REGISTER_TYPE_D && dst_type != ELK_REGISTER_TYPE_UD, "BFI2 destination type must be D or UD"); for (unsigned s = 0; s < 3; s++) { - enum elk_reg_type src_type; - - if (elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1) { - switch (s) { - case 0: src_type = elk_inst_3src_a1_src0_type(devinfo, inst); break; - case 1: src_type = elk_inst_3src_a1_src1_type(devinfo, inst); break; - case 2: src_type = elk_inst_3src_a1_src2_type(devinfo, inst); break; - default: unreachable("invalid src"); - } - } else { - src_type = elk_inst_3src_a16_src_type(devinfo, inst); - } + enum elk_reg_type src_type = elk_inst_3src_a16_src_type(devinfo, inst); ERROR_IF(src_type != dst_type, "BFI2 source type must match destination type"); @@ -2321,18 +2274,12 @@ instruction_restrictions(const struct elk_isa_info *isa, ERROR_IF(elk_inst_cond_modifier(devinfo, inst) == ELK_CONDITIONAL_NONE, "CSEL must have a condition."); - enum elk_reg_type dst_type; - - if (elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1) - dst_type = elk_inst_3src_a1_dst_type(devinfo, inst); - else - dst_type = elk_inst_3src_a16_dst_type(devinfo, inst); + ERROR_IF(elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1, + "CSEL cannot have Align1."); + enum elk_reg_type dst_type = elk_inst_3src_a16_dst_type(devinfo, inst); if (devinfo->ver < 8) { ERROR_IF(devinfo->ver < 8, "CSEL not supported before Gfx8"); - } else if (devinfo->ver <= 9) { - ERROR_IF(dst_type != ELK_REGISTER_TYPE_F, - "CSEL destination type must be F"); } else { ERROR_IF(dst_type != ELK_REGISTER_TYPE_F && dst_type != ELK_REGISTER_TYPE_HF && @@ -2342,18 +2289,7 @@ instruction_restrictions(const struct elk_isa_info *isa, } for (unsigned s = 0; s < 3; s++) { - enum elk_reg_type src_type; - - if (elk_inst_access_mode(devinfo, inst) == ELK_ALIGN_1) { - switch (s) { - case 0: src_type = elk_inst_3src_a1_src0_type(devinfo, inst); break; - case 1: src_type = elk_inst_3src_a1_src1_type(devinfo, inst); break; - case 2: src_type = elk_inst_3src_a1_src2_type(devinfo, inst); break; - default: unreachable("invalid src"); - } - } else { - src_type = elk_inst_3src_a16_src_type(devinfo, inst); - } + enum elk_reg_type src_type = elk_inst_3src_a16_src_type(devinfo, inst); ERROR_IF(src_type != dst_type, "CSEL source type must match destination type"); diff --git a/src/intel/compiler/elk/elk_gram.y b/src/intel/compiler/elk/elk_gram.y index 179b758686a..573a3b6607d 100644 --- a/src/intel/compiler/elk/elk_gram.y +++ b/src/intel/compiler/elk/elk_gram.y @@ -286,17 +286,12 @@ i965_asm_set_instruction_options(struct elk_codegen *p, options.access_mode); elk_inst_set_mask_control(p->devinfo, elk_last_inst, options.mask_control); - if (p->devinfo->ver < 12) { - elk_inst_set_thread_control(p->devinfo, elk_last_inst, - options.thread_control); - elk_inst_set_no_dd_check(p->devinfo, elk_last_inst, - options.no_dd_check); - elk_inst_set_no_dd_clear(p->devinfo, elk_last_inst, - options.no_dd_clear); - } else { - elk_inst_set_swsb(p->devinfo, elk_last_inst, - tgl_swsb_encode(p->devinfo, options.depinfo)); - } + elk_inst_set_thread_control(p->devinfo, elk_last_inst, + options.thread_control); + elk_inst_set_no_dd_check(p->devinfo, elk_last_inst, + options.no_dd_check); + elk_inst_set_no_dd_clear(p->devinfo, elk_last_inst, + options.no_dd_clear); elk_inst_set_debug_control(p->devinfo, elk_last_inst, options.debug_control); if (p->devinfo->ver >= 6) diff --git a/src/intel/compiler/elk/elk_inst.h b/src/intel/compiler/elk/elk_inst.h index cd557f8ee3f..14cc71d008d 100644 --- a/src/intel/compiler/elk/elk_inst.h +++ b/src/intel/compiler/elk/elk_inst.h @@ -54,123 +54,29 @@ static inline void elk_inst_set_bits(elk_inst *inst, unsigned high, unsigned low, uint64_t value); -#define FC(name, hi4, lo4, hi12, lo12, assertions) \ +#define FC(name, hi4, lo4, assertions) \ static inline void \ elk_inst_set_##name(const struct intel_device_info *devinfo, \ elk_inst *inst, uint64_t v) \ { \ assert(assertions); \ - if (devinfo->ver >= 12) \ - elk_inst_set_bits(inst, hi12, lo12, v); \ - else \ - elk_inst_set_bits(inst, hi4, lo4, v); \ + elk_inst_set_bits(inst, hi4, lo4, v); \ } \ static inline uint64_t \ elk_inst_##name(const struct intel_device_info *devinfo, \ const elk_inst *inst) \ { \ assert(assertions); \ - if (devinfo->ver >= 12) \ - return elk_inst_bits(inst, hi12, lo12); \ - else \ - return elk_inst_bits(inst, hi4, lo4); \ + return elk_inst_bits(inst, hi4, lo4); \ } -/* A simple macro for fields which stay in the same place on all generations, - * except for Gfx12! - */ -#define F(name, hi4, lo4, hi12, lo12) FC(name, hi4, lo4, hi12, lo12, true) - -/* A simple macro for fields which stay in the same place on all generations, - * except for Gfx12 and Gfx20. - */ -#define F20(name, hi4, lo4, hi12, lo12, hi20, lo20) \ - static inline void \ - elk_inst_set_##name(const struct intel_device_info *devinfo, \ - elk_inst *inst, uint64_t v) \ - { \ - if (devinfo->ver >= 20) \ - elk_inst_set_bits(inst, hi20, lo20, v); \ - else if (devinfo->ver >= 12) \ - elk_inst_set_bits(inst, hi12, lo12, v); \ - else \ - elk_inst_set_bits(inst, hi4, lo4, v); \ - } \ - static inline uint64_t \ - elk_inst_##name(const struct intel_device_info *devinfo, \ - const elk_inst *inst) \ - { \ - if (devinfo->ver >= 20) \ - return elk_inst_bits(inst, hi20, lo20); \ - else if (devinfo->ver >= 12) \ - return elk_inst_bits(inst, hi12, lo12); \ - else \ - return elk_inst_bits(inst, hi4, lo4); \ - } - -#define FV20(name, hi4, lo4, hi12, lo12, hi20, lo20) \ - static inline void \ - elk_inst_set_##name(const struct intel_device_info *devinfo, \ - elk_inst *inst, uint64_t v) \ - { \ - if (devinfo->ver >= 20) \ - elk_inst_set_bits(inst, hi20, lo20, v & 0x7); \ - else if (devinfo->ver >= 12) \ - elk_inst_set_bits(inst, hi12, lo12, v); \ - else \ - elk_inst_set_bits(inst, hi4, lo4, v); \ - } \ - static inline uint64_t \ - elk_inst_##name(const struct intel_device_info *devinfo, \ - const elk_inst *inst) \ - { \ - if (devinfo->ver >= 20) \ - return elk_inst_bits(inst, hi20, lo20) == 0x7 ? 0xF : \ - elk_inst_bits(inst, hi20, lo20); \ - else if (devinfo->ver >= 12) \ - return elk_inst_bits(inst, hi12, lo12); \ - else \ - return elk_inst_bits(inst, hi4, lo4); \ - } - -#define FD20(name, hi4, lo4, hi12, lo12, hi20, lo20, zero20) \ - static inline void \ - elk_inst_set_##name(const struct intel_device_info *devinfo, \ - elk_inst *inst, uint64_t v) \ - { \ - if (devinfo->ver >= 20) { \ - elk_inst_set_bits(inst, hi20, lo20, v >> 1); \ - if (zero20 == -1) \ - assert((v & 1) == 0); \ - else \ - elk_inst_set_bits(inst, zero20, zero20, v & 1); \ - } else if (devinfo->ver >= 12) \ - elk_inst_set_bits(inst, hi12, lo12, v); \ - else \ - elk_inst_set_bits(inst, hi4, lo4, v); \ - } \ - static inline uint64_t \ - elk_inst_##name(const struct intel_device_info *devinfo, \ - const elk_inst *inst) \ - { \ - if (devinfo->ver >= 20) \ - return (elk_inst_bits(inst, hi20, lo20) << 1) | \ - (zero20 == -1 ? 0 : \ - elk_inst_bits(inst, zero20, zero20)); \ - else if (devinfo->ver >= 12) \ - return elk_inst_bits(inst, hi12, lo12); \ - else \ - return elk_inst_bits(inst, hi4, lo4); \ - } +/* A simple macro for fields which stay in the same place on all generations. */ +#define F(name, hi4, lo4) FC(name, hi4, lo4, true) #define BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, \ - hi7, lo7, hi8, lo8, hi12, lo12, hi20, lo20) \ + hi7, lo7, hi8, lo8) \ unsigned high, low; \ - if (devinfo->ver >= 20) { \ - high = hi20; low = lo20; \ - } else if (devinfo->ver >= 12) { \ - high = hi12; low = lo12; \ - } else if (devinfo->ver >= 8) { \ + if (devinfo->ver >= 8) { \ high = hi8; low = lo8; \ } else if (devinfo->ver >= 7) { \ high = hi7; low = lo7; \ @@ -190,285 +96,162 @@ elk_inst_##name(const struct intel_device_info *devinfo, \ * bits are identical, removing some of the inefficiency. */ #define FF(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, \ - hi7, lo7, hi8, lo8, hi12, lo12, hi20, lo20) \ + hi7, lo7, hi8, lo8) \ static inline void \ elk_inst_set_##name(const struct intel_device_info *devinfo, \ elk_inst *inst, uint64_t value) \ { \ BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, \ - hi7, lo7, hi8, lo8, hi12, lo12, hi20, lo20) \ + hi7, lo7, hi8, lo8) \ elk_inst_set_bits(inst, high, low, value); \ } \ static inline uint64_t \ elk_inst_##name(const struct intel_device_info *devinfo, const elk_inst *inst)\ { \ BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, \ - hi7, lo7, hi8, lo8, hi12, lo12, hi20, lo20) \ + hi7, lo7, hi8, lo8) \ return elk_inst_bits(inst, high, low); \ } /* A macro for fields which moved as of Gfx8+. */ -#define F8(name, gfx4_high, gfx4_low, gfx8_high, gfx8_low, \ - gfx12_high, gfx12_low) \ +#define F8(name, gfx4_high, gfx4_low, gfx8_high, gfx8_low) \ FF(name, \ /* 4: */ gfx4_high, gfx4_low, \ /* 4.5: */ gfx4_high, gfx4_low, \ /* 5: */ gfx4_high, gfx4_low, \ /* 6: */ gfx4_high, gfx4_low, \ /* 7: */ gfx4_high, gfx4_low, \ - /* 8: */ gfx8_high, gfx8_low, \ - /* 12: */ gfx12_high, gfx12_low, \ - /* 20: */ gfx12_high, gfx12_low); + /* 8: */ gfx8_high, gfx8_low); -/* Macro for fields that gained extra discontiguous MSBs in Gfx12 (specified - * by hi12ex-lo12ex). - */ -#define FFDC(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, \ - hi7, lo7, hi8, lo8, hi12ex, lo12ex, hi12, lo12, assertions) \ -static inline void \ -elk_inst_set_##name(const struct intel_device_info *devinfo, \ - elk_inst *inst, uint64_t value) \ -{ \ - assert(assertions); \ - if (devinfo->ver >= 12) { \ - const unsigned k = hi12 - lo12 + 1; \ - if (hi12ex != -1 && lo12ex != -1) \ - elk_inst_set_bits(inst, hi12ex, lo12ex, value >> k); \ - elk_inst_set_bits(inst, hi12, lo12, value & ((1ull << k) - 1)); \ - } else { \ - BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, \ - hi7, lo7, hi8, lo8, -1, -1, -1, -1); \ - elk_inst_set_bits(inst, high, low, value); \ - } \ -} \ -static inline uint64_t \ -elk_inst_##name(const struct intel_device_info *devinfo, const elk_inst *inst)\ -{ \ - assert(assertions); \ - if (devinfo->ver >= 12) { \ - const unsigned k = hi12 - lo12 + 1; \ - return (hi12ex == -1 || lo12ex == -1 ? 0 : \ - elk_inst_bits(inst, hi12ex, lo12ex) << k) | \ - elk_inst_bits(inst, hi12, lo12); \ - } else { \ - BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, \ - hi7, lo7, hi8, lo8, -1, -1, -1, -1); \ - return elk_inst_bits(inst, high, low); \ - } \ -} - -#define FD(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, \ - hi7, lo7, hi8, lo8, hi12ex, lo12ex, hi12, lo12) \ - FFDC(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, \ - hi7, lo7, hi8, lo8, hi12ex, lo12ex, hi12, lo12, true) - -/* Macro for fields that didn't move across generations until Gfx12, and then - * gained extra discontiguous bits. - */ -#define FDC(name, hi4, lo4, hi12ex, lo12ex, hi12, lo12, assertions) \ - FFDC(name, hi4, lo4, hi4, lo4, hi4, lo4, hi4, lo4, \ - hi4, lo4, hi4, lo4, hi12ex, lo12ex, hi12, lo12, assertions) - - -/* Macro for the 2-bit register file field, which on Gfx12+ is stored as the - * variable length combination of an IsImm (hi12) bit and an additional file - * (lo12) bit. - */ -#define FI(name, hi4, lo4, hi8, lo8, hi12, lo12) \ -static inline void \ -elk_inst_set_##name(const struct intel_device_info *devinfo, \ - elk_inst *inst, uint64_t value) \ -{ \ - if (devinfo->ver >= 12) { \ - elk_inst_set_bits(inst, hi12, hi12, value >> 1); \ - if ((value >> 1) == 0) \ - elk_inst_set_bits(inst, lo12, lo12, value & 1); \ - } else { \ - BOUNDS(hi4, lo4, hi4, lo4, hi4, lo4, hi4, lo4, \ - hi4, lo4, hi8, lo8, -1, -1, -1, -1); \ - elk_inst_set_bits(inst, high, low, value); \ - } \ -} \ -static inline uint64_t \ -elk_inst_##name(const struct intel_device_info *devinfo, const elk_inst *inst)\ -{ \ - if (devinfo->ver >= 12) { \ - return (elk_inst_bits(inst, hi12, hi12) << 1) | \ - (elk_inst_bits(inst, hi12, hi12) == 0 ? \ - elk_inst_bits(inst, lo12, lo12) : 1); \ - } else { \ - BOUNDS(hi4, lo4, hi4, lo4, hi4, lo4, hi4, lo4, \ - hi4, lo4, hi8, lo8, -1, -1, -1, -1); \ - return elk_inst_bits(inst, high, low); \ - } \ -} - -/* Macro for fields that become a constant in Gfx12+ not actually represented - * in the instruction. - */ -#define FK(name, hi4, lo4, const12) \ -static inline void \ -elk_inst_set_##name(const struct intel_device_info *devinfo, \ - elk_inst *inst, uint64_t v) \ -{ \ - if (devinfo->ver >= 12) \ - assert(v == (const12)); \ - else \ - elk_inst_set_bits(inst, hi4, lo4, v); \ -} \ -static inline uint64_t \ -elk_inst_##name(const struct intel_device_info *devinfo, \ - const elk_inst *inst) \ -{ \ - if (devinfo->ver >= 12) \ - return (const12); \ - else \ - return elk_inst_bits(inst, hi4, lo4); \ -} - -FV20(src1_vstride, /* 4+ */ 120, 117, /* 12+ */ 119, 116, /* 20+ */ 118, 116) -F(src1_width, /* 4+ */ 116, 114, /* 12+ */ 115, 113) -F(src1_da16_swiz_w, /* 4+ */ 115, 114, /* 12+ */ -1, -1) -F(src1_da16_swiz_z, /* 4+ */ 113, 112, /* 12+ */ -1, -1) -F(src1_hstride, /* 4+ */ 113, 112, /* 12+ */ 97, 96) -F(src1_address_mode, /* 4+ */ 111, 111, /* 12+ */ 112, 112) +F(src1_vstride, /* 4+ */ 120, 117) +F(src1_width, /* 4+ */ 116, 114) +F(src1_da16_swiz_w, /* 4+ */ 115, 114) +F(src1_da16_swiz_z, /* 4+ */ 113, 112) +F(src1_hstride, /* 4+ */ 113, 112) +F(src1_address_mode, /* 4+ */ 111, 111) /** Src1.SrcMod @{ */ -F(src1_negate, /* 4+ */ 110, 110, /* 12+ */ 121, 121) -F(src1_abs, /* 4+ */ 109, 109, /* 12+ */ 120, 120) +F(src1_negate, /* 4+ */ 110, 110) +F(src1_abs, /* 4+ */ 109, 109) /** @} */ -F8(src1_ia_subreg_nr, /* 4+ */ 108, 106, /* 8+ */ 108, 105, /* 12+ */ 111, 108) -F(src1_da_reg_nr, /* 4+ */ 108, 101, /* 12+ */ 111, 104) -F(src1_da16_subreg_nr, /* 4+ */ 100, 100, /* 12+ */ -1, -1) -FD20(src1_da1_subreg_nr, /* 4+ */ 100, 96, /* 12+ */ 103, 99, /* 20+ */ 103, 99, -1) -F(src1_da16_swiz_y, /* 4+ */ 99, 98, /* 12+ */ -1, -1) -F(src1_da16_swiz_x, /* 4+ */ 97, 96, /* 12+ */ -1, -1) -F8(src1_reg_hw_type, /* 4+ */ 46, 44, /* 8+ */ 94, 91, /* 12+ */ 91, 88) -FI(src1_reg_file, /* 4+ */ 43, 42, /* 8+ */ 90, 89, /* 12+ */ 47, 98) -F(src1_is_imm, /* 4+ */ -1, -1, /* 12+ */ 47, 47) -FV20(src0_vstride, /* 4+ */ 88, 85, /* 12+ */ 87, 84, /* 20+ */ 86, 84) -F(src0_width, /* 4+ */ 84, 82, /* 12+ */ 83, 81) -F(src0_da16_swiz_w, /* 4+ */ 83, 82, /* 12+ */ -1, -1) -F(src0_da16_swiz_z, /* 4+ */ 81, 80, /* 12+ */ -1, -1) -F(src0_hstride, /* 4+ */ 81, 80, /* 12+ */ 65, 64) -F(src0_address_mode, /* 4+ */ 79, 79, /* 12+ */ 80, 80) +F8(src1_ia_subreg_nr, /* 4+ */ 108, 106, /* 8+ */ 108, 105) +F(src1_da_reg_nr, /* 4+ */ 108, 101) +F(src1_da16_subreg_nr, /* 4+ */ 100, 100) +F(src1_da1_subreg_nr, /* 4+ */ 100, 96) +F(src1_da16_swiz_y, /* 4+ */ 99, 98) +F(src1_da16_swiz_x, /* 4+ */ 97, 96) +F8(src1_reg_hw_type, /* 4+ */ 46, 44, /* 8+ */ 94, 91) +F8(src1_reg_file, /* 4+ */ 43, 42, /* 8+ */ 90, 89) +F(src0_vstride, /* 4+ */ 88, 85) +F(src0_width, /* 4+ */ 84, 82) +F(src0_da16_swiz_w, /* 4+ */ 83, 82) +F(src0_da16_swiz_z, /* 4+ */ 81, 80) +F(src0_hstride, /* 4+ */ 81, 80) +F(src0_address_mode, /* 4+ */ 79, 79) /** Src0.SrcMod @{ */ -F(src0_negate, /* 4+ */ 78, 78, /* 12+ */ 45, 45) -F(src0_abs, /* 4+ */ 77, 77, /* 12+ */ 44, 44) +F(src0_negate, /* 4+ */ 78, 78) +F(src0_abs, /* 4+ */ 77, 77) /** @} */ -F8(src0_ia_subreg_nr, /* 4+ */ 76, 74, /* 8+ */ 76, 73, /* 12+ */ 79, 76) -F(src0_da_reg_nr, /* 4+ */ 76, 69, /* 12+ */ 79, 72) -F(src0_da16_subreg_nr, /* 4+ */ 68, 68, /* 12+ */ -1, -1) -FD20(src0_da1_subreg_nr, /* 4+ */ 68, 64, /* 12+ */ 71, 67, /* 20+ */ 71, 67, 87) -F(src0_da16_swiz_y, /* 4+ */ 67, 66, /* 12+ */ -1, -1) -F(src0_da16_swiz_x, /* 4+ */ 65, 64, /* 12+ */ -1, -1) -F(dst_address_mode, /* 4+ */ 63, 63, /* 12+ */ 35, 35) -F(dst_hstride, /* 4+ */ 62, 61, /* 12+ */ 49, 48) -F8(dst_ia_subreg_nr, /* 4+ */ 60, 58, /* 8+ */ 60, 57, /* 12+ */ 63, 60) -F(dst_da_reg_nr, /* 4+ */ 60, 53, /* 12+ */ 63, 56) -F(dst_da16_subreg_nr, /* 4+ */ 52, 52, /* 12+ */ -1, -1) -FD20(dst_da1_subreg_nr, /* 4+ */ 52, 48, /* 12+ */ 55, 51, /* 20+ */ 55, 51, 33) -F(da16_writemask, /* 4+ */ 51, 48, /* 12+ */ -1, -1) /* Dst.ChanEn */ -F8(src0_reg_hw_type, /* 4+ */ 41, 39, /* 8+ */ 46, 43, /* 12+ */ 43, 40) -FI(src0_reg_file, /* 4+ */ 38, 37, /* 8+ */ 42, 41, /* 12+ */ 46, 66) -F(src0_is_imm, /* 4+ */ -1, -1, /* 12+ */ 46, 46) -F8(dst_reg_hw_type, /* 4+ */ 36, 34, /* 8+ */ 40, 37, /* 12+ */ 39, 36) -F8(dst_reg_file, /* 4+ */ 33, 32, /* 8+ */ 36, 35, /* 12+ */ 50, 50) -F8(mask_control, /* 4+ */ 9, 9, /* 8+ */ 34, 34, /* 12+ */ 31, 31) +F8(src0_ia_subreg_nr, /* 4+ */ 76, 74, /* 8+ */ 76, 73) +F(src0_da_reg_nr, /* 4+ */ 76, 69) +F(src0_da16_subreg_nr, /* 4+ */ 68, 68) +F(src0_da1_subreg_nr, /* 4+ */ 68, 64) +F(src0_da16_swiz_y, /* 4+ */ 67, 66) +F(src0_da16_swiz_x, /* 4+ */ 65, 64) +F(dst_address_mode, /* 4+ */ 63, 63) +F(dst_hstride, /* 4+ */ 62, 61) +F8(dst_ia_subreg_nr, /* 4+ */ 60, 58, /* 8+ */ 60, 57) +F(dst_da_reg_nr, /* 4+ */ 60, 53) +F(dst_da16_subreg_nr, /* 4+ */ 52, 52) +F(dst_da1_subreg_nr, /* 4+ */ 52, 48) +F(da16_writemask, /* 4+ */ 51, 48) /* Dst.ChanEn */ +F8(src0_reg_hw_type, /* 4+ */ 41, 39, /* 8+ */ 46, 43) +F8(src0_reg_file, /* 4+ */ 38, 37, /* 8+ */ 42, 41) +F(src0_is_imm, /* 4+ */ -1, -1) +F8(dst_reg_hw_type, /* 4+ */ 36, 34, /* 8+ */ 40, 37) +F8(dst_reg_file, /* 4+ */ 33, 32, /* 8+ */ 36, 35) +F8(mask_control, /* 4+ */ 9, 9, /* 8+ */ 34, 34) FF(flag_reg_nr, /* 4-6: doesn't exist */ -1, -1, -1, -1, -1, -1, -1, -1, /* 7: */ 90, 90, - /* 8: */ 33, 33, - /* 12: */ 23, 23, - /* 20: */ 23, 22) -FF(flag_subreg_nr, - /* 4-7: */ 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, - /* 8: */ 32, 32, - /* 12: */ 22, 22, - /* 20: */ 21, 21) -F(saturate, /* 4+ */ 31, 31, /* 12+ */ 34, 34) -F(debug_control, /* 4+ */ 30, 30, /* 12+ */ 30, 30) -F(cmpt_control, /* 4+ */ 29, 29, /* 12+ */ 29, 29) -FC(branch_control, /* 4+ */ 28, 28, /* 12+ */ 33, 33, devinfo->ver >= 8) -FC(acc_wr_control, /* 4+ */ 28, 28, /* 12+ */ 33, 33, devinfo->ver >= 6 && devinfo->ver < 20) -FC(mask_control_ex, /* 4+ */ 28, 28, /* 12+ */ -1, -1, devinfo->verx10 == 45 || - devinfo->ver == 5) -F(cond_modifier, /* 4+ */ 27, 24, /* 12+ */ 95, 92) -FC(math_function, /* 4+ */ 27, 24, /* 12+ */ 95, 92, devinfo->ver >= 6) -F20(exec_size, /* 4+ */ 23, 21, /* 12+ */ 18, 16, /* 20+ */ 20, 18) -F(pred_inv, /* 4+ */ 20, 20, /* 12+ */ 28, 28) -F20(pred_control, /* 4+ */ 19, 16, /* 12+ */ 27, 24, /* 20+ */ 27, 26) -F(thread_control, /* 4+ */ 15, 14, /* 12+ */ -1, -1) -F(atomic_control, /* 4+ */ -1, -1, /* 12+ */ 32, 32) -F20(qtr_control, /* 4+ */ 13, 12, /* 12+ */ 21, 20, /* 20+ */ 25, 24) + /* 8: */ 33, 33) +F8(flag_subreg_nr, /* 4+ */ 89, 89, /* 8+ */ 32, 32) +F(saturate, /* 4+ */ 31, 31) +F(debug_control, /* 4+ */ 30, 30) +F(cmpt_control, /* 4+ */ 29, 29) +FC(branch_control, /* 4+ */ 28, 28, devinfo->ver >= 8) +FC(acc_wr_control, /* 4+ */ 28, 28, devinfo->ver >= 6) +FC(mask_control_ex, /* 4+ */ 28, 28, devinfo->verx10 == 45 || + devinfo->ver == 5) +F(cond_modifier, /* 4+ */ 27, 24) +FC(math_function, /* 4+ */ 27, 24, devinfo->ver >= 6) +F(exec_size, /* 4+ */ 23, 21) +F(pred_inv, /* 4+ */ 20, 20) +F(pred_control, /* 4+ */ 19, 16) +F(thread_control, /* 4+ */ 15, 14) +F(atomic_control, /* 4+ */ -1, -1) +F(qtr_control, /* 4+ */ 13, 12) FF(nib_control, /* 4-6: doesn't exist */ -1, -1, -1, -1, -1, -1, -1, -1, /* 7: */ 47, 47, - /* 8: */ 11, 11, - /* 12: */ 19, 19, - /* 20: */ -1, -1) -F8(no_dd_check, /* 4+ */ 11, 11, /* 8+ */ 10, 10, /* 12+ */ -1, -1) -F8(no_dd_clear, /* 4+ */ 10, 10, /* 8+ */ 9, 9, /* 12+ */ -1, -1) -F20(swsb, /* 4+ */ -1, -1, /* 12+ */ 15, 8, /* 20+ */ 17, 8) -FK(access_mode, /* 4+ */ 8, 8, /* 12+ */ ELK_ALIGN_1) + /* 8: */ 11, 11); +F8(no_dd_check, /* 4+ */ 11, 11, /* 8+ */ 10, 10) +F8(no_dd_clear, /* 4+ */ 10, 10, /* 8+ */ 9, 9) +F(access_mode, /* 4+ */ 8, 8) /* Bit 7 is Reserved (for future Opcode expansion) */ -F(hw_opcode, /* 4+ */ 6, 0, /* 12+ */ 6, 0) +F(hw_opcode, /* 4+ */ 6, 0) /** * Three-source instructions: * @{ */ -F(3src_src2_reg_nr, /* 4+ */ 125, 118, /* 12+ */ 127, 120) /* same in align1 */ -F(3src_a16_src2_subreg_nr, /* 4+ */ 117, 115, /* 12+ */ -1, -1) /* Extra discontiguous bit on CHV? */ -F(3src_a16_src2_swizzle, /* 4+ */ 114, 107, /* 12+ */ -1, -1) -F(3src_a16_src2_rep_ctrl, /* 4+ */ 106, 106, /* 12+ */ -1, -1) -F(3src_src1_reg_nr, /* 4+ */ 104, 97, /* 12+ */ 111, 104) /* same in align1 */ -F(3src_a16_src1_subreg_nr, /* 4+ */ 96, 94, /* 12+ */ -1, -1) /* Extra discontiguous bit on CHV? */ -F(3src_a16_src1_swizzle, /* 4+ */ 93, 86, /* 12+ */ -1, -1) -F(3src_a16_src1_rep_ctrl, /* 4+ */ 85, 85, /* 12+ */ -1, -1) -F(3src_src0_reg_nr, /* 4+ */ 83, 76, /* 12+ */ 79, 72) /* same in align1 */ -F(3src_a16_src0_subreg_nr, /* 4+ */ 75, 73, /* 12+ */ -1, -1) /* Extra discontiguous bit on CHV? */ -F(3src_a16_src0_swizzle, /* 4+ */ 72, 65, /* 12+ */ -1, -1) -F(3src_a16_src0_rep_ctrl, /* 4+ */ 64, 64, /* 12+ */ -1, -1) -F(3src_dst_reg_nr, /* 4+ */ 63, 56, /* 12+ */ 63, 56) /* same in align1 */ -F(3src_a16_dst_subreg_nr, /* 4+ */ 55, 53, /* 12+ */ -1, -1) -F(3src_a16_dst_writemask, /* 4+ */ 52, 49, /* 12+ */ -1, -1) -F8(3src_a16_nib_ctrl, /* 4+ */ 47, 47, /* 8+ */ 11, 11, /* 12+ */ -1, -1) /* only exists on IVB+ */ -F8(3src_a16_dst_hw_type, /* 4+ */ 45, 44, /* 8+ */ 48, 46, /* 12+ */ -1, -1) /* only exists on IVB+ */ -F8(3src_a16_src_hw_type, /* 4+ */ 43, 42, /* 8+ */ 45, 43, /* 12+ */ -1, -1) -F8(3src_src2_negate, /* 4+ */ 41, 41, /* 8+ */ 42, 42, /* 12+ */ 85, 85) -F8(3src_src2_abs, /* 4+ */ 40, 40, /* 8+ */ 41, 41, /* 12+ */ 84, 84) -F8(3src_src1_negate, /* 4+ */ 39, 39, /* 8+ */ 40, 40, /* 12+ */ 87, 87) -F8(3src_src1_abs, /* 4+ */ 38, 38, /* 8+ */ 39, 39, /* 12+ */ 86, 86) -F8(3src_src0_negate, /* 4+ */ 37, 37, /* 8+ */ 38, 38, /* 12+ */ 45, 45) -F8(3src_src0_abs, /* 4+ */ 36, 36, /* 8+ */ 37, 37, /* 12+ */ 44, 44) -F8(3src_a16_src1_type, /* 4+ */ -1, -1, /* 8+ */ 36, 36, /* 12+ */ -1, -1) -F8(3src_a16_src2_type, /* 4+ */ -1, -1, /* 8+ */ 35, 35, /* 12+ */ -1, -1) -F8(3src_a16_flag_reg_nr, /* 4+ */ 34, 34, /* 8+ */ 33, 33, /* 12+ */ -1, -1) -F8(3src_a16_flag_subreg_nr, /* 4+ */ 33, 33, /* 8+ */ 32, 32, /* 12+ */ -1, -1) +F(3src_src2_reg_nr, /* 4+ */ 125, 118) /* same in align1 */ +F(3src_a16_src2_subreg_nr, /* 4+ */ 117, 115) /* Extra discontiguous bit on CHV? */ +F(3src_a16_src2_swizzle, /* 4+ */ 114, 107) +F(3src_a16_src2_rep_ctrl, /* 4+ */ 106, 106) +F(3src_src1_reg_nr, /* 4+ */ 104, 97) /* same in align1 */ +F(3src_a16_src1_subreg_nr, /* 4+ */ 96, 94) /* Extra discontiguous bit on CHV? */ +F(3src_a16_src1_swizzle, /* 4+ */ 93, 86) +F(3src_a16_src1_rep_ctrl, /* 4+ */ 85, 85) +F(3src_src0_reg_nr, /* 4+ */ 83, 76) /* same in align1 */ +F(3src_a16_src0_subreg_nr, /* 4+ */ 75, 73) /* Extra discontiguous bit on CHV? */ +F(3src_a16_src0_swizzle, /* 4+ */ 72, 65) +F(3src_a16_src0_rep_ctrl, /* 4+ */ 64, 64) +F(3src_dst_reg_nr, /* 4+ */ 63, 56) /* same in align1 */ +F(3src_a16_dst_subreg_nr, /* 4+ */ 55, 53) +F(3src_a16_dst_writemask, /* 4+ */ 52, 49) +F8(3src_a16_nib_ctrl, /* 4+ */ 47, 47, /* 8+ */ 11, 11) /* only exists on IVB+ */ +F8(3src_a16_dst_hw_type, /* 4+ */ 45, 44, /* 8+ */ 48, 46) /* only exists on IVB+ */ +F8(3src_a16_src_hw_type, /* 4+ */ 43, 42, /* 8+ */ 45, 43) +F8(3src_src2_negate, /* 4+ */ 41, 41, /* 8+ */ 42, 42) +F8(3src_src2_abs, /* 4+ */ 40, 40, /* 8+ */ 41, 41) +F8(3src_src1_negate, /* 4+ */ 39, 39, /* 8+ */ 40, 40) +F8(3src_src1_abs, /* 4+ */ 38, 38, /* 8+ */ 39, 39) +F8(3src_src0_negate, /* 4+ */ 37, 37, /* 8+ */ 38, 38) +F8(3src_src0_abs, /* 4+ */ 36, 36, /* 8+ */ 37, 37) +F8(3src_a16_src1_type, /* 4+ */ -1, -1, /* 8+ */ 36, 36) +F8(3src_a16_src2_type, /* 4+ */ -1, -1, /* 8+ */ 35, 35) +F8(3src_a16_flag_reg_nr, /* 4+ */ 34, 34, /* 8+ */ 33, 33) +F8(3src_a16_flag_subreg_nr, /* 4+ */ 33, 33, /* 8+ */ 32, 32) FF(3src_a16_dst_reg_file, /* 4-5: doesn't exist - no 3-source instructions */ -1, -1, -1, -1, -1, -1, /* 6: */ 32, 32, - /* 7-8: doesn't exist - no MRFs */ -1, -1, -1, -1, - /* 12: */ -1, -1, - /* 20: */ -1, -1) -F(3src_saturate, /* 4+ */ 31, 31, /* 12+ */ 34, 34) -F(3src_debug_control, /* 4+ */ 30, 30, /* 12+ */ 30, 30) -F(3src_cmpt_control, /* 4+ */ 29, 29, /* 12+ */ 29, 29) -FC(3src_acc_wr_control, /* 4+ */ 28, 28, /* 12+ */ 33, 33, devinfo->ver < 20) -F(3src_cond_modifier, /* 4+ */ 27, 24, /* 12+ */ 95, 92) -F(3src_exec_size, /* 4+ */ 23, 21, /* 12+ */ 18, 16) -F(3src_pred_inv, /* 4+ */ 20, 20, /* 12+ */ 28, 28) -F20(3src_pred_control, /* 4+ */ 19, 16, /* 12+ */ 27, 24, /* 20+ */ 27, 26) -F(3src_thread_control, /* 4+ */ 15, 14, /* 12+ */ -1, -1) -F(3src_atomic_control, /* 4+ */ -1, -1, /* 12+ */ 32, 32) -F20(3src_qtr_control, /* 4+ */ 13, 12, /* 12+ */ 21, 20, /* 20+ */ 25, 24) -F8(3src_no_dd_check, /* 4+ */ 11, 11, /* 8+ */ 10, 10, /* 12+ */ -1, -1) -F8(3src_no_dd_clear, /* 4+ */ 10, 10, /* 8+ */ 9, 9, /* 12+ */ -1, -1) -F8(3src_mask_control, /* 4+ */ 9, 9, /* 8+ */ 34, 34, /* 12+ */ 31, 31) -FK(3src_access_mode, /* 4+ */ 8, 8, /* 12+ */ ELK_ALIGN_1) -F(3src_swsb, /* 4+ */ -1, -1, /* 12+ */ 15, 8) + /* 7-8: doesn't exist - no MRFs */ -1, -1, -1, -1) +F(3src_saturate, /* 4+ */ 31, 31) +F(3src_debug_control, /* 4+ */ 30, 30) +F(3src_cmpt_control, /* 4+ */ 29, 29) +F(3src_acc_wr_control, /* 4+ */ 28, 28) +F(3src_cond_modifier, /* 4+ */ 27, 24) +F(3src_exec_size, /* 4+ */ 23, 21) +F(3src_pred_inv, /* 4+ */ 20, 20) +F(3src_pred_control, /* 4+ */ 19, 16) +F(3src_thread_control, /* 4+ */ 15, 14) +F(3src_qtr_control, /* 4+ */ 13, 12) +F8(3src_no_dd_check, /* 4+ */ 11, 11, /* 8+ */ 10, 10) +F8(3src_no_dd_clear, /* 4+ */ 10, 10, /* 8+ */ 9, 9) +F8(3src_mask_control, /* 4+ */ 9, 9, /* 8+ */ 34, 34) +F(3src_access_mode, /* 4+ */ 8, 8) /* Bit 7 is Reserved (for future Opcode expansion) */ -F(3src_hw_opcode, /* 4+ */ 6, 0, /* 12+ */ 6, 0) +F(3src_hw_opcode, /* 4+ */ 6, 0) /** @} */ #define REG_TYPE(reg) \ @@ -496,124 +279,11 @@ REG_TYPE(src) * Three-source align1 instructions: * @{ */ -/* Reserved 127:126 */ -/* src2_reg_nr same in align16 */ -FD20(3src_a1_src2_subreg_nr,/* 4+ */ 117, 113, /* 12+ */ 119, 115, /* 20+ */ 119, 115, -1) -FC(3src_a1_src2_hstride, /* 4+ */ 112, 111, /* 12+ */ 113, 112, devinfo->ver >= 10) -/* Reserved 110:109. src2 vstride is an implied parameter */ -FC(3src_a1_src2_hw_type, /* 4+ */ 108, 106, /* 12+ */ 82, 80, devinfo->ver >= 10) -/* Reserved 105 */ -/* src1_reg_nr same in align16 */ -FD20(3src_a1_src1_subreg_nr, /* 4+ */ 96, 92, /* 12+ */ 103, 99, /* 20+ */ 103, 99, -1) -FC(3src_a1_src1_hstride, /* 4+ */ 91, 90, /* 12+ */ 97, 96, devinfo->ver >= 10) -FDC(3src_a1_src1_vstride, /* 4+ */ 89, 88, /* 12+ */ 91, 91, 83, 83, devinfo->ver >= 10) -FC(3src_a1_src1_hw_type, /* 4+ */ 87, 85, /* 12+ */ 90, 88, devinfo->ver >= 10) -/* Reserved 84 */ -/* src0_reg_nr same in align16 */ -FD20(3src_a1_src0_subreg_nr, /* 4+ */ 75, 71, /* 12+ */ 71, 67, /* 20+ */ 71, 67, -1) -FC(3src_a1_src0_hstride, /* 4+ */ 70, 69, /* 12+ */ 65, 64, devinfo->ver >= 10) -FDC(3src_a1_src0_vstride, /* 4+ */ 68, 67, /* 12+ */ 43, 43, 35, 35, devinfo->ver >= 10) -FC(3src_a1_src0_hw_type, /* 4+ */ 66, 64, /* 12+ */ 42, 40, devinfo->ver >= 10) -/* dst_reg_nr same in align16 */ -FC(3src_a1_dst_subreg_nr, /* 4+ */ 55, 54, /* 12+ */ 55, 54, devinfo->ver >= 10) -FC(3src_a1_special_acc, /* 4+ */ 55, 52, /* 12+ */ 54, 51, devinfo->ver >= 10) /* aliases dst_subreg_nr */ -/* Reserved 51:50 */ -FC(3src_a1_dst_hstride, /* 4+ */ 49, 49, /* 12+ */ 48, 48, devinfo->ver >= 10) -FC(3src_a1_dst_hw_type, /* 4+ */ 48, 46, /* 12+ */ 38, 36, devinfo->ver >= 10) -FI(3src_a1_src2_reg_file, /* 4+ */ -1, -1, /* 8+ */ 45, 45, /* 12+ */ 47, 114) -FC(3src_a1_src1_reg_file, /* 4+ */ 44, 44, /* 12+ */ 98, 98, devinfo->ver >= 10) -FI(3src_a1_src0_reg_file, /* 4+ */ -1, -1, /* 8+ */ 43, 43, /* 12+ */ 46, 66) +F(3src_a1_src2_subreg_nr, /* 4+ */ 117, 113) +F(3src_a1_src1_subreg_nr, /* 4+ */ 96, 92) +F(3src_a1_src0_subreg_nr, /* 4+ */ 75, 71) +F8(3src_a1_src2_reg_file, /* 4+ */ -1, -1, /* 8+ */ 45, 45) -F(3src_a1_src2_is_imm, /* 4+ */ -1, -1, /* 12+ */ 47, 47) -F(3src_a1_src0_is_imm, /* 4+ */ -1, -1, /* 12+ */ 46, 46) - -/* Source Modifier fields same in align16 */ -FC(3src_a1_dst_reg_file, /* 4+ */ 36, 36, /* 12+ */ 50, 50, devinfo->ver >= 10) -FC(3src_a1_exec_type, /* 4+ */ 35, 35, /* 12+ */ 39, 39, devinfo->ver >= 10) -/* Fields below this same in align16 */ -/** @} */ - -#define REG_TYPE(reg) \ -static inline void \ -elk_inst_set_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ - elk_inst *inst, enum elk_reg_type type) \ -{ \ - UNUSED enum gfx10_align1_3src_exec_type exec_type = \ - (enum gfx10_align1_3src_exec_type) elk_inst_3src_a1_exec_type(devinfo, \ - inst); \ - if (elk_reg_type_is_floating_point(type)) { \ - assert(exec_type == ELK_ALIGN1_3SRC_EXEC_TYPE_FLOAT); \ - } else { \ - assert(exec_type == ELK_ALIGN1_3SRC_EXEC_TYPE_INT); \ - } \ - unsigned hw_type = elk_reg_type_to_a1_hw_3src_type(devinfo, type); \ - elk_inst_set_3src_a1_##reg##_hw_type(devinfo, inst, hw_type); \ -} \ - \ -static inline enum elk_reg_type \ -elk_inst_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ - const elk_inst *inst) \ -{ \ - enum gfx10_align1_3src_exec_type exec_type = \ - (enum gfx10_align1_3src_exec_type) elk_inst_3src_a1_exec_type(devinfo, \ - inst); \ - unsigned hw_type = elk_inst_3src_a1_##reg##_hw_type(devinfo, inst); \ - return elk_a1_hw_3src_type_to_reg_type(devinfo, hw_type, exec_type); \ -} - -REG_TYPE(dst) -REG_TYPE(src0) -REG_TYPE(src1) -REG_TYPE(src2) -#undef REG_TYPE - -/** - * Three-source align1 instruction immediates: - * @{ - */ -static inline uint16_t -elk_inst_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, - const elk_inst *insn) -{ - assert(devinfo->ver >= 10); - if (devinfo->ver >= 12) - return elk_inst_bits(insn, 79, 64); - else - return elk_inst_bits(insn, 82, 67); -} - -static inline uint16_t -elk_inst_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, - const elk_inst *insn) -{ - assert(devinfo->ver >= 10); - if (devinfo->ver >= 12) - return elk_inst_bits(insn, 127, 112); - else - return elk_inst_bits(insn, 124, 109); -} - -static inline void -elk_inst_set_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, - elk_inst *insn, uint16_t value) -{ - assert(devinfo->ver >= 10); - if (devinfo->ver >= 12) - elk_inst_set_bits(insn, 79, 64, value); - else - elk_inst_set_bits(insn, 82, 67, value); -} - -static inline void -elk_inst_set_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, - elk_inst *insn, uint16_t value) -{ - assert(devinfo->ver >= 10); - if (devinfo->ver >= 12) - elk_inst_set_bits(insn, 127, 112, value); - else - elk_inst_set_bits(insn, 124, 109, value); -} /** @} */ /** @@ -626,9 +296,6 @@ elk_inst_set_uip(const struct intel_device_info *devinfo, { assert(devinfo->ver >= 6); - if (devinfo->ver >= 12) - elk_inst_set_src1_is_imm(devinfo, inst, 1); - if (devinfo->ver >= 8) { elk_inst_set_bits(inst, 95, 64, (uint32_t)value); } else { @@ -656,9 +323,6 @@ elk_inst_set_jip(const struct intel_device_info *devinfo, { assert(devinfo->ver >= 6); - if (devinfo->ver >= 12) - elk_inst_set_src0_is_imm(devinfo, inst, 1); - if (devinfo->ver >= 8) { elk_inst_set_bits(inst, 127, 96, (uint32_t)value); } else { @@ -699,23 +363,14 @@ elk_inst_##name(const struct intel_device_info *devinfo, const elk_inst *inst)\ FJ(gfx6_jump_count, 63, 48, devinfo->ver == 6) FJ(gfx4_jump_count, 111, 96, devinfo->ver < 6) -FC(gfx4_pop_count, /* 4+ */ 115, 112, /* 12+ */ -1, -1, devinfo->ver < 6) +FC(gfx4_pop_count, /* 4+ */ 115, 112, devinfo->ver < 6) /** @} */ /** * SEND instructions: * @{ */ -FC(send_ex_desc_ia_subreg_nr, /* 4+ */ 82, 80, /* 12+ */ 42, 40, devinfo->ver >= 9) -FC(send_src0_address_mode, /* 4+ */ 79, 79, /* 12+ */ -1, -1, devinfo->ver >= 9) -FC(send_sel_reg32_desc, /* 4+ */ 77, 77, /* 12+ */ 48, 48, devinfo->ver >= 9) -FC(send_sel_reg32_ex_desc, /* 4+ */ 61, 61, /* 12+ */ 49, 49, devinfo->ver >= 9) -F8(send_src0_reg_file, /* 4+ */ 38, 37, /* 8+ */ 42, 41, /* 12+ */ 66, 66) -FC(send_src1_reg_nr, /* 4+ */ 51, 44, /* 12+ */ 111, 104, devinfo->ver >= 9) -FC(send_src1_len, /* 4+ */ -1, -1, /* 12+ */ 103, 99, devinfo->verx10 >= 125) -FC(send_src1_reg_file, /* 4+ */ 36, 36, /* 12+ */ 98, 98, devinfo->ver >= 9) -FC(send_dst_reg_file, /* 4+ */ 35, 35, /* 12+ */ 50, 50, devinfo->ver >= 9) -FC(send_ex_bso, /* 4+ */ -1, -1, /* 12+ */ 39, 39, devinfo->verx10 >= 125) +F8(send_src0_reg_file, /* 4+ */ 38, 37, /* 8+ */ 42, 41) /** @} */ /* Message descriptor bits */ @@ -739,16 +394,7 @@ static inline void elk_inst_set_send_desc(const struct intel_device_info *devinfo, elk_inst *inst, uint32_t value) { - if (devinfo->ver >= 12) { - elk_inst_set_bits(inst, 123, 122, GET_BITS(value, 31, 30)); - elk_inst_set_bits(inst, 71, 67, GET_BITS(value, 29, 25)); - elk_inst_set_bits(inst, 55, 51, GET_BITS(value, 24, 20)); - elk_inst_set_bits(inst, 121, 113, GET_BITS(value, 19, 11)); - elk_inst_set_bits(inst, 91, 81, GET_BITS(value, 10, 0)); - } else if (devinfo->ver >= 9) { - elk_inst_set_bits(inst, 126, 96, value); - assert(value >> 31 == 0); - } else if (devinfo->ver >= 5) { + if (devinfo->ver >= 5) { elk_inst_set_bits(inst, 124, 96, value); assert(value >> 29 == 0); } else { @@ -766,148 +412,62 @@ static inline uint32_t elk_inst_send_desc(const struct intel_device_info *devinfo, const elk_inst *inst) { - if (devinfo->ver >= 12) { - return (elk_inst_bits(inst, 123, 122) << 30 | - elk_inst_bits(inst, 71, 67) << 25 | - elk_inst_bits(inst, 55, 51) << 20 | - elk_inst_bits(inst, 121, 113) << 11 | - elk_inst_bits(inst, 91, 81)); - } else if (devinfo->ver >= 9) { - return elk_inst_bits(inst, 126, 96); - } else if (devinfo->ver >= 5) { + if (devinfo->ver >= 5) { return elk_inst_bits(inst, 124, 96); } else { return elk_inst_bits(inst, 119, 96); } } -/** - * Set the SEND(C) message extended descriptor immediate. - * - * This doesn't include the SFID nor the EOT field that were considered to be - * part of the extended message descriptor by some versions of the BSpec, - * because they are present in the instruction even if the extended message - * descriptor is provided indirectly in a register, so we want to specify them - * separately. - */ -static inline void -elk_inst_set_send_ex_desc(const struct intel_device_info *devinfo, - elk_inst *inst, uint32_t value) -{ - if (devinfo->ver >= 12) { - elk_inst_set_bits(inst, 127, 124, GET_BITS(value, 31, 28)); - elk_inst_set_bits(inst, 97, 96, GET_BITS(value, 27, 26)); - elk_inst_set_bits(inst, 65, 64, GET_BITS(value, 25, 24)); - elk_inst_set_bits(inst, 47, 35, GET_BITS(value, 23, 11)); - elk_inst_set_bits(inst, 103, 99, GET_BITS(value, 10, 6)); - assert(GET_BITS(value, 5, 0) == 0); - } else { - assert(devinfo->ver >= 9); - elk_inst_set_bits(inst, 94, 91, GET_BITS(value, 31, 28)); - elk_inst_set_bits(inst, 88, 85, GET_BITS(value, 27, 24)); - elk_inst_set_bits(inst, 83, 80, GET_BITS(value, 23, 20)); - elk_inst_set_bits(inst, 67, 64, GET_BITS(value, 19, 16)); - assert(GET_BITS(value, 15, 0) == 0); - } -} - -/** - * Get the SEND(C) message extended descriptor immediate. - * - * \sa elk_inst_set_send_ex_desc(). - */ -static inline uint32_t -elk_inst_send_ex_desc(const struct intel_device_info *devinfo, - const elk_inst *inst) -{ - if (devinfo->ver >= 12) { - return (elk_inst_bits(inst, 127, 124) << 28 | - elk_inst_bits(inst, 97, 96) << 26 | - elk_inst_bits(inst, 65, 64) << 24 | - elk_inst_bits(inst, 47, 35) << 11 | - elk_inst_bits(inst, 103, 99) << 6); - } else { - assert(devinfo->ver >= 9); - return (elk_inst_bits(inst, 94, 91) << 28 | - elk_inst_bits(inst, 88, 85) << 24 | - elk_inst_bits(inst, 83, 80) << 20 | - elk_inst_bits(inst, 67, 64) << 16); - } -} - /** * Fields for SEND messages: * @{ */ -F(eot, /* 4+ */ 127, 127, /* 12+ */ 34, 34) +F(eot, /* 4+ */ 127, 127) FF(mlen, /* 4: */ 119, 116, /* 4.5: */ 119, 116, /* 5: */ 124, 121, /* 6: */ 124, 121, /* 7: */ 124, 121, - /* 8: */ 124, 121, - /* 12: */ MD12(28), MD12(25), - /* 20: */ MD12(28), MD12(25)); + /* 8: */ 124, 121) FF(rlen, /* 4: */ 115, 112, /* 4.5: */ 115, 112, /* 5: */ 120, 116, /* 6: */ 120, 116, /* 7: */ 120, 116, - /* 8: */ 120, 116, - /* 12: */ MD12(24), MD12(20), - /* 20: */ MD12(24), MD12(20)); + /* 8: */ 120, 116) FF(header_present, /* 4: doesn't exist */ -1, -1, -1, -1, /* 5: */ 115, 115, /* 6: */ 115, 115, /* 7: */ 115, 115, - /* 8: */ 115, 115, - /* 12: */ MD12(19), MD12(19), - /* 20: */ MD12(19), MD12(19)) -F(gateway_notify, /* 4+ */ MD(16), MD(15), /* 12+ */ -1, -1) -FD(function_control, + /* 8: */ 115, 115) +F(gateway_notify, /* 4+ */ MD(16), MD(15)) +FF(function_control, /* 4: */ 111, 96, /* 4.5: */ 111, 96, /* 5: */ 114, 96, /* 6: */ 114, 96, /* 7: */ 114, 96, - /* 8: */ 114, 96, - /* 12: */ MD12(18), MD12(11), MD12(10), MD12(0)) + /* 8: */ 114, 96) FF(gateway_subfuncid, /* 4: */ MD(1), MD(0), /* 4.5: */ MD(1), MD(0), /* 5: */ MD(1), MD(0), /* 2:0, but bit 2 is reserved MBZ */ /* 6: */ MD(2), MD(0), /* 7: */ MD(2), MD(0), - /* 8: */ MD(2), MD(0), - /* 12: */ MD12(2), MD12(0), - /* 20: */ MD12(2), MD12(0)) + /* 8: */ MD(2), MD(0)) FF(sfid, /* 4: */ 123, 120, /* called msg_target */ /* 4.5 */ 123, 120, /* 5: */ 95, 92, /* 6: */ 27, 24, /* 7: */ 27, 24, - /* 8: */ 27, 24, - /* 12: */ 95, 92, - /* 20: */ 95, 92) -FF(null_rt, - /* 4-7: */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - /* 8: */ 80, 80, - /* 12: */ 44, 44, - /* 20: */ 44, 44) /* actually only Gfx11+ */ -FC(base_mrf, /* 4+ */ 27, 24, /* 12+ */ -1, -1, devinfo->ver < 6); -FF(send_rta_index, - /* 4: */ -1, -1, - /* 4.5 */ -1, -1, - /* 5: */ -1, -1, - /* 6: */ -1, -1, - /* 7: */ -1, -1, - /* 8: */ -1, -1, - /* 12: */ 38, 36, - /* 20: */ 38, 36) + /* 8: */ 27, 24) +F8(null_rt, /* 4+ */ -1, -1, /* 8+ */ 80, 80) +FC(base_mrf, /* 4+ */ 27, 24, devinfo->ver < 6); /** @} */ /** @@ -917,50 +477,43 @@ FF(send_rta_index, FF(urb_per_slot_offset, /* 4-6: */ -1, -1, -1, -1, -1, -1, -1, -1, /* 7: */ MD(16), MD(16), - /* 8: */ MD(17), MD(17), - /* 12: */ MD12(17), MD12(17), - /* 20: */ MD12(17), MD12(17)) -FC(urb_channel_mask_present, /* 4+ */ MD(15), MD(15), /* 12+ */ MD12(15), MD12(15), devinfo->ver >= 8) -FC(urb_complete, /* 4+ */ MD(15), MD(15), /* 12+ */ -1, -1, devinfo->ver < 8) -FC(urb_used, /* 4+ */ MD(14), MD(14), /* 12+ */ -1, -1, devinfo->ver < 7) -FC(urb_allocate, /* 4+ */ MD(13), MD(13), /* 12+ */ -1, -1, devinfo->ver < 7) + /* 8: */ MD(17), MD(17)) +FC(urb_channel_mask_present, /* 4+ */ MD(15), MD(15), devinfo->ver >= 8) +FC(urb_complete, /* 4+ */ MD(15), MD(15), devinfo->ver < 8) +FC(urb_used, /* 4+ */ MD(14), MD(14), devinfo->ver < 7) +FC(urb_allocate, /* 4+ */ MD(13), MD(13), devinfo->ver < 7) FF(urb_swizzle_control, /* 4: */ MD(11), MD(10), /* 4.5: */ MD(11), MD(10), /* 5: */ MD(11), MD(10), /* 6: */ MD(11), MD(10), /* 7: */ MD(14), MD(14), - /* 8: */ MD(15), MD(15), - /* 12: */ -1, -1, - /* 20: */ -1, -1) -FD(urb_global_offset, + /* 8: */ MD(15), MD(15)) +FF(urb_global_offset, /* 4: */ MD( 9), MD(4), /* 4.5: */ MD( 9), MD(4), /* 5: */ MD( 9), MD(4), /* 6: */ MD( 9), MD(4), /* 7: */ MD(13), MD(3), - /* 8: */ MD(14), MD(4), - /* 12: */ MD12(14), MD12(11), MD12(10), MD12(4)) + /* 8: */ MD(14), MD(4)) FF(urb_opcode, /* 4: */ MD( 3), MD(0), /* 4.5: */ MD( 3), MD(0), /* 5: */ MD( 3), MD(0), /* 6: */ MD( 3), MD(0), /* 7: */ MD( 2), MD(0), - /* 8: */ MD( 3), MD(0), - /* 12: */ MD12(3), MD12(0), - /* 20: */ MD12(3), MD12(0)) + /* 8: */ MD( 3), MD(0)) /** @} */ /** * Gfx4-5 math messages: * @{ */ -FC(math_msg_data_type, /* 4+ */ MD(7), MD(7), /* 12+ */ -1, -1, devinfo->ver < 6) -FC(math_msg_saturate, /* 4+ */ MD(6), MD(6), /* 12+ */ -1, -1, devinfo->ver < 6) -FC(math_msg_precision, /* 4+ */ MD(5), MD(5), /* 12+ */ -1, -1, devinfo->ver < 6) -FC(math_msg_signed_int, /* 4+ */ MD(4), MD(4), /* 12+ */ -1, -1, devinfo->ver < 6) -FC(math_msg_function, /* 4+ */ MD(3), MD(0), /* 12+ */ -1, -1, devinfo->ver < 6) +FC(math_msg_data_type, /* 4+ */ MD(7), MD(7), devinfo->ver < 6) +FC(math_msg_saturate, /* 4+ */ MD(6), MD(6), devinfo->ver < 6) +FC(math_msg_precision, /* 4+ */ MD(5), MD(5), devinfo->ver < 6) +FC(math_msg_signed_int, /* 4+ */ MD(4), MD(4), devinfo->ver < 6) +FC(math_msg_function, /* 4+ */ MD(3), MD(0), devinfo->ver < 6) /** @} */ /** @@ -972,35 +525,30 @@ FF(sampler_simd_mode, /* 5: */ MD(17), MD(16), /* 6: */ MD(17), MD(16), /* 7: */ MD(18), MD(17), - /* 8: */ MD(18), MD(17), - /* 12: */ MD12(18), MD12(17), - /* 20: */ MD12(18), MD12(17)) + /* 8: */ MD(18), MD(17)) FF(sampler_msg_type, /* 4: */ MD(15), MD(14), /* 4.5: */ MD(15), MD(12), /* 5: */ MD(15), MD(12), /* 6: */ MD(15), MD(12), /* 7: */ MD(16), MD(12), - /* 8: */ MD(16), MD(12), - /* 12: */ MD12(16), MD12(12), - /* 20: */ MD12(16), MD12(12)) -FC(sampler_return_format, /* 4+ */ MD(13), MD(12), /* 12+ */ -1, -1, devinfo->verx10 == 40) -FD(sampler, + /* 8: */ MD(16), MD(12)) +FC(sampler_return_format, /* 4+ */ MD(13), MD(12), devinfo->verx10 == 40) +FF(sampler, /* 4: */ MD(11), MD(8), /* 4.5: */ MD(11), MD(8), /* 5: */ MD(11), MD(8), /* 6: */ MD(11), MD(8), /* 7: */ MD(11), MD(8), - /* 8: */ MD(11), MD(8), - /* 12: */ MD12(11), MD12(11), MD12(10), MD12(8)) -F(binding_table_index, /* 4+ */ MD(7), MD(0), /* 12+ */ MD12(7), MD12(0)) /* also used by other messages */ + /* 8: */ MD(11), MD(8)) +F(binding_table_index, /* 4+ */ MD(7), MD(0)) /* also used by other messages */ /** @} */ /** * Data port message function control bits: * @{ */ -FC(dp_category, /* 4+ */ MD(18), MD(18), /* 12+ */ MD12(18), MD12(18), devinfo->ver >= 7) +FC(dp_category, /* 4+ */ MD(18), MD(18), devinfo->ver >= 7) /* Gfx4-5 store fields in different bits for read/write messages. */ FF(dp_read_msg_type, @@ -1009,44 +557,36 @@ FF(dp_read_msg_type, /* 5: */ MD(13), MD(11), /* 6: */ MD(16), MD(13), /* 7: */ MD(17), MD(14), - /* 8: */ MD(17), MD(14), - /* 12: */ MD12(17), MD12(14), - /* 20: */ MD12(17), MD12(14)) + /* 8: */ MD(17), MD(14)) FF(dp_write_msg_type, /* 4: */ MD(14), MD(12), /* 4.5: */ MD(14), MD(12), /* 5: */ MD(14), MD(12), /* 6: */ MD(16), MD(13), /* 7: */ MD(17), MD(14), - /* 8: */ MD(17), MD(14), - /* 12: */ MD12(17), MD12(14), - /* 20: */ MD12(17), MD12(14)) -FD(dp_read_msg_control, + /* 8: */ MD(17), MD(14)) +FF(dp_read_msg_control, /* 4: */ MD(11), MD( 8), /* 4.5: */ MD(10), MD( 8), /* 5: */ MD(10), MD( 8), /* 6: */ MD(12), MD( 8), /* 7: */ MD(13), MD( 8), - /* 8: */ MD(13), MD( 8), - /* 12: */ MD12(13), MD12(11), MD12(10), MD12(8)) -FD(dp_write_msg_control, + /* 8: */ MD(13), MD( 8)) +FF(dp_write_msg_control, /* 4: */ MD(11), MD( 8), /* 4.5: */ MD(11), MD( 8), /* 5: */ MD(11), MD( 8), /* 6: */ MD(12), MD( 8), /* 7: */ MD(13), MD( 8), - /* 8: */ MD(13), MD( 8), - /* 12: */ MD12(13), MD12(11), MD12(10), MD12(8)) -FC(dp_read_target_cache, /* 4+ */ MD(15), MD(14), /* 12+ */ -1, -1, devinfo->ver < 6); + /* 8: */ MD(13), MD( 8)) +FC(dp_read_target_cache, /* 4+ */ MD(15), MD(14), devinfo->ver < 6); FF(dp_write_commit, /* 4: */ MD(15), MD(15), /* 4.5: */ MD(15), MD(15), /* 5: */ MD(15), MD(15), /* 6: */ MD(17), MD(17), - /* 7+: does not exist */ -1, -1, -1, -1, - /* 12: */ -1, -1, - /* 20: */ -1, -1) + /* 7+: does not exist */ -1, -1, -1, -1) /* Gfx6+ use the same bit locations for everything. */ FF(dp_msg_type, @@ -1054,34 +594,30 @@ FF(dp_msg_type, -1, -1, -1, -1, -1, -1, /* 6: */ MD(16), MD(13), /* 7: */ MD(17), MD(14), - /* 8: */ MD(18), MD(14), - /* 12: */ MD12(18), MD12(14), - /* 20: */ MD12(18), MD12(14)) -FD(dp_msg_control, + /* 8: */ MD(18), MD(14)) +FF(dp_msg_control, /* 4: */ MD(11), MD( 8), /* 4.5-5: use dp_read_msg_control or dp_write_msg_control */ -1, -1, -1, -1, /* 6: */ MD(12), MD( 8), /* 7: */ MD(13), MD( 8), - /* 8: */ MD(13), MD( 8), - /* 12: */ MD12(13), MD12(11), MD12(10), MD12(8)) + /* 8: */ MD(13), MD( 8)) /** @} */ /** * Scratch message bits (Gfx7+): * @{ */ -FC(scratch_read_write, /* 4+ */ MD(17), MD(17), /* 12+ */ MD12(17), MD12(17), devinfo->ver >= 7) /* 0 = read, 1 = write */ -FC(scratch_type, /* 4+ */ MD(16), MD(16), /* 12+ */ -1, -1, devinfo->ver >= 7) /* 0 = OWord, 1 = DWord */ -FC(scratch_invalidate_after_read, /* 4+ */ MD(15), MD(15), /* 12+ */ MD12(15), MD12(15), devinfo->ver >= 7) -FC(scratch_block_size, /* 4+ */ MD(13), MD(12), /* 12+ */ MD12(13), MD12(12), devinfo->ver >= 7) -FD(scratch_addr_offset, +FC(scratch_read_write, /* 4+ */ MD(17), MD(17), devinfo->ver >= 7) /* 0 = read, 1 = write */ +FC(scratch_type, /* 4+ */ MD(16), MD(16), devinfo->ver >= 7) /* 0 = OWord, 1 = DWord */ +FC(scratch_invalidate_after_read, /* 4+ */ MD(15), MD(15), devinfo->ver >= 7) +FC(scratch_block_size, /* 4+ */ MD(13), MD(12), devinfo->ver >= 7) +FF(scratch_addr_offset, /* 4: */ -1, -1, /* 4.5: */ -1, -1, /* 5: */ -1, -1, /* 6: */ -1, -1, /* 7: */ MD(11), MD(0), - /* 8: */ MD(11), MD(0), - /* 12: */ MD12(11), MD12(11), MD12(10), MD12(0)) + /* 8: */ MD(11), MD(0)) /** @} */ /** @@ -1094,31 +630,29 @@ FF(rt_last, /* 5: */ MD(11), MD(11), /* 6: */ MD(12), MD(12), /* 7: */ MD(12), MD(12), - /* 8: */ MD(12), MD(12), - /* 12: */ MD12(12), MD12(12), - /* 20: */ MD12(12), MD12(12)) -FC(rt_slot_group, /* 4+ */ MD(11), MD(11), /* 12+ */ MD12(11), MD12(11), devinfo->ver >= 6) -F(rt_message_type, /* 4+ */ MD(10), MD( 8), /* 12+ */ MD12(10), MD12(8)) + /* 8: */ MD(12), MD(12)) +FC(rt_slot_group, /* 4+ */ MD(11), MD(11), devinfo->ver >= 6) +F(rt_message_type, /* 4+ */ MD(10), MD( 8)) /** @} */ /** * Thread Spawn message function control bits: * @{ */ -FC(ts_resource_select, /* 4+ */ MD( 4), MD( 4), /* 12+ */ -1, -1, devinfo->ver < 11) -FC(ts_request_type, /* 4+ */ MD( 1), MD( 1), /* 12+ */ -1, -1, devinfo->ver < 11) -F(ts_opcode, /* 4+ */ MD( 0), MD( 0), /* 12+ */ MD12(0), MD12(0)) +FC(ts_resource_select, /* 4+ */ MD( 4), MD( 4), devinfo->ver < 11) +FC(ts_request_type, /* 4+ */ MD( 1), MD( 1), devinfo->ver < 11) +F(ts_opcode, /* 4+ */ MD( 0), MD( 0)) /** @} */ /** * Pixel Interpolator message function control bits: * @{ */ -F(pi_simd_mode, /* 4+ */ MD(16), MD(16), /* 12+ */ MD12(16), MD12(16)) -F(pi_nopersp, /* 4+ */ MD(14), MD(14), /* 12+ */ MD12(14), MD12(14)) -F(pi_message_type, /* 4+ */ MD(13), MD(12), /* 12+ */ MD12(13), MD12(12)) -F(pi_slot_group, /* 4+ */ MD(11), MD(11), /* 12+ */ MD12(11), MD12(11)) -F(pi_message_data, /* 4+ */ MD(7), MD(0), /* 12+ */ MD12(7), MD12(0)) +F(pi_simd_mode, /* 4+ */ MD(16), MD(16)) +F(pi_nopersp, /* 4+ */ MD(14), MD(14)) +F(pi_message_type, /* 4+ */ MD(13), MD(12)) +F(pi_slot_group, /* 4+ */ MD(11), MD(11)) +F(pi_message_data, /* 4+ */ MD(7), MD(0)) /** @} */ /** @@ -1453,49 +987,34 @@ elk_compact_inst_set_bits(elk_compact_inst *inst, unsigned high, unsigned low, inst->data = (inst->data & ~mask) | (value << low); } -#define FC(name, high, low, gfx12_high, gfx12_low, assertions) \ +#define FC(name, high, low, assertions) \ static inline void \ elk_compact_inst_set_##name(const struct \ intel_device_info *devinfo, \ elk_compact_inst *inst, unsigned v) \ { \ assert(assertions); \ - if (devinfo->ver >= 12) \ - elk_compact_inst_set_bits(inst, gfx12_high, gfx12_low, v); \ - else \ - elk_compact_inst_set_bits(inst, high, low, v); \ + elk_compact_inst_set_bits(inst, high, low, v); \ } \ static inline unsigned \ elk_compact_inst_##name(const struct intel_device_info *devinfo, \ const elk_compact_inst *inst) \ { \ assert(assertions); \ - if (devinfo->ver >= 12) \ - return elk_compact_inst_bits(inst, gfx12_high, gfx12_low); \ - else \ - return elk_compact_inst_bits(inst, high, low); \ + return elk_compact_inst_bits(inst, high, low); \ } -/* A simple macro for fields which stay in the same place on all generations - * except for Gfx12. - */ -#define F(name, high, low, gfx12_high, gfx12_low) \ - FC(name, high, low, gfx12_high, gfx12_low, true) +/* A simple macro for fields which stay in the same place on all generations. */ +#define F(name, high, low) FC(name, high, low, true) -/* A macro for fields which moved to several different locations - * across generations. - */ -#define F20(name, high, low, hi8, lo8, hi12, lo12, hi20, lo20) \ +/* A macro for fields which moved as of Gfx8+. */ +#define F8(name, high, low, hi8, lo8) \ static inline void \ elk_compact_inst_set_##name(const struct \ intel_device_info *devinfo, \ elk_compact_inst *inst, unsigned v) \ { \ - if (devinfo->ver >= 20) \ - elk_compact_inst_set_bits(inst, hi20, lo20, v); \ - else if (devinfo->ver >= 12) \ - elk_compact_inst_set_bits(inst, hi12, lo12, v); \ - else if (devinfo->ver >= 8) \ + if (devinfo->ver >= 8) \ elk_compact_inst_set_bits(inst, hi8, lo8, v); \ else \ elk_compact_inst_set_bits(inst, high, low, v); \ @@ -1504,71 +1023,27 @@ static inline unsigned \ elk_compact_inst_##name(const struct intel_device_info *devinfo, \ const elk_compact_inst *inst) \ { \ - if (devinfo->ver >= 20) \ - return elk_compact_inst_bits(inst, hi20, lo20); \ - else if (devinfo->ver >= 12) \ - return elk_compact_inst_bits(inst, hi12, lo12); \ - else if (devinfo->ver >= 8) \ + if (devinfo->ver >= 8) \ return elk_compact_inst_bits(inst, hi8, lo8); \ else \ return elk_compact_inst_bits(inst, high, low); \ } -/* A macro for fields which gained extra discontiguous bits in Gfx20 - * (specified by hi20ex-lo20ex). - */ -#define FD20(name, high, low, hi8, lo8, hi12, lo12, \ - hi20, lo20, hi20ex, lo20ex) \ - static inline void \ -elk_compact_inst_set_##name(const struct \ - intel_device_info *devinfo, \ - elk_compact_inst *inst, unsigned v) \ -{ \ - if (devinfo->ver >= 20) { \ - const unsigned k = hi20 - lo20 + 1; \ - elk_compact_inst_set_bits(inst, hi20ex, lo20ex, v >> k); \ - elk_compact_inst_set_bits(inst, hi20, lo20, v & ((1u << k) - 1)); \ - } else if (devinfo->ver >= 12) { \ - elk_compact_inst_set_bits(inst, hi12, lo12, v); \ - } else if (devinfo->ver >= 8) { \ - elk_compact_inst_set_bits(inst, hi8, lo8, v); \ - } else { \ - elk_compact_inst_set_bits(inst, high, low, v); \ - } \ -} \ -static inline unsigned \ -elk_compact_inst_##name(const struct intel_device_info *devinfo, \ - const elk_compact_inst *inst) \ -{ \ - if (devinfo->ver >= 20) { \ - const unsigned k = hi20 - lo20 + 1; \ - return (elk_compact_inst_bits(inst, hi20ex, lo20ex) << k | \ - elk_compact_inst_bits(inst, hi20, lo20)); \ - } else if (devinfo->ver >= 12) { \ - return elk_compact_inst_bits(inst, hi12, lo12); \ - } else if (devinfo->ver >= 8) { \ - return elk_compact_inst_bits(inst, hi8, lo8); \ - } else { \ - return elk_compact_inst_bits(inst, high, low); \ - } \ -} - -F(src1_reg_nr, /* 4+ */ 63, 56, /* 12+ */ 63, 56) -F(src0_reg_nr, /* 4+ */ 55, 48, /* 12+ */ 47, 40) -F20(dst_reg_nr, /* 4+ */ 47, 40, /* 8+ */ 47, 40, /* 12+ */ 23, 16, /* 20+ */ 39, 32) -F(src1_index, /* 4+ */ 39, 35, /* 12+ */ 55, 52) -F20(src0_index, /* 4+ */ 34, 30, /* 8+ */ 34, 30, /* 12+ */ 51, 48, /* 20+ */ 25, 23) -F(cmpt_control, /* 4+ */ 29, 29, /* 12+ */ 29, 29) /* Same location as elk_inst */ -FC(flag_subreg_nr, /* 4+ */ 28, 28, /* 12+ */ -1, -1, devinfo->ver <= 6) -F(cond_modifier, /* 4+ */ 27, 24, /* 12+ */ -1, -1) /* Same location as elk_inst */ -FC(acc_wr_control, /* 4+ */ 23, 23, /* 12+ */ -1, -1, devinfo->ver >= 6) -FC(mask_control_ex, /* 4+ */ 23, 23, /* 12+ */ -1, -1, devinfo->verx10 == 45 || devinfo->ver == 5) -F20(subreg_index, /* 4+ */ 22, 18, /* 8+ */ 22, 18, /* 12+ */ 39, 35, /* 20+ */ 51, 48) -FD20(datatype_index, /* 4+ */ 17, 13, /* 8+ */ 17, 13, /* 12+ */ 34, 30, /* 20+ */ 28, 26, 31, 30) -F20(control_index, /* 4+ */ 12, 8, /* 8+ */ 12, 8, /* 12+ */ 28, 24, /* 20+ */ 22, 18) -F20(swsb, /* 4+ */ -1, -1, /* 8+ */ -1, -1, /* 12+ */ 15, 8, /* 20+ */ 17, 8) -F(debug_control, /* 4+ */ 7, 7, /* 12+ */ 7, 7) -F(hw_opcode, /* 4+ */ 6, 0, /* 12+ */ 6, 0) /* Same location as elk_inst */ +F(src1_reg_nr, /* 4+ */ 63, 56) +F(src0_reg_nr, /* 4+ */ 55, 48) +F8(dst_reg_nr, /* 4+ */ 47, 40, /* 8+ */ 47, 40) +F(src1_index, /* 4+ */ 39, 35) +F8(src0_index, /* 4+ */ 34, 30, /* 8+ */ 34, 30) +F(cmpt_control, /* 4+ */ 29, 29) /* Same location as elk_inst */ +FC(flag_subreg_nr, /* 4+ */ 28, 28, devinfo->ver <= 6) +F(cond_modifier, /* 4+ */ 27, 24) /* Same location as elk_inst */ +FC(acc_wr_control, /* 4+ */ 23, 23, devinfo->ver >= 6) +FC(mask_control_ex, /* 4+ */ 23, 23, devinfo->verx10 == 45 || devinfo->ver == 5) +F8(subreg_index, /* 4+ */ 22, 18, /* 8+ */ 22, 18) +F8(datatype_index, /* 4+ */ 17, 13, /* 8+ */ 17, 13) +F8(control_index, /* 4+ */ 12, 8, /* 8+ */ 12, 8) +F(debug_control, /* 4+ */ 7, 7) +F(hw_opcode, /* 4+ */ 6, 0) /* Same location as elk_inst */ static inline unsigned elk_compact_inst_imm(const struct intel_device_info *devinfo, @@ -1586,26 +1061,24 @@ elk_compact_inst_imm(const struct intel_device_info *devinfo, * (Gfx8+) Compacted three-source instructions: * @{ */ -FC(3src_src2_reg_nr, /* 4+ */ 63, 57, /* 12+ */ 55, 48, devinfo->ver >= 8) -FC(3src_src1_reg_nr, /* 4+ */ 56, 50, /* 12+ */ 63, 56, devinfo->ver >= 8) -FC(3src_src0_reg_nr, /* 4+ */ 49, 43, /* 12+ */ 47, 40, devinfo->ver >= 8) -FC(3src_src2_subreg_nr, /* 4+ */ 42, 40, /* 12+ */ -1, -1, devinfo->ver >= 8) -FC(3src_src1_subreg_nr, /* 4+ */ 39, 37, /* 12+ */ -1, -1, devinfo->ver >= 8) -FC(3src_src0_subreg_nr, /* 4+ */ 36, 34, /* 12+ */ -1, -1, devinfo->ver >= 8) -FC(3src_src2_rep_ctrl, /* 4+ */ 33, 33, /* 12+ */ -1, -1, devinfo->ver >= 8) -FC(3src_src1_rep_ctrl, /* 4+ */ 32, 32, /* 12+ */ -1, -1, devinfo->ver >= 8) -FC(3src_saturate, /* 4+ */ 31, 31, /* 12+ */ -1, -1, devinfo->ver >= 8) -FC(3src_debug_control, /* 4+ */ 30, 30, /* 12+ */ 7, 7, devinfo->ver >= 8) -FC(3src_cmpt_control, /* 4+ */ 29, 29, /* 12+ */ 29, 29, devinfo->ver >= 8) -FC(3src_src0_rep_ctrl, /* 4+ */ 28, 28, /* 12+ */ -1, -1, devinfo->ver >= 8) +FC(3src_src2_reg_nr, /* 4+ */ 63, 57, devinfo->ver >= 8) +FC(3src_src1_reg_nr, /* 4+ */ 56, 50, devinfo->ver >= 8) +FC(3src_src0_reg_nr, /* 4+ */ 49, 43, devinfo->ver >= 8) +FC(3src_src2_subreg_nr, /* 4+ */ 42, 40, devinfo->ver >= 8) +FC(3src_src1_subreg_nr, /* 4+ */ 39, 37, devinfo->ver >= 8) +FC(3src_src0_subreg_nr, /* 4+ */ 36, 34, devinfo->ver >= 8) +FC(3src_src2_rep_ctrl, /* 4+ */ 33, 33, devinfo->ver >= 8) +FC(3src_src1_rep_ctrl, /* 4+ */ 32, 32, devinfo->ver >= 8) +FC(3src_saturate, /* 4+ */ 31, 31, devinfo->ver >= 8) +FC(3src_debug_control, /* 4+ */ 30, 30, devinfo->ver >= 8) +FC(3src_cmpt_control, /* 4+ */ 29, 29, devinfo->ver >= 8) +FC(3src_src0_rep_ctrl, /* 4+ */ 28, 28, devinfo->ver >= 8) /* Reserved */ -F20(3src_dst_reg_nr, /* 4+ */ 18, 12, /* 8+ */ 18, 12, /* 12+ */ 23, 16, /* 20+ */ 39, 32) -F20(3src_source_index, /* 4+ */ -1, -1, /* 8+ */ 11, 10, /* 12+ */ 34, 30, /* 20+ */ 25, 22) -FD20(3src_subreg_index, /* 4+ */ -1, -1, /* 8+ */ -1, -1, /* 12+ */ 39, 35, /* 20+ */ 28, 26, 31, 30) -F20(3src_control_index, /* 4+ */ -1, -1, /* 8+ */ 9, 8, /* 12+ */ 28, 24, /* 20+ */ 21, 18) -F20(3src_swsb, /* 4+ */ -1, -1, /* 8+ */ -1, -1, /* 12+ */ 15, 8, /* 20+ */ 17, 8) +F8(3src_dst_reg_nr, /* 4+ */ 18, 12, /* 8+ */ 18, 12) +F8(3src_source_index, /* 4+ */ -1, -1, /* 8+ */ 11, 10) +F8(3src_control_index, /* 4+ */ -1, -1, /* 8+ */ 9, 8) /* Bit 7 is Reserved (for future Opcode expansion) */ -FC(3src_hw_opcode, /* 4+ */ 6, 0, /* 12+ */ 6, 0, devinfo->ver >= 8) +FC(3src_hw_opcode, /* 4+ */ 6, 0, devinfo->ver >= 8) /** @} */ #undef F