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anv/cmd_buffer: Make get_fast_clear_state return an address
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
This commit is contained in:
parent
fd146e4f3f
commit
3735af0415
1 changed files with 24 additions and 22 deletions
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@ -400,10 +400,10 @@ enum fast_clear_state_field {
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FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE,
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FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE,
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};
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};
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static inline uint32_t
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static inline struct anv_address
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get_fast_clear_state_offset(const struct anv_device *device,
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get_fast_clear_state_address(const struct anv_device *device,
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const struct anv_image *image,
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const struct anv_image *image,
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unsigned level, enum fast_clear_state_field field)
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unsigned level, enum fast_clear_state_field field)
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{
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{
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assert(device && image);
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assert(device && image);
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assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
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assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
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@ -421,7 +421,10 @@ get_fast_clear_state_offset(const struct anv_device *device,
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}
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}
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assert(offset < image->offset + image->size);
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assert(offset < image->offset + image->size);
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return offset;
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return (struct anv_address) {
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.bo = image->bo,
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.offset = offset,
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};
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}
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}
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#define MI_PREDICATE_SRC0 0x2400
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#define MI_PREDICATE_SRC0 0x2400
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@ -439,16 +442,16 @@ genX(set_image_needs_resolve)(struct anv_cmd_buffer *cmd_buffer,
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assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
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assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
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assert(level < anv_image_aux_levels(image));
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assert(level < anv_image_aux_levels(image));
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const uint32_t resolve_flag_offset =
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const struct anv_address resolve_flag_addr =
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get_fast_clear_state_offset(cmd_buffer->device, image, level,
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get_fast_clear_state_address(cmd_buffer->device, image, level,
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FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE);
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FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE);
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/* The HW docs say that there is no way to guarantee the completion of
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/* The HW docs say that there is no way to guarantee the completion of
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* the following command. We use it nevertheless because it shows no
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* the following command. We use it nevertheless because it shows no
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* issues in testing is currently being used in the GL driver.
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* issues in testing is currently being used in the GL driver.
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*/
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*/
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anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
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anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
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sdi.Address = (struct anv_address) { image->bo, resolve_flag_offset };
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sdi.Address = resolve_flag_addr;
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sdi.ImmediateData = needs_resolve;
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sdi.ImmediateData = needs_resolve;
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}
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}
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}
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}
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@ -462,9 +465,9 @@ genX(load_needs_resolve_predicate)(struct anv_cmd_buffer *cmd_buffer,
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assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
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assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
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assert(level < anv_image_aux_levels(image));
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assert(level < anv_image_aux_levels(image));
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const uint32_t resolve_flag_offset =
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const struct anv_address resolve_flag_addr =
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get_fast_clear_state_offset(cmd_buffer->device, image, level,
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get_fast_clear_state_address(cmd_buffer->device, image, level,
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FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE);
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FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE);
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/* Make the pending predicated resolve a no-op if one is not needed.
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/* Make the pending predicated resolve a no-op if one is not needed.
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* predicate = do_resolve = resolve_flag != 0;
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* predicate = do_resolve = resolve_flag != 0;
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@ -473,7 +476,7 @@ genX(load_needs_resolve_predicate)(struct anv_cmd_buffer *cmd_buffer,
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emit_lri(&cmd_buffer->batch, MI_PREDICATE_SRC1 + 4, 0);
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emit_lri(&cmd_buffer->batch, MI_PREDICATE_SRC1 + 4, 0);
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emit_lri(&cmd_buffer->batch, MI_PREDICATE_SRC0 , 0);
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emit_lri(&cmd_buffer->batch, MI_PREDICATE_SRC0 , 0);
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emit_lrm(&cmd_buffer->batch, MI_PREDICATE_SRC0 + 4,
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emit_lrm(&cmd_buffer->batch, MI_PREDICATE_SRC0 + 4,
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image->bo, resolve_flag_offset);
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resolve_flag_addr.bo, resolve_flag_addr.offset);
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anv_batch_emit(&cmd_buffer->batch, GENX(MI_PREDICATE), mip) {
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anv_batch_emit(&cmd_buffer->batch, GENX(MI_PREDICATE), mip) {
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mip.LoadOperation = LOAD_LOADINV;
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mip.LoadOperation = LOAD_LOADINV;
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mip.CombineOperation = COMBINE_SET;
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mip.CombineOperation = COMBINE_SET;
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@ -513,10 +516,9 @@ init_fast_clear_state_entry(struct anv_cmd_buffer *cmd_buffer,
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unsigned i = 0;
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unsigned i = 0;
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for (; i < cmd_buffer->device->isl_dev.ss.clear_value_size; i += 4) {
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for (; i < cmd_buffer->device->isl_dev.ss.clear_value_size; i += 4) {
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anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
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anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
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const uint32_t entry_offset =
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sdi.Address =
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get_fast_clear_state_offset(cmd_buffer->device, image, level,
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get_fast_clear_state_address(cmd_buffer->device, image, level,
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FAST_CLEAR_STATE_FIELD_CLEAR_COLOR);
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FAST_CLEAR_STATE_FIELD_CLEAR_COLOR);
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sdi.Address = (struct anv_address) { image->bo, entry_offset + i };
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if (GEN_GEN >= 9) {
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if (GEN_GEN >= 9) {
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/* MCS buffers on SKL+ can only have 1/0 clear colors. */
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/* MCS buffers on SKL+ can only have 1/0 clear colors. */
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@ -561,17 +563,17 @@ genX(copy_fast_clear_dwords)(struct anv_cmd_buffer *cmd_buffer,
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&cmd_buffer->device->surface_state_pool.block_pool.bo;
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&cmd_buffer->device->surface_state_pool.block_pool.bo;
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uint32_t ss_clear_offset = surface_state.offset +
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uint32_t ss_clear_offset = surface_state.offset +
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cmd_buffer->device->isl_dev.ss.clear_value_offset;
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cmd_buffer->device->isl_dev.ss.clear_value_offset;
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uint32_t entry_offset =
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const struct anv_address entry_addr =
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get_fast_clear_state_offset(cmd_buffer->device, image, level,
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get_fast_clear_state_address(cmd_buffer->device, image, level,
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FAST_CLEAR_STATE_FIELD_CLEAR_COLOR);
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FAST_CLEAR_STATE_FIELD_CLEAR_COLOR);
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unsigned copy_size = cmd_buffer->device->isl_dev.ss.clear_value_size;
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unsigned copy_size = cmd_buffer->device->isl_dev.ss.clear_value_size;
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if (copy_from_surface_state) {
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if (copy_from_surface_state) {
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genX(cmd_buffer_mi_memcpy)(cmd_buffer, image->bo, entry_offset,
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genX(cmd_buffer_mi_memcpy)(cmd_buffer, entry_addr.bo, entry_addr.offset,
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ss_bo, ss_clear_offset, copy_size);
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ss_bo, ss_clear_offset, copy_size);
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} else {
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} else {
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genX(cmd_buffer_mi_memcpy)(cmd_buffer, ss_bo, ss_clear_offset,
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genX(cmd_buffer_mi_memcpy)(cmd_buffer, ss_bo, ss_clear_offset,
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image->bo, entry_offset, copy_size);
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entry_addr.bo, entry_addr.offset, copy_size);
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/* Updating a surface state object may require that the state cache be
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/* Updating a surface state object may require that the state cache be
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* invalidated. From the SKL PRM, Shared Functions -> State -> State
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* invalidated. From the SKL PRM, Shared Functions -> State -> State
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