From 36e842839ff2a770fb1f36e5ad954143e27e80f1 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Tue, 14 Jun 2022 22:05:21 -0700 Subject: [PATCH] i915: Enable generation of fcsel_gt and fcsel_ge opcodes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit DX9 PS 1.x / GL_ARB_fragment_program shaders that have been converted to GLSL are littered with patterns like ps_r1.x = ((ps_t0.y >= 0.0) ? ps_r1.x : ps_c1.y); This is because CMP is a fundamental opcode in those earlier shading languages. i915 supports this opcode natively, but there's no way to get it directly into the backend. Instead, NIR and NTT generate some combination of fcsel and sge and hope for the best. i915 total instructions in shared programs: 49032 -> 48897 (-0.28%) instructions in affected programs: 4173 -> 4038 (-3.24%) helped: 39 HURT: 0 total temps in shared programs: 2795 -> 2790 (-0.18%) temps in affected programs: 22 -> 17 (-22.73%) helped: 5 HURT: 0 total const in shared programs: 4976 -> 4967 (-0.18%) const in affected programs: 203 -> 194 (-4.43%) helped: 9 HURT: 0 GAINED: shaders/trine/fp-13.shader_test FS Reviewed-by: Emma Anholt Reviewed-by: Pavel Ondračka Part-of: --- src/gallium/drivers/i915/i915_screen.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index 4779551aad0..2530aa73494 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -124,6 +124,7 @@ static const nir_shader_compiler_options i915_compiler_options = { .force_indirect_unrolling_sampler = true, .max_unroll_iterations = 32, .no_integers = true, + .has_fused_comp_and_csel = true, }; static const struct nir_shader_compiler_options gallivm_nir_options = {