From 36e80caac92a0d4736a8d2454462c7e2afaddfa2 Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Thu, 9 Nov 2023 10:48:33 -0600 Subject: [PATCH] nak: Rename LogicOp to LogicOp3 Part-of: --- src/nouveau/compiler/nak/builder.rs | 10 +++--- src/nouveau/compiler/nak/from_nir.rs | 18 +++++------ src/nouveau/compiler/nak/ir.rs | 36 ++++++++++----------- src/nouveau/compiler/nak/legalize.rs | 12 +++---- src/nouveau/compiler/nak/lower_copy_swap.rs | 12 +++---- src/nouveau/compiler/nak/opt_copy_prop.rs | 7 ++-- src/nouveau/compiler/nak/opt_lop.rs | 12 +++---- 7 files changed, 54 insertions(+), 53 deletions(-) diff --git a/src/nouveau/compiler/nak/builder.rs b/src/nouveau/compiler/nak/builder.rs index a565355bf75..30d77433a78 100644 --- a/src/nouveau/compiler/nak/builder.rs +++ b/src/nouveau/compiler/nak/builder.rs @@ -24,7 +24,7 @@ pub trait Builder { } } - fn lop2_to(&mut self, dst: Dst, op: LogicOp, x: Src, y: Src) { + fn lop2_to(&mut self, dst: Dst, op: LogicOp3, x: Src, y: Src) { /* Only uses x and y */ assert!(!op.src_used(2)); @@ -40,7 +40,7 @@ pub trait Builder { self.push_op(OpPLop3 { dsts: [dst.into(), Dst::None], srcs: [x, y, Src::new_imm_bool(true)], - ops: [op, LogicOp::new_const(false)], + ops: [op, LogicOp3::new_const(false)], }); } else { self.push_op(OpLop3 { @@ -259,7 +259,7 @@ pub trait SSABuilder: Builder { dst } - fn lop2(&mut self, op: LogicOp, x: Src, y: Src) -> SSARef { + fn lop2(&mut self, op: LogicOp3, x: Src, y: Src) -> SSARef { let dst = if x.is_predicate() { self.alloc_ssa(RegFile::Pred, 1) } else { @@ -332,8 +332,8 @@ pub trait SSABuilder: Builder { dsts: [dst.into(), Dst::None], srcs: [cond, x, y], ops: [ - LogicOp::new_lut(&|c, x, y| (c & x) | (!c & y)), - LogicOp::new_const(false), + LogicOp3::new_lut(&|c, x, y| (c & x) | (!c & y)), + LogicOp3::new_const(false), ], }); dst diff --git a/src/nouveau/compiler/nak/from_nir.rs b/src/nouveau/compiler/nak/from_nir.rs index da4f0b59ed3..6e16e2ecbdb 100644 --- a/src/nouveau/compiler/nak/from_nir.rs +++ b/src/nouveau/compiler/nak/from_nir.rs @@ -775,11 +775,11 @@ impl<'a> ShaderFromNir<'a> { } } nir_op_iand => { - b.lop2(LogicOp::new_lut(&|x, y, _| x & y), srcs[0], srcs[1]) + b.lop2(LogicOp3::new_lut(&|x, y, _| x & y), srcs[0], srcs[1]) } nir_op_ieq => { if alu.get_src(0).bit_size() == 1 { - let lop = LogicOp::new_lut(&|x, y, _| !(x ^ y)); + let lop = LogicOp3::new_lut(&|x, y, _| !(x ^ y)); b.lop2(lop, srcs[0], srcs[1]) } else if alu.get_src(0).bit_size() == 64 { b.isetp64(IntCmpType::I32, IntCmpOp::Eq, srcs[0], srcs[1]) @@ -850,7 +850,7 @@ impl<'a> ShaderFromNir<'a> { } nir_op_ine => { if alu.get_src(0).bit_size() == 1 { - let lop = LogicOp::new_lut(&|x, y, _| x ^ y); + let lop = LogicOp3::new_lut(&|x, y, _| x ^ y); b.lop2(lop, srcs[0], srcs[1]) } else if alu.get_src(0).bit_size() == 64 { b.isetp64(IntCmpType::I32, IntCmpOp::Ne, srcs[0], srcs[1]) @@ -882,7 +882,7 @@ impl<'a> ShaderFromNir<'a> { } } nir_op_inot => { - let lop = LogicOp::new_lut(&|x, _, _| !x); + let lop = LogicOp3::new_lut(&|x, _, _| !x); if alu.def.bit_size() == 1 { b.lop2(lop, srcs[0], true.into()) } else { @@ -891,7 +891,7 @@ impl<'a> ShaderFromNir<'a> { } } nir_op_ior => { - b.lop2(LogicOp::new_lut(&|x, y, _| x | y), srcs[0], srcs[1]) + b.lop2(LogicOp3::new_lut(&|x, y, _| x | y), srcs[0], srcs[1]) } nir_op_ishl => { let x = *srcs[0].as_ssa().unwrap(); @@ -900,7 +900,7 @@ impl<'a> ShaderFromNir<'a> { // For 64-bit shifts, we have to use clamp mode so we need // to mask the shift in order satisfy NIR semantics. let shift = b.lop2( - LogicOp::new_lut(&|x, y, _| x & y), + LogicOp3::new_lut(&|x, y, _| x & y), shift, 0x3f.into(), ); @@ -949,7 +949,7 @@ impl<'a> ShaderFromNir<'a> { // For 64-bit shifts, we have to use clamp mode so we need // to mask the shift in order satisfy NIR semantics. let shift = b.lop2( - LogicOp::new_lut(&|x, y, _| x & y), + LogicOp3::new_lut(&|x, y, _| x & y), shift, 0x3f.into(), ); @@ -992,7 +992,7 @@ impl<'a> ShaderFromNir<'a> { } } nir_op_ixor => { - b.lop2(LogicOp::new_lut(&|x, y, _| x ^ y), srcs[0], srcs[1]) + b.lop2(LogicOp3::new_lut(&|x, y, _| x ^ y), srcs[0], srcs[1]) } nir_op_pack_half_2x16_split => { assert!(alu.get_src(0).bit_size() == 32); @@ -1164,7 +1164,7 @@ impl<'a> ShaderFromNir<'a> { // For 64-bit shifts, we have to use clamp mode so we need // to mask the shift in order satisfy NIR semantics. let shift = b.lop2( - LogicOp::new_lut(&|x, y, _| x & y), + LogicOp3::new_lut(&|x, y, _| x & y), shift, 0x3f.into(), ); diff --git a/src/nouveau/compiler/nak/ir.rs b/src/nouveau/compiler/nak/ir.rs index 0bb43f8a336..7939f907b20 100644 --- a/src/nouveau/compiler/nak/ir.rs +++ b/src/nouveau/compiler/nak/ir.rs @@ -1453,39 +1453,39 @@ impl fmt::Display for IntCmpType { } #[derive(Clone, Copy, Eq, Hash, PartialEq)] -pub struct LogicOp { +pub struct LogicOp3 { pub lut: u8, } -impl LogicOp { +impl LogicOp3 { pub const SRC_MASKS: [u8; 3] = [0xf0, 0xcc, 0xaa]; #[inline] - pub fn new_lut u8>(f: &F) -> LogicOp { - LogicOp { + pub fn new_lut u8>(f: &F) -> LogicOp3 { + LogicOp3 { lut: f( - LogicOp::SRC_MASKS[0], - LogicOp::SRC_MASKS[1], - LogicOp::SRC_MASKS[2], + LogicOp3::SRC_MASKS[0], + LogicOp3::SRC_MASKS[1], + LogicOp3::SRC_MASKS[2], ), } } - pub fn new_const(val: bool) -> LogicOp { - LogicOp { + pub fn new_const(val: bool) -> LogicOp3 { + LogicOp3 { lut: if val { !0 } else { 0 }, } } pub fn src_used(&self, src_idx: usize) -> bool { - let mask = LogicOp::SRC_MASKS[src_idx]; - let shift = LogicOp::SRC_MASKS[src_idx].trailing_zeros(); + let mask = LogicOp3::SRC_MASKS[src_idx]; + let shift = LogicOp3::SRC_MASKS[src_idx].trailing_zeros(); self.lut & !mask != (self.lut >> shift) & !mask } pub fn fix_src(&mut self, src_idx: usize, val: bool) { - let mask = LogicOp::SRC_MASKS[src_idx]; - let shift = LogicOp::SRC_MASKS[src_idx].trailing_zeros(); + let mask = LogicOp3::SRC_MASKS[src_idx]; + let shift = LogicOp3::SRC_MASKS[src_idx].trailing_zeros(); if val { let t_bits = self.lut & mask; self.lut = t_bits | (t_bits >> shift) @@ -1496,8 +1496,8 @@ impl LogicOp { } pub fn invert_src(&mut self, src_idx: usize) { - let mask = LogicOp::SRC_MASKS[src_idx]; - let shift = LogicOp::SRC_MASKS[src_idx].trailing_zeros(); + let mask = LogicOp3::SRC_MASKS[src_idx]; + let shift = LogicOp3::SRC_MASKS[src_idx].trailing_zeros(); let t_bits = self.lut & mask; let f_bits = self.lut & !mask; self.lut = (f_bits << shift) | (t_bits >> shift); @@ -1540,7 +1540,7 @@ impl LogicOp { } } -impl fmt::Display for LogicOp { +impl fmt::Display for LogicOp3 { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "LUT[{:#x}]", self.lut) } @@ -2605,7 +2605,7 @@ pub struct OpLop3 { #[src_type(ALU)] pub srcs: [Src; 3], - pub op: LogicOp, + pub op: LogicOp3, } impl DisplayOp for OpLop3 { @@ -2979,7 +2979,7 @@ pub struct OpPLop3 { #[src_type(Pred)] pub srcs: [Src; 3], - pub ops: [LogicOp; 2], + pub ops: [LogicOp3; 2], } impl DisplayOp for OpPLop3 { diff --git a/src/nouveau/compiler/nak/legalize.rs b/src/nouveau/compiler/nak/legalize.rs index e640b98742c..f016d302fba 100644 --- a/src/nouveau/compiler/nak/legalize.rs +++ b/src/nouveau/compiler/nak/legalize.rs @@ -229,7 +229,7 @@ fn legalize_sm70_instr( } Op::Lop3(op) => { /* Fold constants and modifiers if we can */ - op.op = LogicOp::new_lut(&|mut x, mut y, mut z| { + op.op = LogicOp3::new_lut(&|mut x, mut y, mut z| { fold_lop_src(&op.srcs[0], &mut x); fold_lop_src(&op.srcs[1], &mut y); fold_lop_src(&op.srcs[2], &mut z); @@ -245,11 +245,11 @@ fn legalize_sm70_instr( let [ref mut src0, ref mut src1, ref mut src2] = op.srcs; if !src_is_reg(src0) && src_is_reg(src1) { std::mem::swap(src0, src1); - op.op = LogicOp::new_lut(&|x, y, z| op.op.eval(y, x, z)) + op.op = LogicOp3::new_lut(&|x, y, z| op.op.eval(y, x, z)) } if !src_is_reg(src2) && src_is_reg(src1) { std::mem::swap(src2, src1); - op.op = LogicOp::new_lut(&|x, y, z| op.op.eval(x, z, y)) + op.op = LogicOp3::new_lut(&|x, y, z| op.op.eval(x, z, y)) } copy_src_if_not_reg(b, src0, RegFile::GPR); @@ -276,7 +276,7 @@ fn legalize_sm70_instr( Op::PLop3(op) => { /* Fold constants and modifiers if we can */ for lop in &mut op.ops { - *lop = LogicOp::new_lut(&|mut x, mut y, mut z| { + *lop = LogicOp3::new_lut(&|mut x, mut y, mut z| { fold_lop_src(&op.srcs[0], &mut x); fold_lop_src(&op.srcs[1], &mut y); fold_lop_src(&op.srcs[2], &mut z); @@ -294,13 +294,13 @@ fn legalize_sm70_instr( if !src_is_reg(src0) && src_is_reg(src1) { std::mem::swap(src0, src1); for lop in &mut op.ops { - *lop = LogicOp::new_lut(&|x, y, z| lop.eval(y, x, z)); + *lop = LogicOp3::new_lut(&|x, y, z| lop.eval(y, x, z)); } } if !src_is_reg(src2) && src_is_reg(src1) { std::mem::swap(src2, src1); for lop in &mut op.ops { - *lop = LogicOp::new_lut(&|x, y, z| lop.eval(x, z, y)); + *lop = LogicOp3::new_lut(&|x, y, z| lop.eval(x, z, y)); } } diff --git a/src/nouveau/compiler/nak/lower_copy_swap.rs b/src/nouveau/compiler/nak/lower_copy_swap.rs index 24c7fc15575..c6083474892 100644 --- a/src/nouveau/compiler/nak/lower_copy_swap.rs +++ b/src/nouveau/compiler/nak/lower_copy_swap.rs @@ -77,7 +77,7 @@ impl LowerCopySwap { SrcRef::True => { b.lop2_to( copy.dst, - LogicOp::new_const(true), + LogicOp3::new_const(true), Src::new_imm_bool(true), Src::new_imm_bool(true), ); @@ -85,7 +85,7 @@ impl LowerCopySwap { SrcRef::False => { b.lop2_to( copy.dst, - LogicOp::new_const(false), + LogicOp3::new_const(false), Src::new_imm_bool(true), Src::new_imm_bool(true), ); @@ -94,7 +94,7 @@ impl LowerCopySwap { RegFile::Pred => { b.lop2_to( copy.dst, - LogicOp::new_lut(&|x, _, _| x), + LogicOp3::new_lut(&|x, _, _| x), copy.src, Src::new_imm_bool(true), ); @@ -161,12 +161,12 @@ impl LowerCopySwap { dsts: [x.into(), y.into()], srcs: [x.into(), y.into(), Src::new_imm_bool(true)], ops: [ - LogicOp::new_lut(&|_, y, _| y), - LogicOp::new_lut(&|x, _, _| x), + LogicOp3::new_lut(&|_, y, _| y), + LogicOp3::new_lut(&|x, _, _| x), ], }); } else { - let xor = LogicOp::new_lut(&|x, y, _| x ^ y); + let xor = LogicOp3::new_lut(&|x, y, _| x ^ y); b.lop2_to(x.into(), xor, x.into(), y.into()); b.lop2_to(y.into(), xor, x.into(), y.into()); b.lop2_to(x.into(), xor, x.into(), y.into()); diff --git a/src/nouveau/compiler/nak/opt_copy_prop.rs b/src/nouveau/compiler/nak/opt_copy_prop.rs index d89fd0aadcb..d3bf5dec4ba 100644 --- a/src/nouveau/compiler/nak/opt_copy_prop.rs +++ b/src/nouveau/compiler/nak/opt_copy_prop.rs @@ -355,7 +355,7 @@ impl CopyPropPass { ); } else { for s in 0..3 { - if op.lut == LogicOp::SRC_MASKS[s] { + if op.lut == LogicOp3::SRC_MASKS[s] { self.add_copy( dst, SrcType::ALU, @@ -390,13 +390,14 @@ impl CopyPropPass { ); } else { for s in 0..3 { - if op.lut == LogicOp::SRC_MASKS[s] { + if op.lut == LogicOp3::SRC_MASKS[s] { self.add_copy( dst, SrcType::Pred, lop.srcs[s], ); - } else if op.lut == !LogicOp::SRC_MASKS[s] { + } else if op.lut == !LogicOp3::SRC_MASKS[s] + { self.add_copy( dst, SrcType::Pred, diff --git a/src/nouveau/compiler/nak/opt_lop.rs b/src/nouveau/compiler/nak/opt_lop.rs index 064b1caacba..3b0e395ab00 100644 --- a/src/nouveau/compiler/nak/opt_lop.rs +++ b/src/nouveau/compiler/nak/opt_lop.rs @@ -9,7 +9,7 @@ use std::collections::HashMap; use std::slice; struct LopEntry { - op: LogicOp, + op: LogicOp3, srcs_used: u8, srcs: [Src; 3], } @@ -55,7 +55,7 @@ impl LopPass { } } - fn add_lop(&mut self, ssa: SSAValue, op: LogicOp, srcs: [Src; 3]) { + fn add_lop(&mut self, ssa: SSAValue, op: LogicOp3, srcs: [Src; 3]) { let mut srcs_used = 0; for i in 0..3 { if op.src_used(i) { @@ -71,11 +71,11 @@ impl LopPass { self.ssa_lop.insert(ssa, entry); } - fn dedup_srcs(&self, op: &mut LogicOp, srcs: &[Src; 3]) { + fn dedup_srcs(&self, op: &mut LogicOp3, srcs: &[Src; 3]) { for i in 0..2 { for j in (i + 1)..3 { if srcs[i].src_ref == srcs[j].src_ref { - *op = LogicOp::new_lut(&|x, y, z| { + *op = LogicOp3::new_lut(&|x, y, z| { let dup = [x, y, z][i]; let si = match srcs[i].src_mod { SrcMod::None => dup, @@ -101,7 +101,7 @@ impl LopPass { fn try_prop_to_src( &self, - ops: &mut [LogicOp], + ops: &mut [LogicOp3], srcs: &mut [Src; 3], src_idx: usize, ) { @@ -179,7 +179,7 @@ impl LopPass { } } for op in ops.iter_mut() { - *op = LogicOp::new_lut(&|x, y, z| { + *op = LogicOp3::new_lut(&|x, y, z| { let mut s = [x, y, z]; let mut es = [0; 3]; for i in 0..3 {