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i965/fs: Combine the fs_visitor constructors.

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For scalar GS support, we either need to add a fourth constructor which
takes the GS structures, or combine the existing two and pass the shader
stage.

Given that they're not significantly different, I opted for the latter.

v2: Remove more stuff from the .h file (Jason and Jordan).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Kenneth Graunke 2015-03-11 22:41:49 -07:00
parent 0c4eef6a2c
commit 3687d752e5
5 changed files with 20 additions and 74 deletions
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6
src/mesa/drivers/dri/i965/brw_cs.cpp
View file

@ -90,7 +90,8 @@ brw_cs_emit(struct brw_context *brw,
/* Now the main event: Visit the shader IR and generate our CS IR for it.
*/
fs_visitor v8(brw, mem_ctx, key, prog_data, prog, cp, 8);
fs_visitor v8(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
&cp->Base, 8);
if (!v8.run_cs()) {
fail_msg = v8.fail_msg;
} else if (local_workgroup_size <= 8 * brw->max_cs_threads) {
@ -98,7 +99,8 @@ brw_cs_emit(struct brw_context *brw,
prog_data->simd_size = 8;
}
fs_visitor v16(brw, mem_ctx, key, prog_data, prog, cp, 16);
fs_visitor v16(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
&cp->Base, 16);
if (likely(!(INTEL_DEBUG & DEBUG_NO16)) &&
!fail_msg && !v8.simd16_unsupported &&
local_workgroup_size <= 16 * brw->max_cs_threads) {

6
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -4303,7 +4303,8 @@ brw_wm_fs_emit(struct brw_context *brw,
/* Now the main event: Visit the shader IR and generate our FS IR for it.
*/
fs_visitor v(brw, mem_ctx, key, prog_data, prog, fp, 8);
fs_visitor v(brw, mem_ctx, MESA_SHADER_FRAGMENT, key, &prog_data->base,
prog, &fp->Base, 8);
if (!v.run_fs()) {
if (prog) {
prog->LinkStatus = false;
@ -4317,7 +4318,8 @@ brw_wm_fs_emit(struct brw_context *brw,
}
cfg_t *simd16_cfg = NULL;
fs_visitor v2(brw, mem_ctx, key, prog_data, prog, fp, 16);
fs_visitor v2(brw, mem_ctx, MESA_SHADER_FRAGMENT, key, &prog_data->base,
prog, &fp->Base, 16);
if (likely(!(INTEL_DEBUG & DEBUG_NO16) || brw->use_rep_send)) {
if (!v.simd16_unsupported) {
/* Try a SIMD16 compile */

24
src/mesa/drivers/dri/i965/brw_fs.h
View file

@ -75,30 +75,14 @@ public:
fs_visitor(struct brw_context *brw,
void *mem_ctx,
const struct brw_wm_prog_key *key,
struct brw_wm_prog_data *prog_data,
gl_shader_stage stage,
const void *key,
struct brw_stage_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_fragment_program *fp,
unsigned dispatch_width);
fs_visitor(struct brw_context *brw,
void *mem_ctx,
const struct brw_vs_prog_key *key,
struct brw_vs_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_vertex_program *cp,
unsigned dispatch_width);
fs_visitor(struct brw_context *brw,
void *mem_ctx,
const struct brw_cs_prog_key *key,
struct brw_cs_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_compute_program *cp,
struct gl_program *prog,
unsigned dispatch_width);
~fs_visitor();
void init();
fs_reg *variable_storage(ir_variable *var);
fs_reg vgrf(const glsl_type *const type);

55
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
View file

@ -4144,64 +4144,21 @@ fs_visitor::resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg)
fs_visitor::fs_visitor(struct brw_context *brw,
void *mem_ctx,
const struct brw_wm_prog_key *key,
struct brw_wm_prog_data *prog_data,
gl_shader_stage stage,
const void *key,
struct brw_stage_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_fragment_program *fp,
struct gl_program *prog,
unsigned dispatch_width)
: backend_visitor(brw, shader_prog, &fp->Base, &prog_data->base,
MESA_SHADER_FRAGMENT),
: backend_visitor(brw, shader_prog, prog, prog_data, stage),
reg_null_f(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_F)),
reg_null_d(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_D)),
reg_null_ud(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_UD)),
key(key), prog_data(&prog_data->base),
key(key), prog_data(prog_data),
dispatch_width(dispatch_width), promoted_constants(0)
{
this->mem_ctx = mem_ctx;
init();
}
fs_visitor::fs_visitor(struct brw_context *brw,
void *mem_ctx,
const struct brw_vs_prog_key *key,
struct brw_vs_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_vertex_program *cp,
unsigned dispatch_width)
: backend_visitor(brw, shader_prog, &cp->Base, &prog_data->base.base,
MESA_SHADER_VERTEX),
reg_null_f(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_F)),
reg_null_d(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_D)),
reg_null_ud(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_UD)),
key(key), prog_data(&prog_data->base.base),
dispatch_width(dispatch_width), promoted_constants(0)
{
this->mem_ctx = mem_ctx;
init();
}
fs_visitor::fs_visitor(struct brw_context *brw,
void *mem_ctx,
const struct brw_cs_prog_key *key,
struct brw_cs_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_compute_program *cp,
unsigned dispatch_width)
: backend_visitor(brw, shader_prog, &cp->Base, &prog_data->base,
MESA_SHADER_COMPUTE),
reg_null_f(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_F)),
reg_null_d(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_D)),
reg_null_ud(retype(brw_null_vec(dispatch_width), BRW_REGISTER_TYPE_UD)),
key(key), prog_data(&prog_data->base),
dispatch_width(dispatch_width), promoted_constants(0)
{
this->mem_ctx = mem_ctx;
init();
}
void
fs_visitor::init()
{
switch (stage) {
case MESA_SHADER_FRAGMENT:
key_tex = &((const brw_wm_prog_key *) key)->tex;

3
src/mesa/drivers/dri/i965/brw_vec4.cpp
View file

@ -1895,7 +1895,8 @@ brw_vs_emit(struct brw_context *brw,
}
if (brw->scalar_vs && (prog || use_nir)) {
fs_visitor v(brw, mem_ctx, &c->key, prog_data, prog, &c->vp->program, 8);
fs_visitor v(brw, mem_ctx, MESA_SHADER_VERTEX, &c->key,
&prog_data->base.base, prog, &c->vp->program.Base, 8);
if (!v.run_vs()) {
if (prog) {
prog->LinkStatus = false;