anv: program relative push set offset for descriptor buffers device bindable shaders

Up to now all push descriptor accesses where going through the binding
table. That's not going to be the case anymore with descriptor buffers
device bindable shaders. Those will do A64 messages to read the
descriptor buffer (for example when build a bounded 64bit address for
storage buffers, or 64bit image format atomic emulation, etc...)

We need to have the offset relative to the push descriptor heap
(internal_state_heap in this case).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31384>
This commit is contained in:
Lionel Landwerlin 2026-04-16 10:17:30 +03:00 committed by Marge Bot
parent 4960e103ef
commit 35b0d3569e

View file

@ -3383,10 +3383,10 @@ compute_descriptor_set_surface_offset(const struct anv_cmd_buffer *cmd_buffer,
const uint32_t set_idx)
{
const struct anv_physical_device *device = cmd_buffer->device->physical;
const int32_t buffer_index =
pipe_state->descriptor_buffers[set_idx].buffer_index;
if (intel_has_extended_bindless(&device->info)) {
int32_t buffer_index =
pipe_state->descriptor_buffers[set_idx].buffer_index;
uint64_t buffer_address =
buffer_index == -1 ?
device->va.push_descriptor_buffer_pool.addr :
@ -3396,6 +3396,14 @@ compute_descriptor_set_surface_offset(const struct anv_cmd_buffer *cmd_buffer,
pipe_state->descriptor_buffers[set_idx].buffer_offset;
}
/* Pre Gfx12.0, the push descriptor in EXT_descriptor_buffer mode is always
* accessed through the binding table. With exception to the descriptor
* reads going through A64 message, the offset for the A64 message is
* relative to the device->va.internal_surface_state_pool.addr
*/
if (buffer_index == -1)
return pipe_state->descriptor_buffers[set_idx].buffer_offset;
const uint32_t descriptor_buffer_align =
cmd_buffer->state.descriptor_buffers.surfaces_address % 4096;