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broadcom/compiler: use scoped barriers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23228>
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3 changed files with 34 additions and 41 deletions
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@ -3505,54 +3505,45 @@ ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr)
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break;
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}
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case nir_intrinsic_memory_barrier:
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case nir_intrinsic_memory_barrier_buffer:
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case nir_intrinsic_memory_barrier_image:
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case nir_intrinsic_memory_barrier_shared:
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case nir_intrinsic_memory_barrier_tcs_patch:
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case nir_intrinsic_group_memory_barrier:
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/* We don't do any instruction scheduling of these NIR
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* instructions between each other, so we just need to make
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* sure that the TMU operations before the barrier are flushed
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case nir_intrinsic_scoped_barrier:
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/* Ensure that the TMU operations before the barrier are flushed
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* before the ones after the barrier.
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*/
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ntq_flush_tmu(c);
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break;
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case nir_intrinsic_control_barrier:
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/* Emit a TSY op to get all invocations in the workgroup
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* (actually supergroup) to block until the last invocation
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* reaches the TSY op.
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*/
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ntq_flush_tmu(c);
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if (nir_intrinsic_execution_scope(instr) != NIR_SCOPE_NONE) {
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/* Ensure we flag the use of the control barrier. NIR's
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* gather info pass usually takes care of this, but that
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* requires that we call that pass after any other pass
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* may emit a control barrier, so this is safer.
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*/
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c->s->info.uses_control_barrier = true;
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/* Ensure we flag the use of the control barrier. NIR's
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* gather info pass usually takes care of this, but that
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* requires that we call that pass after any other pass
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* may emit a control barrier, so this is safer.
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*/
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c->s->info.uses_control_barrier = true;
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/* Emit a TSY op to get all invocations in the workgroup
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* (actually supergroup) to block until the last
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* invocation reaches the TSY op.
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*/
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if (c->devinfo->ver >= 42) {
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vir_BARRIERID_dest(c, vir_reg(QFILE_MAGIC,
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V3D_QPU_WADDR_SYNCB));
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} else {
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struct qinst *sync =
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vir_BARRIERID_dest(c,
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vir_reg(QFILE_MAGIC,
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V3D_QPU_WADDR_SYNCU));
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sync->uniform =
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vir_get_uniform_index(c, QUNIFORM_CONSTANT,
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0xffffff00 |
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V3D_TSY_WAIT_INC_CHECK);
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if (c->devinfo->ver >= 42) {
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vir_BARRIERID_dest(c, vir_reg(QFILE_MAGIC,
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V3D_QPU_WADDR_SYNCB));
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} else {
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struct qinst *sync =
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vir_BARRIERID_dest(c,
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vir_reg(QFILE_MAGIC,
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V3D_QPU_WADDR_SYNCU));
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sync->uniform =
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vir_get_uniform_index(c, QUNIFORM_CONSTANT,
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0xffffff00 |
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V3D_TSY_WAIT_INC_CHECK);
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}
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/* The blocking of a TSY op only happens at the next
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* thread switch. No texturing may be outstanding at the
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* time of a TSY blocking operation.
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*/
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vir_emit_thrsw(c);
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}
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/* The blocking of a TSY op only happens at the next thread
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* switch. No texturing may be outstanding at the time of a
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* TSY blocking operation.
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*/
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vir_emit_thrsw(c);
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break;
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case nir_intrinsic_load_num_workgroups:
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@ -238,7 +238,8 @@ const nir_shader_compiler_options v3dv_nir_options = {
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.max_unroll_iterations = 16,
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.force_indirect_unrolling = (nir_var_shader_in | nir_var_function_temp),
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.divergence_analysis_options =
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nir_divergence_multiple_workgroup_per_compute_subgroup
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nir_divergence_multiple_workgroup_per_compute_subgroup,
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.use_scoped_barrier = true,
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};
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const nir_shader_compiler_options *
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@ -743,6 +743,7 @@ static const nir_shader_compiler_options v3d_nir_options = {
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*/
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.max_unroll_iterations = 16,
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.force_indirect_unrolling_sampler = true,
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.use_scoped_barrier = true,
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};
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static const void *
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