diff --git a/src/amd/compiler/aco_insert_NOPs.cpp b/src/amd/compiler/aco_insert_NOPs.cpp index 2269324e7d4..8cf42811ab0 100644 --- a/src/amd/compiler/aco_insert_NOPs.cpp +++ b/src/amd/compiler/aco_insert_NOPs.cpp @@ -1052,9 +1052,7 @@ handle_lds_direct_valu_hazard_instr(LdsDirectVALUHazardGlobalState& global_state aco_ptr& instr) { if (instr->isVALU() || instr->isVINTERP_INREG()) { - instr_class cls = instr_info.classes[(int)instr->opcode]; - block_state.has_trans |= cls == instr_class::valu_transcendental32 || - cls == instr_class::valu_double_transcendental; + block_state.has_trans |= instr->isTrans(); bool uses_vgpr = false; for (Definition& def : instr->definitions) @@ -1340,9 +1338,7 @@ handle_instruction_gfx11(State& state, NOP_ctx_gfx11& ctx, aco_ptr& ctx.sgpr_read_by_valu_as_lanemask_then_wr_by_salu.reset(); if (instr->isVALU() || instr->isVINTERP_INREG()) { - instr_class cls = instr_info.classes[(int)instr->opcode]; - bool is_trans = cls == instr_class::valu_transcendental32 || - cls == instr_class::valu_double_transcendental; + bool is_trans = instr->isTrans(); ctx.valu_since_wr_by_trans.inc(); if (is_trans) diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp index db283ea3bd6..dff36a71c79 100644 --- a/src/amd/compiler/aco_ir.cpp +++ b/src/amd/compiler/aco_ir.cpp @@ -981,4 +981,11 @@ dealloc_vgprs(Program* program) return true; } +bool +Instruction::isTrans() const noexcept +{ + return instr_info.classes[(int)opcode] == instr_class::valu_transcendental32 || + instr_info.classes[(int)opcode] == instr_class::valu_double_transcendental; +} + } // namespace aco diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h index 0b08ccf07da..f87f90df780 100644 --- a/src/amd/compiler/aco_ir.h +++ b/src/amd/compiler/aco_ir.h @@ -1381,6 +1381,8 @@ struct Instruction { } constexpr bool isVMEM() const noexcept { return isMTBUF() || isMUBUF() || isMIMG(); } + + bool isTrans() const noexcept; }; static_assert(sizeof(Instruction) == 16, "Unexpected padding");