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i965/vec4: Add the ability to suppress register spilling.
In future patches, this will allow us to first try compiling a geometry shader in DUAL_OBJECT mode (which is more efficient but uses more registers) and then if spilling is required, fall back on DUAL_INSTANCED mode. Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
parent
89647cffb3
commit
34cba13ef8
7 changed files with 23 additions and 10 deletions
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@ -230,7 +230,8 @@ public:
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struct gl_shader_program *shader_prog,
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struct brw_shader *shader,
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void *mem_ctx,
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bool debug_flag);
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bool debug_flag,
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bool no_spills);
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~vec4_visitor();
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dst_reg dst_null_f()
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@ -529,6 +530,12 @@ protected:
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virtual int compute_array_stride(ir_dereference_array *ir);
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const bool debug_flag;
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private:
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/**
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* If true, then register allocation should fail instead of spilling.
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*/
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const bool no_spills;
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};
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@ -37,10 +37,11 @@ vec4_gs_visitor::vec4_gs_visitor(struct brw_context *brw,
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struct brw_gs_compile *c,
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struct gl_shader_program *prog,
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struct brw_shader *shader,
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void *mem_ctx)
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void *mem_ctx,
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bool no_spills)
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: vec4_visitor(brw, &c->base, &c->gp->program.Base, &c->key.base,
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&c->prog_data.base, prog, shader, mem_ctx,
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INTEL_DEBUG & DEBUG_GS),
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INTEL_DEBUG & DEBUG_GS, no_spills),
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c(c)
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{
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}
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@ -533,7 +534,7 @@ brw_gs_emit(struct brw_context *brw,
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printf("\n\n");
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}
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vec4_gs_visitor v(brw, c, prog, shader, mem_ctx);
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vec4_gs_visitor v(brw, c, prog, shader, mem_ctx, false /* no_spills */);
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if (!v.run()) {
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prog->LinkStatus = false;
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ralloc_strcat(&prog->InfoLog, v.fail_msg);
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@ -81,7 +81,8 @@ public:
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struct brw_gs_compile *c,
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struct gl_shader_program *prog,
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struct brw_shader *shader,
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void *mem_ctx);
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void *mem_ctx,
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bool no_spills);
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protected:
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virtual dst_reg *make_reg_for_system_value(ir_variable *ir);
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@ -214,7 +214,10 @@ vec4_visitor::reg_allocate()
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* loop back into here to try again.
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*/
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int reg = choose_spill_reg(g);
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if (reg == -1) {
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if (this->no_spills) {
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fail("Failure to register allocate. Reduce number of live "
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"values to avoid this.");
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} else if (reg == -1) {
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fail("no register to spill\n");
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} else {
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spill_reg(reg);
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@ -3143,8 +3143,9 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
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struct gl_shader_program *shader_prog,
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struct brw_shader *shader,
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void *mem_ctx,
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bool debug_flag)
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: debug_flag(debug_flag)
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bool debug_flag,
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bool no_spills)
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: debug_flag(debug_flag), no_spills(no_spills)
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{
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this->brw = brw;
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this->ctx = &brw->ctx;
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@ -215,7 +215,7 @@ vec4_vs_visitor::vec4_vs_visitor(struct brw_context *brw,
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void *mem_ctx)
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: vec4_visitor(brw, &vs_compile->base, &vs_compile->vp->program.Base,
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&vs_compile->key.base, &vs_prog_data->base, prog, shader,
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mem_ctx, INTEL_DEBUG & DEBUG_VS),
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mem_ctx, INTEL_DEBUG & DEBUG_VS, false /* no_spills */),
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vs_compile(vs_compile),
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vs_prog_data(vs_prog_data)
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{
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@ -49,7 +49,7 @@ public:
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register_coalesce_vec4_visitor(struct brw_context *brw,
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struct gl_shader_program *shader_prog)
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: vec4_visitor(brw, NULL, NULL, NULL, NULL, shader_prog, NULL, NULL,
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false)
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false, false /* no_spills */)
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{
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}
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