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anv: Move get_fast_clear_state_address into anv_private.h
While we're at it, we break it into two nicely named functions. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
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8915621882
commit
34b95f88e6
2 changed files with 33 additions and 50 deletions
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@ -2488,6 +2488,33 @@ anv_fast_clear_state_entry_size(const struct anv_device *device)
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return device->isl_dev.ss.clear_value_size + 4;
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}
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static inline struct anv_address
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anv_image_get_clear_color_addr(const struct anv_device *device,
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const struct anv_image *image,
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VkImageAspectFlagBits aspect,
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unsigned level)
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{
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uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
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return (struct anv_address) {
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.bo = image->planes[plane].bo,
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.offset = image->planes[plane].bo_offset +
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image->planes[plane].fast_clear_state_offset +
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anv_fast_clear_state_entry_size(device) * level,
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};
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}
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static inline struct anv_address
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anv_image_get_needs_resolve_addr(const struct anv_device *device,
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const struct anv_image *image,
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VkImageAspectFlagBits aspect,
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unsigned level)
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{
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struct anv_address addr =
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anv_image_get_clear_color_addr(device, image, aspect, level);
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addr.offset += device->isl_dev.ss.clear_value_size;
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return addr;
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}
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/* Returns true if a HiZ-enabled depth buffer can be sampled from. */
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static inline bool
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anv_can_sample_with_hiz(const struct gen_device_info * const devinfo,
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@ -426,45 +426,6 @@ transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer,
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anv_gen8_hiz_op_resolve(cmd_buffer, image, hiz_op);
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}
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enum fast_clear_state_field {
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FAST_CLEAR_STATE_FIELD_CLEAR_COLOR,
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FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE,
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};
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static inline struct anv_address
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get_fast_clear_state_address(const struct anv_device *device,
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const struct anv_image *image,
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VkImageAspectFlagBits aspect,
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unsigned level,
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enum fast_clear_state_field field)
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{
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assert(device && image);
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assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
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assert(level < anv_image_aux_levels(image, aspect));
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uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
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/* Refer to the definition of anv_image for the memory layout. */
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uint32_t offset = image->planes[plane].fast_clear_state_offset;
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offset += anv_fast_clear_state_entry_size(device) * level;
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switch (field) {
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case FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE:
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offset += device->isl_dev.ss.clear_value_size;
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/* Fall-through */
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case FAST_CLEAR_STATE_FIELD_CLEAR_COLOR:
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break;
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}
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assert(offset < image->planes[plane].surface.offset + image->planes[plane].size);
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return (struct anv_address) {
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.bo = image->planes[plane].bo,
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.offset = image->planes[plane].bo_offset + offset,
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};
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}
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#define MI_PREDICATE_SRC0 0x2400
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#define MI_PREDICATE_SRC1 0x2408
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@ -481,16 +442,13 @@ genX(set_image_needs_resolve)(struct anv_cmd_buffer *cmd_buffer,
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assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
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assert(level < anv_image_aux_levels(image, aspect));
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const struct anv_address resolve_flag_addr =
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get_fast_clear_state_address(cmd_buffer->device, image, aspect, level,
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FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE);
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/* The HW docs say that there is no way to guarantee the completion of
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* the following command. We use it nevertheless because it shows no
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* issues in testing is currently being used in the GL driver.
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*/
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anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
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sdi.Address = resolve_flag_addr;
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sdi.Address = anv_image_get_needs_resolve_addr(cmd_buffer->device,
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image, aspect, level);
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sdi.ImmediateData = needs_resolve;
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}
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}
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@ -506,8 +464,8 @@ genX(load_needs_resolve_predicate)(struct anv_cmd_buffer *cmd_buffer,
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assert(level < anv_image_aux_levels(image, aspect));
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const struct anv_address resolve_flag_addr =
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get_fast_clear_state_address(cmd_buffer->device, image, aspect, level,
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FAST_CLEAR_STATE_FIELD_NEEDS_RESOLVE);
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anv_image_get_needs_resolve_addr(cmd_buffer->device,
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image, aspect, level);
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/* Make the pending predicated resolve a no-op if one is not needed.
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* predicate = do_resolve = resolve_flag != 0;
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@ -558,8 +516,7 @@ init_fast_clear_state_entry(struct anv_cmd_buffer *cmd_buffer,
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* values in the clear value dword(s).
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*/
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struct anv_address addr =
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get_fast_clear_state_address(cmd_buffer->device, image, aspect, level,
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FAST_CLEAR_STATE_FIELD_CLEAR_COLOR);
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anv_image_get_clear_color_addr(cmd_buffer->device, image, aspect, level);
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unsigned i = 0;
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for (; i < cmd_buffer->device->isl_dev.ss.clear_value_size; i += 4) {
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anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
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@ -612,8 +569,7 @@ genX(copy_fast_clear_dwords)(struct anv_cmd_buffer *cmd_buffer,
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uint32_t ss_clear_offset = surface_state.offset +
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cmd_buffer->device->isl_dev.ss.clear_value_offset;
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const struct anv_address entry_addr =
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get_fast_clear_state_address(cmd_buffer->device, image, aspect, level,
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FAST_CLEAR_STATE_FIELD_CLEAR_COLOR);
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anv_image_get_clear_color_addr(cmd_buffer->device, image, aspect, level);
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unsigned copy_size = cmd_buffer->device->isl_dev.ss.clear_value_size;
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if (copy_from_surface_state) {
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