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intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.

Browse source 
The slightly less mechanical change of converting the emit_reloc calls
will follow.
This commit is contained in:
Eric Anholt 2010-06-07 09:52:57 -07:00
parent 22409756d4
commit 34474fa411
44 changed files with 277 additions and 272 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/mesa/drivers/dri/i915/i830_context.h
View file

@ -131,7 +131,7 @@ struct i830_hw_state
* be from a PBO or FBO. Will have to do this for draw and depth for
* FBO's...
*/
dri_bo *tex_buffer[I830_TEX_UNITS];
drm_intel_bo *tex_buffer[I830_TEX_UNITS];
GLuint tex_offset[I830_TEX_UNITS];
GLuint emitted; /* I810_UPLOAD_* */

6
src/mesa/drivers/dri/i915/i830_texstate.c
View file

@ -129,7 +129,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
/*We need to refcount these. */
if (i830->state.tex_buffer[unit] != NULL) {
dri_bo_unreference(i830->state.tex_buffer[unit]);
drm_intel_bo_unreference(i830->state.tex_buffer[unit]);
i830->state.tex_buffer[unit] = NULL;
}
@ -144,7 +144,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
intel_miptree_get_image_offset(intelObj->mt, intelObj->firstLevel, 0, 0,
&dst_x, &dst_y);
dri_bo_reference(intelObj->mt->region->buffer);
drm_intel_bo_reference(intelObj->mt->region->buffer);
i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
pitch = intelObj->mt->region->pitch * intelObj->mt->cpp;
@ -327,7 +327,7 @@ i830UpdateTextureState(struct intel_context *intel)
I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(i), GL_FALSE);
if (i830->state.tex_buffer[i] != NULL) {
dri_bo_unreference(i830->state.tex_buffer[i]);
drm_intel_bo_unreference(i830->state.tex_buffer[i]);
i830->state.tex_buffer[i] = NULL;
}
break;

4
src/mesa/drivers/dri/i915/i830_vtbl.c
View file

@ -415,7 +415,7 @@ i830_emit_state(struct intel_context *intel)
struct i830_hw_state *state = &i830->state;
int i, count;
GLuint dirty;
dri_bo *aper_array[3 + I830_TEX_UNITS];
drm_intel_bo *aper_array[3 + I830_TEX_UNITS];
int aper_count;
GET_CURRENT_CONTEXT(ctx);
BATCH_LOCALS;
@ -576,7 +576,7 @@ i830_destroy_context(struct intel_context *intel)
for (i = 0; i < I830_TEX_UNITS; i++) {
if (i830->state.tex_buffer[i] != NULL) {
dri_bo_unreference(i830->state.tex_buffer[i]);
drm_intel_bo_unreference(i830->state.tex_buffer[i]);
i830->state.tex_buffer[i] = NULL;
}
}

2
src/mesa/drivers/dri/i915/i915_context.h
View file

@ -237,7 +237,7 @@ struct i915_hw_state
* be from a PBO or FBO. Will have to do this for draw and depth for
* FBO's...
*/
dri_bo *tex_buffer[I915_TEX_UNITS];
drm_intel_bo *tex_buffer[I915_TEX_UNITS];
GLuint tex_offset[I915_TEX_UNITS];

6
src/mesa/drivers/dri/i915/i915_texstate.c
View file

@ -146,7 +146,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
/*We need to refcount these. */
if (i915->state.tex_buffer[unit] != NULL) {
dri_bo_unreference(i915->state.tex_buffer[unit]);
drm_intel_bo_unreference(i915->state.tex_buffer[unit]);
i915->state.tex_buffer[unit] = NULL;
}
@ -158,7 +158,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
*/
firstImage = tObj->Image[0][intelObj->firstLevel];
dri_bo_reference(intelObj->mt->region->buffer);
drm_intel_bo_reference(intelObj->mt->region->buffer);
i915->state.tex_buffer[unit] = intelObj->mt->region->buffer;
i915->state.tex_offset[unit] = 0; /* Always the origin of the miptree */
@ -397,7 +397,7 @@ i915UpdateTextureState(struct intel_context *intel)
I915_ACTIVESTATE(i915, I915_UPLOAD_TEX(i), GL_FALSE);
if (i915->state.tex_buffer[i] != NULL) {
dri_bo_unreference(i915->state.tex_buffer[i]);
drm_intel_bo_unreference(i915->state.tex_buffer[i]);
i915->state.tex_buffer[i] = NULL;
}

4
src/mesa/drivers/dri/i915/i915_vtbl.c
View file

@ -287,7 +287,7 @@ i915_emit_state(struct intel_context *intel)
struct i915_hw_state *state = &i915->state;
int i, count, aper_count;
GLuint dirty;
dri_bo *aper_array[3 + I915_TEX_UNITS];
drm_intel_bo *aper_array[3 + I915_TEX_UNITS];
GET_CURRENT_CONTEXT(ctx);
BATCH_LOCALS;
@ -497,7 +497,7 @@ i915_destroy_context(struct intel_context *intel)
for (i = 0; i < I915_TEX_UNITS; i++) {
if (i915->state.tex_buffer[i] != NULL) {
dri_bo_unreference(i915->state.tex_buffer[i]);
drm_intel_bo_unreference(i915->state.tex_buffer[i]);
i915->state.tex_buffer[i] = NULL;
}
}

18
src/mesa/drivers/dri/i915/intel_tris.c
View file

@ -179,8 +179,8 @@ uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count)
/* Start a new VB */
if (intel->prim.vb == NULL)
intel->prim.vb = malloc(INTEL_VB_SIZE);
intel->prim.vb_bo = dri_bo_alloc(intel->bufmgr, "vb",
INTEL_VB_SIZE, 4);
intel->prim.vb_bo = drm_intel_bo_alloc(intel->bufmgr, "vb",
INTEL_VB_SIZE, 4);
intel->prim.start_offset = 0;
intel->prim.current_offset = 0;
}
@ -197,8 +197,8 @@ uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count)
/** Dispatches the accumulated primitive to the batchbuffer. */
void intel_flush_prim(struct intel_context *intel)
{
dri_bo *aper_array[2];
dri_bo *vb_bo;
drm_intel_bo *aper_array[2];
drm_intel_bo *vb_bo;
unsigned int offset, count;
BATCH_LOCALS;
@ -212,7 +212,7 @@ void intel_flush_prim(struct intel_context *intel)
* flush triggered by emit_state doesn't loop back to flush_prim again.
*/
vb_bo = intel->prim.vb_bo;
dri_bo_reference(vb_bo);
drm_intel_bo_reference(vb_bo);
count = intel->prim.count;
intel->prim.count = 0;
offset = intel->prim.start_offset;
@ -296,7 +296,7 @@ void intel_flush_prim(struct intel_context *intel)
intel->no_batch_wrap = GL_FALSE;
dri_bo_unreference(vb_bo);
drm_intel_bo_unreference(vb_bo);
}
/**
@ -315,9 +315,9 @@ void intel_finish_vb(struct intel_context *intel)
if (intel->prim.vb_bo == NULL)
return;
dri_bo_subdata(intel->prim.vb_bo, 0, intel->prim.start_offset,
intel->prim.vb);
dri_bo_unreference(intel->prim.vb_bo);
drm_intel_bo_subdata(intel->prim.vb_bo, 0, intel->prim.start_offset,
intel->prim.vb);
drm_intel_bo_unreference(intel->prim.vb_bo);
intel->prim.vb_bo = NULL;
}

8
src/mesa/drivers/dri/i965/brw_cc.c
View file

@ -53,7 +53,7 @@ static void prepare_cc_vp( struct brw_context *brw )
ccv.max_depth = 1.0;
}
dri_bo_unreference(brw->cc.vp_bo);
drm_intel_bo_unreference(brw->cc.vp_bo);
brw->cc.vp_bo = brw_cache_data(&brw->cache, BRW_CC_VP, &ccv, sizeof(ccv),
NULL, 0);
}
@ -184,11 +184,11 @@ cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key)
/**
* Creates the state cache entry for the given CC unit key.
*/
static dri_bo *
static drm_intel_bo *
cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
{
struct brw_cc_unit_state cc;
dri_bo *bo;
drm_intel_bo *bo;
memset(&cc, 0, sizeof(cc));
@ -312,7 +312,7 @@ static void prepare_cc_unit( struct brw_context *brw )
cc_unit_populate_key(brw, &key);
dri_bo_unreference(brw->cc.state_bo);
drm_intel_bo_unreference(brw->cc.state_bo);
brw->cc.state_bo = brw_search_cache(&brw->cache, BRW_CC_UNIT,
&key, sizeof(key),
&brw->cc.vp_bo, 1,

4
src/mesa/drivers/dri/i965/brw_clip.c
View file

@ -136,7 +136,7 @@ static void compile_clip_prog( struct brw_context *brw,
/* Upload
*/
dri_bo_unreference(brw->clip.prog_bo);
drm_intel_bo_unreference(brw->clip.prog_bo);
brw->clip.prog_bo = brw_upload_cache_with_auxdata(&brw->cache,
BRW_CLIP_PROG,
&c.key, sizeof(c.key),
@ -260,7 +260,7 @@ static void upload_clip_prog(struct brw_context *brw)
}
}
dri_bo_unreference(brw->clip.prog_bo);
drm_intel_bo_unreference(brw->clip.prog_bo);
brw->clip.prog_bo = brw_search_cache(&brw->cache, BRW_CLIP_PROG,
&key, sizeof(key),
NULL, 0,

6
src/mesa/drivers/dri/i965/brw_clip_state.c
View file

@ -69,13 +69,13 @@ clip_unit_populate_key(struct brw_context *brw, struct brw_clip_unit_key *key)
key->depth_clamp = ctx->Transform.DepthClamp;
}
static dri_bo *
static drm_intel_bo *
clip_unit_create_from_key(struct brw_context *brw,
struct brw_clip_unit_key *key)
{
struct intel_context *intel = &brw->intel;
struct brw_clip_unit_state clip;
dri_bo *bo;
drm_intel_bo *bo;
memset(&clip, 0, sizeof(clip));
@ -162,7 +162,7 @@ static void upload_clip_unit( struct brw_context *brw )
clip_unit_populate_key(brw, &key);
dri_bo_unreference(brw->clip.state_bo);
drm_intel_bo_unreference(brw->clip.state_bo);
brw->clip.state_bo = brw_search_cache(&brw->cache, BRW_CLIP_UNIT,
&key, sizeof(key),
&brw->clip.prog_bo, 1,

79
src/mesa/drivers/dri/i965/brw_context.h
View file

@ -160,7 +160,7 @@ struct brw_state_flags {
struct brw_vertex_program {
struct gl_vertex_program program;
GLuint id;
dri_bo *const_buffer; /** Program constant buffer/surface */
drm_intel_bo *const_buffer; /** Program constant buffer/surface */
GLboolean use_const_buffer;
};
@ -172,7 +172,7 @@ struct brw_fragment_program {
GLboolean isGLSL; /**< really, any IF/LOOP/CONT/BREAK instructions */
GLboolean use_const_buffer;
dri_bo *const_buffer; /** Program constant buffer/surface */
drm_intel_bo *const_buffer; /** Program constant buffer/surface */
/** for debugging, which texture units are referenced */
GLbitfield tex_units_used;
@ -318,10 +318,10 @@ struct brw_cache_item {
GLuint hash;
GLuint key_size; /* for variable-sized keys */
const void *key;
dri_bo **reloc_bufs;
drm_intel_bo **reloc_bufs;
GLuint nr_reloc_bufs;
dri_bo *bo;
drm_intel_bo *bo;
struct brw_cache_item *next;
};
@ -339,7 +339,7 @@ struct brw_cache {
/* Record of the last BOs chosen for each cache_id. Used to set
* brw->state.dirty.cache when a new cache item is chosen.
*/
dri_bo *last_bo[BRW_MAX_CACHE];
drm_intel_bo *last_bo[BRW_MAX_CACHE];
};
@ -406,7 +406,7 @@ struct brw_vertex_element {
/** Offset of the first element within the buffer object */
unsigned int offset;
/** Buffer object containing the uploaded vertex data */
dri_bo *bo;
drm_intel_bo *bo;
};
@ -419,7 +419,7 @@ struct brw_query_object {
struct gl_query_object Base;
/** Last query BO associated with this query. */
dri_bo *bo;
drm_intel_bo *bo;
/** First index in bo with query data for this object. */
int first_index;
/** Last index in bo with query data for this object. */
@ -451,15 +451,16 @@ struct brw_context
/**
* List of buffers accumulated in brw_validate_state to receive
* dri_bo_check_aperture treatment before exec, so we can know if we
* should flush the batch and try again before emitting primitives.
* drm_intel_bo_check_aperture treatment before exec, so we can
* know if we should flush the batch and try again before
* emitting primitives.
*
* This can be a fixed number as we only have a limited number of
* objects referenced from the batchbuffer in a primitive emit,
* consisting of the vertex buffers, pipelined state pointers,
* the CURBE, the depth buffer, and a query BO.
*/
dri_bo *validated_bos[VERT_ATTRIB_MAX + 16];
drm_intel_bo *validated_bos[VERT_ATTRIB_MAX + 16];
int validated_bo_count;
} state;
@ -477,7 +478,7 @@ struct brw_context
#define BRW_UPLOAD_INIT_SIZE (128*1024)
struct {
dri_bo *bo;
drm_intel_bo *bo;
GLuint offset;
} upload;
@ -497,7 +498,7 @@ struct brw_context
const struct _mesa_index_buffer *ib;
/* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
dri_bo *bo;
drm_intel_bo *bo;
unsigned int offset;
unsigned int size;
/* Offset to index buffer index to use in CMD_3D_PRIM so that we can
@ -566,7 +567,7 @@ struct brw_context
GLuint vs_size;
GLuint total_size;
dri_bo *curbe_bo;
drm_intel_bo *curbe_bo;
/** Offset within curbe_bo of space for current curbe entry */
GLuint curbe_offset;
/** Offset within curbe_bo of space for next curbe entry */
@ -580,12 +581,12 @@ struct brw_context
struct brw_vs_prog_data *prog_data;
int8_t *constant_map; /* variable array following prog_data */
dri_bo *prog_bo;
dri_bo *state_bo;
drm_intel_bo *prog_bo;
drm_intel_bo *state_bo;
/** Binding table of pointers to surf_bo entries */
dri_bo *bind_bo;
dri_bo *surf_bo[BRW_VS_MAX_SURF];
drm_intel_bo *bind_bo;
drm_intel_bo *surf_bo[BRW_VS_MAX_SURF];
GLuint nr_surfaces;
} vs;
@ -593,25 +594,25 @@ struct brw_context
struct brw_gs_prog_data *prog_data;
GLboolean prog_active;
dri_bo *prog_bo;
dri_bo *state_bo;
drm_intel_bo *prog_bo;
drm_intel_bo *state_bo;
} gs;
struct {
struct brw_clip_prog_data *prog_data;
dri_bo *prog_bo;
dri_bo *state_bo;
dri_bo *vp_bo;
drm_intel_bo *prog_bo;
drm_intel_bo *state_bo;
drm_intel_bo *vp_bo;
} clip;
struct {
struct brw_sf_prog_data *prog_data;
dri_bo *prog_bo;
dri_bo *state_bo;
dri_bo *vp_bo;
drm_intel_bo *prog_bo;
drm_intel_bo *state_bo;
drm_intel_bo *vp_bo;
} sf;
struct {
@ -624,42 +625,42 @@ struct brw_context
GLbitfield input_size_masks[4];
/** Array of surface default colors (texture border color) */
dri_bo *sdc_bo[BRW_MAX_TEX_UNIT];
drm_intel_bo *sdc_bo[BRW_MAX_TEX_UNIT];
GLuint render_surf;
GLuint nr_surfaces;
GLuint max_threads;
dri_bo *scratch_bo;
drm_intel_bo *scratch_bo;
GLuint sampler_count;
dri_bo *sampler_bo;
drm_intel_bo *sampler_bo;
/** Binding table of pointers to surf_bo entries */
dri_bo *bind_bo;
dri_bo *surf_bo[BRW_WM_MAX_SURF];
drm_intel_bo *bind_bo;
drm_intel_bo *surf_bo[BRW_WM_MAX_SURF];
dri_bo *prog_bo;
dri_bo *state_bo;
drm_intel_bo *prog_bo;
drm_intel_bo *state_bo;
} wm;
struct {
/* gen4 */
dri_bo *prog_bo;
dri_bo *vp_bo;
drm_intel_bo *prog_bo;
drm_intel_bo *vp_bo;
/* gen6 */
dri_bo *blend_state_bo;
dri_bo *depth_stencil_state_bo;
dri_bo *color_calc_state_bo;
drm_intel_bo *blend_state_bo;
drm_intel_bo *depth_stencil_state_bo;
drm_intel_bo *color_calc_state_bo;
dri_bo *state_bo;
drm_intel_bo *state_bo;
} cc;
struct {
struct brw_query_object *obj;
dri_bo *bo;
drm_intel_bo *bo;
int index;
GLboolean active;
} query;

6
src/mesa/drivers/dri/i965/brw_curbe.c
View file

@ -307,7 +307,7 @@ static void prepare_constant_buffer(struct brw_context *brw)
brw->curbe.curbe_next_offset + bufsz > brw->curbe.curbe_bo->size)
{
drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
dri_bo_unreference(brw->curbe.curbe_bo);
drm_intel_bo_unreference(brw->curbe.curbe_bo);
brw->curbe.curbe_bo = NULL;
}
@ -315,8 +315,8 @@ static void prepare_constant_buffer(struct brw_context *brw)
/* Allocate a single page for CURBE entries for this batchbuffer.
* They're generally around 64b.
*/
brw->curbe.curbe_bo = dri_bo_alloc(brw->intel.bufmgr, "CURBE",
4096, 1 << 6);
brw->curbe.curbe_bo = drm_intel_bo_alloc(brw->intel.bufmgr, "CURBE",
4096, 1 << 6);
brw->curbe.curbe_next_offset = 0;
drm_intel_gem_bo_map_gtt(brw->curbe.curbe_bo);
}

8
src/mesa/drivers/dri/i965/brw_draw.c
View file

@ -180,7 +180,7 @@ static void brw_merge_inputs( struct brw_context *brw,
GLuint i;
for (i = 0; i < VERT_ATTRIB_MAX; i++)
dri_bo_unreference(brw->vb.inputs[i].bo);
drm_intel_bo_unreference(brw->vb.inputs[i].bo);
memset(&brw->vb.inputs, 0, sizeof(brw->vb.inputs));
memset(&brw->vb.info, 0, sizeof(brw->vb.info));
@ -475,15 +475,15 @@ void brw_draw_destroy( struct brw_context *brw )
int i;
if (brw->vb.upload.bo != NULL) {
dri_bo_unreference(brw->vb.upload.bo);
drm_intel_bo_unreference(brw->vb.upload.bo);
brw->vb.upload.bo = NULL;
}
for (i = 0; i < VERT_ATTRIB_MAX; i++) {
dri_bo_unreference(brw->vb.inputs[i].bo);
drm_intel_bo_unreference(brw->vb.inputs[i].bo);
brw->vb.inputs[i].bo = NULL;
}
dri_bo_unreference(brw->ib.bo);
drm_intel_bo_unreference(brw->ib.bo);
brw->ib.bo = NULL;
}

22
src/mesa/drivers/dri/i965/brw_draw_upload.c
View file

@ -247,14 +247,14 @@ static void wrap_buffers( struct brw_context *brw,
brw->vb.upload.offset = 0;
if (brw->vb.upload.bo != NULL)
dri_bo_unreference(brw->vb.upload.bo);
brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO",
size, 1);
drm_intel_bo_unreference(brw->vb.upload.bo);
brw->vb.upload.bo = drm_intel_bo_alloc(brw->intel.bufmgr, "temporary VBO",
size, 1);
}
static void get_space( struct brw_context *brw,
GLuint size,
dri_bo **bo_return,
drm_intel_bo **bo_return,
GLuint *offset_return )
{
size = ALIGN(size, 64);
@ -265,7 +265,7 @@ static void get_space( struct brw_context *brw,
}
assert(*bo_return == NULL);
dri_bo_reference(brw->vb.upload.bo);
drm_intel_bo_reference(brw->vb.upload.bo);
*bo_return = brw->vb.upload.bo;
*offset_return = brw->vb.upload.offset;
brw->vb.upload.offset += size;
@ -361,10 +361,10 @@ static void brw_prepare_vertices(struct brw_context *brw)
intel_buffer_object(input->glarray->BufferObj);
/* Named buffer object: Just reference its contents directly. */
dri_bo_unreference(input->bo);
drm_intel_bo_unreference(input->bo);
input->bo = intel_bufferobj_buffer(intel, intel_buffer,
INTEL_READ);
dri_bo_reference(input->bo);
drm_intel_bo_reference(input->bo);
input->offset = (unsigned long)input->glarray->Ptr;
input->stride = input->glarray->StrideB;
input->count = input->glarray->_MaxElement;
@ -439,7 +439,7 @@ static void brw_prepare_vertices(struct brw_context *brw)
upload[i]->offset = upload[0]->offset +
((const unsigned char *)upload[i]->glarray->Ptr - ptr);
upload[i]->bo = upload[0]->bo;
dri_bo_reference(upload[i]->bo);
drm_intel_bo_reference(upload[i]->bo);
}
}
else {
@ -596,7 +596,7 @@ static void brw_prepare_indices(struct brw_context *brw)
struct intel_context *intel = &brw->intel;
const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
GLuint ib_size;
dri_bo *bo = NULL;
drm_intel_bo *bo = NULL;
struct gl_buffer_object *bufferobj;
GLuint offset;
GLuint ib_type_size;
@ -638,13 +638,13 @@ static void brw_prepare_indices(struct brw_context *brw)
get_space(brw, ib_size, &bo, &offset);
dri_bo_subdata(bo, offset, ib_size, map);
drm_intel_bo_subdata(bo, offset, ib_size, map);
ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER_ARB, bufferobj);
} else {
bo = intel_bufferobj_buffer(intel, intel_buffer_object(bufferobj),
INTEL_READ);
dri_bo_reference(bo);
drm_intel_bo_reference(bo);
/* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading
* the index buffer state when we're just moving the start index

4
src/mesa/drivers/dri/i965/brw_gs.c
View file

@ -134,7 +134,7 @@ static void compile_gs_prog( struct brw_context *brw,
/* Upload
*/
dri_bo_unreference(brw->gs.prog_bo);
drm_intel_bo_unreference(brw->gs.prog_bo);
brw->gs.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_GS_PROG,
&c.key, sizeof(c.key),
NULL, 0,
@ -201,7 +201,7 @@ static void prepare_gs_prog(struct brw_context *brw)
}
if (brw->gs.prog_active) {
dri_bo_unreference(brw->gs.prog_bo);
drm_intel_bo_unreference(brw->gs.prog_bo);
brw->gs.prog_bo = brw_search_cache(&brw->cache, BRW_GS_PROG,
&key, sizeof(key),
NULL, 0,

6
src/mesa/drivers/dri/i965/brw_gs_state.c
View file

@ -68,12 +68,12 @@ gs_unit_populate_key(struct brw_context *brw, struct brw_gs_unit_key *key)
key->urb_size = brw->urb.vsize;
}
static dri_bo *
static drm_intel_bo *
gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key)
{
struct intel_context *intel = &brw->intel;
struct brw_gs_unit_state gs;
dri_bo *bo;
drm_intel_bo *bo;
memset(&gs, 0, sizeof(gs));
@ -127,7 +127,7 @@ static void prepare_gs_unit(struct brw_context *brw)
gs_unit_populate_key(brw, &key);
dri_bo_unreference(brw->gs.state_bo);
drm_intel_bo_unreference(brw->gs.state_bo);
brw->gs.state_bo = brw_search_cache(&brw->cache, BRW_GS_UNIT,
&key, sizeof(key),
&brw->gs.prog_bo, 1,

4
src/mesa/drivers/dri/i965/brw_program.c
View file

@ -99,14 +99,14 @@ static void brwDeleteProgram( GLcontext *ctx,
struct gl_fragment_program *fp = (struct gl_fragment_program *) prog;
struct brw_fragment_program *brw_fp = brw_fragment_program(fp);
dri_bo_unreference(brw_fp->const_buffer);
drm_intel_bo_unreference(brw_fp->const_buffer);
}
if (prog->Target == GL_VERTEX_PROGRAM_ARB) {
struct gl_vertex_program *vp = (struct gl_vertex_program *) prog;
struct brw_vertex_program *brw_vp = brw_vertex_program(vp);
dri_bo_unreference(brw_vp->const_buffer);
drm_intel_bo_unreference(brw_vp->const_buffer);
}
_mesa_delete_program( ctx, prog );

20
src/mesa/drivers/dri/i965/brw_queryobj.c
View file

@ -55,7 +55,7 @@ brw_queryobj_get_results(struct brw_query_object *query)
if (query->bo == NULL)
return;
dri_bo_map(query->bo, GL_FALSE);
drm_intel_bo_map(query->bo, GL_FALSE);
results = query->bo->virtual;
if (query->Base.Target == GL_TIME_ELAPSED_EXT) {
query->Base.Result += 1000 * ((results[1] >> 32) - (results[0] >> 32));
@ -65,9 +65,9 @@ brw_queryobj_get_results(struct brw_query_object *query)
query->Base.Result += results[i * 2 + 1] - results[i * 2];
}
}
dri_bo_unmap(query->bo);
drm_intel_bo_unmap(query->bo);
dri_bo_unreference(query->bo);
drm_intel_bo_unreference(query->bo);
query->bo = NULL;
}
@ -91,7 +91,7 @@ brw_delete_query(GLcontext *ctx, struct gl_query_object *q)
{
struct brw_query_object *query = (struct brw_query_object *)q;
dri_bo_unreference(query->bo);
drm_intel_bo_unreference(query->bo);
free(query);
}
@ -103,7 +103,7 @@ brw_begin_query(GLcontext *ctx, struct gl_query_object *q)
struct brw_query_object *query = (struct brw_query_object *)q;
if (query->Base.Target == GL_TIME_ELAPSED_EXT) {
dri_bo_unreference(query->bo);
drm_intel_bo_unreference(query->bo);
query->bo = drm_intel_bo_alloc(intel->bufmgr, "timer query",
4096, 4096);
@ -119,7 +119,7 @@ brw_begin_query(GLcontext *ctx, struct gl_query_object *q)
ADVANCE_BATCH();
} else {
/* Reset our driver's tracking of query state. */
dri_bo_unreference(query->bo);
drm_intel_bo_unreference(query->bo);
query->bo = NULL;
query->first_index = -1;
query->last_index = -1;
@ -161,7 +161,7 @@ brw_end_query(GLcontext *ctx, struct gl_query_object *q)
brw_emit_query_end(brw);
intel_batchbuffer_flush(intel->batch);
dri_bo_unreference(brw->query.bo);
drm_intel_bo_unreference(brw->query.bo);
brw->query.bo = NULL;
}
@ -202,10 +202,10 @@ brw_prepare_query_begin(struct brw_context *brw)
/* Get a new query BO if we're going to need it. */
if (brw->query.bo == NULL ||
brw->query.index * 2 + 1 >= 4096 / sizeof(uint64_t)) {
dri_bo_unreference(brw->query.bo);
drm_intel_bo_unreference(brw->query.bo);
brw->query.bo = NULL;
brw->query.bo = dri_bo_alloc(intel->bufmgr, "query", 4096, 1);
brw->query.bo = drm_intel_bo_alloc(intel->bufmgr, "query", 4096, 1);
brw->query.index = 0;
}
@ -243,7 +243,7 @@ brw_emit_query_begin(struct brw_context *brw)
if (query->bo != brw->query.bo) {
if (query->bo != NULL)
brw_queryobj_get_results(query);
dri_bo_reference(brw->query.bo);
drm_intel_bo_reference(brw->query.bo);
query->bo = brw->query.bo;
query->first_index = brw->query.index;
}

4
src/mesa/drivers/dri/i965/brw_sf.c
View file

@ -118,7 +118,7 @@ static void compile_sf_prog( struct brw_context *brw,
/* Upload
*/
dri_bo_unreference(brw->sf.prog_bo);
drm_intel_bo_unreference(brw->sf.prog_bo);
brw->sf.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_SF_PROG,
&c.key, sizeof(c.key),
NULL, 0,
@ -191,7 +191,7 @@ static void upload_sf_prog(struct brw_context *brw)
key.frontface_ccw = (ctx->Polygon.FrontFace == GL_CCW) ^ (ctx->DrawBuffer->Name != 0);
}
dri_bo_unreference(brw->sf.prog_bo);
drm_intel_bo_unreference(brw->sf.prog_bo);
brw->sf.prog_bo = brw_search_cache(&brw->cache, BRW_SF_PROG,
&key, sizeof(key),
NULL, 0,

12
src/mesa/drivers/dri/i965/brw_sf_state.c
View file

@ -104,7 +104,7 @@ static void upload_sf_vp(struct brw_context *brw)
sfv.scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1;
}
dri_bo_unreference(brw->sf.vp_bo);
drm_intel_bo_unreference(brw->sf.vp_bo);
brw->sf.vp_bo = brw_cache_data(&brw->cache, BRW_SF_VP, &sfv, sizeof(sfv),
NULL, 0);
}
@ -173,13 +173,13 @@ sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key)
key->render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
}
static dri_bo *
static drm_intel_bo *
sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
dri_bo **reloc_bufs)
drm_intel_bo **reloc_bufs)
{
struct intel_context *intel = &brw->intel;
struct brw_sf_unit_state sf;
dri_bo *bo;
drm_intel_bo *bo;
int chipset_max_threads;
memset(&sf, 0, sizeof(sf));
@ -346,14 +346,14 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
static void upload_sf_unit( struct brw_context *brw )
{
struct brw_sf_unit_key key;
dri_bo *reloc_bufs[2];
drm_intel_bo *reloc_bufs[2];
sf_unit_populate_key(brw, &key);
reloc_bufs[0] = brw->sf.prog_bo;
reloc_bufs[1] = brw->sf.vp_bo;
dri_bo_unreference(brw->sf.state_bo);
drm_intel_bo_unreference(brw->sf.state_bo);
brw->sf.state_bo = brw_search_cache(&brw->cache, BRW_SF_UNIT,
&key, sizeof(key),
reloc_bufs, 2,

22
src/mesa/drivers/dri/i965/brw_state.h
View file

@ -36,12 +36,12 @@
#include "brw_context.h"
static INLINE void
brw_add_validated_bo(struct brw_context *brw, dri_bo *bo)
brw_add_validated_bo(struct brw_context *brw, drm_intel_bo *bo)
{
assert(brw->state.validated_bo_count < ARRAY_SIZE(brw->state.validated_bos));
if (bo != NULL) {
dri_bo_reference(bo);
drm_intel_bo_reference(bo);
brw->state.validated_bos[brw->state.validated_bo_count++] = bo;
}
};
@ -113,7 +113,7 @@ const struct brw_tracked_state gen6_wm_state;
*/
struct brw_surface_key {
GLenum target, depthmode;
dri_bo *bo;
drm_intel_bo *bo;
GLint format, internal_format;
GLint first_level, last_level;
GLint width, height, depth;
@ -134,18 +134,18 @@ void brw_clear_validated_bos(struct brw_context *brw);
/***********************************************************************
* brw_state_cache.c
*/
dri_bo *brw_cache_data(struct brw_cache *cache,
drm_intel_bo *brw_cache_data(struct brw_cache *cache,
enum brw_cache_id cache_id,
const void *data,
GLuint size,
dri_bo **reloc_bufs,
drm_intel_bo **reloc_bufs,
GLuint nr_reloc_bufs);
drm_intel_bo *brw_upload_cache(struct brw_cache *cache,
enum brw_cache_id cache_id,
const void *key,
GLuint key_sz,
dri_bo **reloc_bufs,
drm_intel_bo **reloc_bufs,
GLuint nr_reloc_bufs,
const void *data,
GLuint data_sz);
@ -154,7 +154,7 @@ drm_intel_bo *brw_upload_cache_with_auxdata(struct brw_cache *cache,
enum brw_cache_id cache_id,
const void *key,
GLuint key_sz,
dri_bo **reloc_bufs,
drm_intel_bo **reloc_bufs,
GLuint nr_reloc_bufs,
const void *data,
GLuint data_sz,
@ -162,18 +162,18 @@ drm_intel_bo *brw_upload_cache_with_auxdata(struct brw_cache *cache,
GLuint aux_sz,
void *aux_return);
dri_bo *brw_search_cache( struct brw_cache *cache,
drm_intel_bo *brw_search_cache( struct brw_cache *cache,
enum brw_cache_id cache_id,
const void *key,
GLuint key_size,
dri_bo **reloc_bufs,
drm_intel_bo **reloc_bufs,
GLuint nr_reloc_bufs,
void *aux_return);
void brw_state_cache_check_size( struct brw_context *brw );
void brw_init_caches( struct brw_context *brw );
void brw_destroy_caches( struct brw_context *brw );
void brw_state_cache_bo_delete(struct brw_cache *cache, dri_bo *bo);
void brw_state_cache_bo_delete(struct brw_cache *cache, drm_intel_bo *bo);
/***********************************************************************
* brw_state_batch.c
@ -188,7 +188,7 @@ void brw_destroy_batch_cache( struct brw_context *brw );
void brw_clear_batch_cache( struct brw_context *brw );
/* brw_wm_surface_state.c */
dri_bo *
drm_intel_bo *
brw_create_constant_surface( struct brw_context *brw,
struct brw_surface_key *key );

52
src/mesa/drivers/dri/i965/brw_state_cache.c
View file

@ -93,14 +93,14 @@ hash_key(struct brw_cache_item *item)
*/
static void
update_cache_last(struct brw_cache *cache, enum brw_cache_id cache_id,
dri_bo *bo)
drm_intel_bo *bo)
{
if (bo == cache->last_bo[cache_id])
return; /* no change */
dri_bo_unreference(cache->last_bo[cache_id]);
drm_intel_bo_unreference(cache->last_bo[cache_id]);
cache->last_bo[cache_id] = bo;
dri_bo_reference(cache->last_bo[cache_id]);
drm_intel_bo_reference(cache->last_bo[cache_id]);
cache->brw->state.dirty.cache |= 1 << cache_id;
}
@ -114,7 +114,7 @@ brw_cache_item_equals(const struct brw_cache_item *a,
(memcmp(a->key, b->key, a->key_size) == 0) &&
a->nr_reloc_bufs == b->nr_reloc_bufs &&
(memcmp(a->reloc_bufs, b->reloc_bufs,
a->nr_reloc_bufs * sizeof(dri_bo *)) == 0);
a->nr_reloc_bufs * sizeof(drm_intel_bo *)) == 0);
}
static struct brw_cache_item *
@ -168,12 +168,12 @@ rehash(struct brw_cache *cache)
/**
* Returns the buffer object matching cache_id and key, or NULL.
*/
dri_bo *
drm_intel_bo *
brw_search_cache(struct brw_cache *cache,
enum brw_cache_id cache_id,
const void *key,
GLuint key_size,
dri_bo **reloc_bufs, GLuint nr_reloc_bufs,
drm_intel_bo **reloc_bufs, GLuint nr_reloc_bufs,
void *aux_return)
{
struct brw_cache_item *item;
@ -198,7 +198,7 @@ brw_search_cache(struct brw_cache *cache,
update_cache_last(cache, cache_id, item->bo);
dri_bo_reference(item->bo);
drm_intel_bo_reference(item->bo);
return item->bo;
}
@ -208,7 +208,7 @@ brw_upload_cache_with_auxdata(struct brw_cache *cache,
enum brw_cache_id cache_id,
const void *key,
GLuint key_size,
dri_bo **reloc_bufs,
drm_intel_bo **reloc_bufs,
GLuint nr_reloc_bufs,
const void *data,
GLuint data_size,
@ -218,9 +218,9 @@ brw_upload_cache_with_auxdata(struct brw_cache *cache,
{
struct brw_cache_item *item = CALLOC_STRUCT(brw_cache_item);
GLuint hash;
GLuint relocs_size = nr_reloc_bufs * sizeof(dri_bo *);
GLuint relocs_size = nr_reloc_bufs * sizeof(drm_intel_bo *);
void *tmp;
dri_bo *bo;
drm_intel_bo *bo;
int i;
item->cache_id = cache_id;
@ -232,8 +232,8 @@ brw_upload_cache_with_auxdata(struct brw_cache *cache,
item->hash = hash;
/* Create the buffer object to contain the data */
bo = dri_bo_alloc(cache->brw->intel.bufmgr,
cache->name[cache_id], data_size, 1 << 6);
bo = drm_intel_bo_alloc(cache->brw->intel.bufmgr,
cache->name[cache_id], data_size, 1 << 6);
/* Set up the memory containing the key, aux_data, and reloc_bufs */
@ -244,14 +244,14 @@ brw_upload_cache_with_auxdata(struct brw_cache *cache,
memcpy(tmp + key_size + aux_size, reloc_bufs, relocs_size);
for (i = 0; i < nr_reloc_bufs; i++) {
if (reloc_bufs[i] != NULL)
dri_bo_reference(reloc_bufs[i]);
drm_intel_bo_reference(reloc_bufs[i]);
}
item->key = tmp;
item->reloc_bufs = tmp + key_size + aux_size;
item->bo = bo;
dri_bo_reference(bo);
drm_intel_bo_reference(bo);
if (cache->n_items > cache->size * 1.5)
rehash(cache);
@ -271,7 +271,7 @@ brw_upload_cache_with_auxdata(struct brw_cache *cache,
data_size, cache_id);
/* Copy data to the buffer */
dri_bo_subdata(bo, 0, data_size, data);
drm_intel_bo_subdata(bo, 0, data_size, data);
update_cache_last(cache, cache_id, bo);
@ -283,7 +283,7 @@ brw_upload_cache(struct brw_cache *cache,
enum brw_cache_id cache_id,
const void *key,
GLuint key_size,
dri_bo **reloc_bufs,
drm_intel_bo **reloc_bufs,
GLuint nr_reloc_bufs,
const void *data,
GLuint data_size)
@ -306,15 +306,15 @@ brw_upload_cache(struct brw_cache *cache,
* If aux data is involved, use search/upload instead.
*/
dri_bo *
drm_intel_bo *
brw_cache_data(struct brw_cache *cache,
enum brw_cache_id cache_id,
const void *data,
GLuint data_size,
dri_bo **reloc_bufs,
drm_intel_bo **reloc_bufs,
GLuint nr_reloc_bufs)
{
dri_bo *bo;
drm_intel_bo *bo;
struct brw_cache_item *item, lookup;
GLuint hash;
@ -329,7 +329,7 @@ brw_cache_data(struct brw_cache *cache,
item = search_cache(cache, hash, &lookup);
if (item) {
update_cache_last(cache, cache_id, item->bo);
dri_bo_reference(item->bo);
drm_intel_bo_reference(item->bo);
return item->bo;
}
@ -437,8 +437,8 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache)
next = c->next;
for (j = 0; j < c->nr_reloc_bufs; j++)
dri_bo_unreference(c->reloc_bufs[j]);
dri_bo_unreference(c->bo);
drm_intel_bo_unreference(c->reloc_bufs[j]);
drm_intel_bo_unreference(c->bo);
free((void *)c->key);
free(c);
}
@ -463,7 +463,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache)
* at the cost of walking the entire hash table.
*/
void
brw_state_cache_bo_delete(struct brw_cache *cache, dri_bo *bo)
brw_state_cache_bo_delete(struct brw_cache *cache, drm_intel_bo *bo)
{
struct brw_cache_item **prev;
GLuint i;
@ -481,8 +481,8 @@ brw_state_cache_bo_delete(struct brw_cache *cache, dri_bo *bo)
*prev = c->next;
for (j = 0; j < c->nr_reloc_bufs; j++)
dri_bo_unreference(c->reloc_bufs[j]);
dri_bo_unreference(c->bo);
drm_intel_bo_unreference(c->reloc_bufs[j]);
drm_intel_bo_unreference(c->bo);
free((void *)c->key);
free(c);
cache->n_items--;
@ -520,7 +520,7 @@ brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache)
brw_clear_cache(brw, cache);
for (i = 0; i < BRW_MAX_CACHE; i++) {
dri_bo_unreference(cache->last_bo[i]);
drm_intel_bo_unreference(cache->last_bo[i]);
free(cache->name[i]);
}
free(cache->items);

22
src/mesa/drivers/dri/i965/brw_state_dump.c
View file

@ -54,19 +54,19 @@ state_out(const char *name, void *data, uint32_t hw_offset, int index,
/** Generic, undecoded state buffer debug printout */
static void
state_struct_out(const char *name, dri_bo *buffer, unsigned int state_size)
state_struct_out(const char *name, drm_intel_bo *buffer, unsigned int state_size)
{
int i;
if (buffer == NULL)
return;
dri_bo_map(buffer, GL_FALSE);
drm_intel_bo_map(buffer, GL_FALSE);
for (i = 0; i < state_size / 4; i++) {
state_out(name, buffer->virtual, buffer->offset, i,
"dword %d\n", i);
}
dri_bo_unmap(buffer);
drm_intel_bo_unmap(buffer);
}
static const char *
@ -101,7 +101,7 @@ static void dump_wm_surface_state(struct brw_context *brw)
int i;
for (i = 0; i < brw->wm.nr_surfaces; i++) {
dri_bo *surf_bo = brw->wm.surf_bo[i];
drm_intel_bo *surf_bo = brw->wm.surf_bo[i];
unsigned int surfoff;
struct brw_surface_state *surf;
char name[20];
@ -110,7 +110,7 @@ static void dump_wm_surface_state(struct brw_context *brw)
fprintf(stderr, " WM SS%d: NULL\n", i);
continue;
}
dri_bo_map(surf_bo, GL_FALSE);
drm_intel_bo_map(surf_bo, GL_FALSE);
surfoff = surf_bo->offset;
surf = (struct brw_surface_state *)(surf_bo->virtual);
@ -128,7 +128,7 @@ static void dump_wm_surface_state(struct brw_context *brw)
state_out(name, surf, surfoff, 5, "x,y offset: %d,%d\n",
surf->ss5.x_offset, surf->ss5.y_offset);
dri_bo_unmap(surf_bo);
drm_intel_bo_unmap(surf_bo);
}
}
@ -141,7 +141,7 @@ static void dump_sf_viewport_state(struct brw_context *brw)
if (brw->sf.vp_bo == NULL)
return;
dri_bo_map(brw->sf.vp_bo, GL_FALSE);
drm_intel_bo_map(brw->sf.vp_bo, GL_FALSE);
vp = brw->sf.vp_bo->virtual;
vp_off = brw->sf.vp_bo->offset;
@ -158,10 +158,10 @@ static void dump_sf_viewport_state(struct brw_context *brw)
state_out(name, vp, vp_off, 7, "bottom right = %d,%d\n",
vp->scissor.xmax, vp->scissor.ymax);
dri_bo_unmap(brw->sf.vp_bo);
drm_intel_bo_unmap(brw->sf.vp_bo);
}
static void brw_debug_prog(const char *name, dri_bo *prog)
static void brw_debug_prog(const char *name, drm_intel_bo *prog)
{
unsigned int i;
uint32_t *data;
@ -169,7 +169,7 @@ static void brw_debug_prog(const char *name, dri_bo *prog)
if (prog == NULL)
return;
dri_bo_map(prog, GL_FALSE);
drm_intel_bo_map(prog, GL_FALSE);
data = prog->virtual;
@ -187,7 +187,7 @@ static void brw_debug_prog(const char *name, dri_bo *prog)
break;
}
dri_bo_unmap(prog);
drm_intel_bo_unmap(prog);
}

2
src/mesa/drivers/dri/i965/brw_state_upload.c
View file

@ -208,7 +208,7 @@ brw_clear_validated_bos(struct brw_context *brw)
/* Clear the last round of validated bos */
for (i = 0; i < brw->state.validated_bo_count; i++) {
dri_bo_unreference(brw->state.validated_bos[i]);
drm_intel_bo_unreference(brw->state.validated_bos[i]);
brw->state.validated_bos[i] = NULL;
}
brw->state.validated_bo_count = 0;

4
src/mesa/drivers/dri/i965/brw_vs.c
View file

@ -101,7 +101,7 @@ static void do_vs_prog( struct brw_context *brw,
if (c.vp->use_const_buffer)
aux_size += c.vp->program.Base.Parameters->NumParameters;
dri_bo_unreference(brw->vs.prog_bo);
drm_intel_bo_unreference(brw->vs.prog_bo);
brw->vs.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_VS_PROG,
&c.key, sizeof(c.key),
NULL, 0,
@ -140,7 +140,7 @@ static void brw_upload_vs_prog(struct brw_context *brw)
/* Make an early check for the key.
*/
dri_bo_unreference(brw->vs.prog_bo);
drm_intel_bo_unreference(brw->vs.prog_bo);
brw->vs.prog_bo = brw_search_cache(&brw->cache, BRW_VS_PROG,
&key, sizeof(key),
NULL, 0,

6
src/mesa/drivers/dri/i965/brw_vs_state.c
View file

@ -79,12 +79,12 @@ vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key)
}
}
static dri_bo *
static drm_intel_bo *
vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key)
{
struct intel_context *intel = &brw->intel;
struct brw_vs_unit_state vs;
dri_bo *bo;
drm_intel_bo *bo;
memset(&vs, 0, sizeof(vs));
@ -182,7 +182,7 @@ static void prepare_vs_unit(struct brw_context *brw)
vs_unit_populate_key(brw, &key);
dri_bo_unreference(brw->vs.state_bo);
drm_intel_bo_unreference(brw->vs.state_bo);
brw->vs.state_bo = brw_search_cache(&brw->cache, BRW_VS_UNIT,
&key, sizeof(key),
&brw->vs.prog_bo, 1,

8
src/mesa/drivers/dri/i965/brw_vs_surface_state.c
View file

@ -98,7 +98,7 @@ brw_update_vs_constant_surface( GLcontext *ctx,
/* If we're in this state update atom, we need to update VS constants, so
* free the old buffer and create a new one for the new contents.
*/
dri_bo_unreference(vp->const_buffer);
drm_intel_bo_unreference(vp->const_buffer);
vp->const_buffer = brw_vs_update_constant_buffer(brw);
/* If there's no constant buffer, then no surface BO is needed to point at
@ -143,10 +143,10 @@ brw_update_vs_constant_surface( GLcontext *ctx,
/**
* Constructs the binding table for the VS surface state.
*/
static dri_bo *
static drm_intel_bo *
brw_vs_get_binding_table(struct brw_context *brw)
{
dri_bo *bind_bo;
drm_intel_bo *bind_bo;
bind_bo = brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND,
NULL, 0,
@ -216,7 +216,7 @@ static void prepare_vs_surfaces(struct brw_context *brw )
* just slightly increases our working set size.
*/
if (brw->vs.nr_surfaces != 0) {
dri_bo_unreference(brw->vs.bind_bo);
drm_intel_bo_unreference(brw->vs.bind_bo);
brw->vs.bind_bo = brw_vs_get_binding_table(brw);
}
}

6
src/mesa/drivers/dri/i965/brw_vtbl.c
View file

@ -48,9 +48,9 @@
#include "brw_wm.h"
static void
dri_bo_release(dri_bo **bo)
dri_bo_release(drm_intel_bo **bo)
{
dri_bo_unreference(*bo);
drm_intel_bo_unreference(*bo);
*bo = NULL;
}
@ -172,7 +172,7 @@ static void brw_new_batch( struct intel_context *intel )
* a new buffer next time.
*/
if (brw->vb.upload.bo != NULL) {
dri_bo_unreference(brw->vb.upload.bo);
drm_intel_bo_unreference(brw->vb.upload.bo);
brw->vb.upload.bo = NULL;
brw->vb.upload.offset = 0;
}

4
src/mesa/drivers/dri/i965/brw_wm.c
View file

@ -197,7 +197,7 @@ static void do_wm_prog( struct brw_context *brw,
*/
program = brw_get_program(&c->func, &program_size);
dri_bo_unreference(brw->wm.prog_bo);
drm_intel_bo_unreference(brw->wm.prog_bo);
brw->wm.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_WM_PROG,
&c->key, sizeof(c->key),
NULL, 0,
@ -359,7 +359,7 @@ static void brw_prepare_wm_prog(struct brw_context *brw)
/* Make an early check for the key.
*/
dri_bo_unreference(brw->wm.prog_bo);
drm_intel_bo_unreference(brw->wm.prog_bo);
brw->wm.prog_bo = brw_search_cache(&brw->cache, BRW_WM_PROG,
&key, sizeof(key),
NULL, 0,

8
src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
View file

@ -66,7 +66,7 @@ static GLuint translate_wrap_mode( GLenum wrap )
}
}
static dri_bo *upload_default_color( struct brw_context *brw,
static drm_intel_bo *upload_default_color( struct brw_context *brw,
const GLfloat *color )
{
struct brw_sampler_default_color sdc;
@ -101,7 +101,7 @@ struct wm_sampler_key {
* entry.
*/
static void brw_update_sampler_state(struct wm_sampler_entry *key,
dri_bo *sdc_bo,
drm_intel_bo *sdc_bo,
struct brw_sampler_state *sampler)
{
memset(sampler, 0, sizeof(*sampler));
@ -264,7 +264,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw,
entry->comparemode = texObj->CompareMode;
entry->comparefunc = texObj->CompareFunc;
dri_bo_unreference(brw->wm.sdc_bo[unit]);
drm_intel_bo_unreference(brw->wm.sdc_bo[unit]);
if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) {
float bordercolor[4] = {
texObj->BorderColor.f[0],
@ -305,7 +305,7 @@ static void upload_wm_samplers( struct brw_context *brw )
brw->state.dirty.cache |= CACHE_NEW_SAMPLER;
}
dri_bo_unreference(brw->wm.sampler_bo);
drm_intel_bo_unreference(brw->wm.sampler_bo);
brw->wm.sampler_bo = NULL;
if (brw->wm.sampler_count == 0)
return;

20
src/mesa/drivers/dri/i965/brw_wm_state.c
View file

@ -122,13 +122,13 @@ wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key)
/**
* Setup wm hardware state. See page 225 of Volume 2
*/
static dri_bo *
static drm_intel_bo *
wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
dri_bo **reloc_bufs)
drm_intel_bo **reloc_bufs)
{
struct intel_context *intel = &brw->intel;
struct brw_wm_unit_state wm;
dri_bo *bo;
drm_intel_bo *bo;
memset(&wm, 0, sizeof(wm));
@ -245,7 +245,7 @@ static void upload_wm_unit( struct brw_context *brw )
{
struct intel_context *intel = &brw->intel;
struct brw_wm_unit_key key;
dri_bo *reloc_bufs[3];
drm_intel_bo *reloc_bufs[3];
wm_unit_populate_key(brw, &key);
/* Allocate the necessary scratch space if we haven't already. Don't
@ -257,14 +257,14 @@ static void upload_wm_unit( struct brw_context *brw )
GLuint total = key.total_scratch * brw->wm_max_threads;
if (brw->wm.scratch_bo && total > brw->wm.scratch_bo->size) {
dri_bo_unreference(brw->wm.scratch_bo);
drm_intel_bo_unreference(brw->wm.scratch_bo);
brw->wm.scratch_bo = NULL;
}
if (brw->wm.scratch_bo == NULL) {
brw->wm.scratch_bo = dri_bo_alloc(intel->bufmgr,
"wm scratch",
total,
4096);
brw->wm.scratch_bo = drm_intel_bo_alloc(intel->bufmgr,
"wm scratch",
total,
4096);
}
}
@ -272,7 +272,7 @@ static void upload_wm_unit( struct brw_context *brw )
reloc_bufs[1] = brw->wm.scratch_bo;
reloc_bufs[2] = brw->wm.sampler_bo;
dri_bo_unreference(brw->wm.state_bo);
drm_intel_bo_unreference(brw->wm.state_bo);
brw->wm.state_bo = brw_search_cache(&brw->cache, BRW_WM_UNIT,
&key, sizeof(key),
reloc_bufs, 3,

28
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
View file

@ -196,12 +196,12 @@ brw_set_surface_tiling(struct brw_surface_state *surf, uint32_t tiling)
}
}
static dri_bo *
static drm_intel_bo *
brw_create_texture_surface( struct brw_context *brw,
struct brw_surface_key *key )
{
struct brw_surface_state surf;
dri_bo *bo;
drm_intel_bo *bo;
memset(&surf, 0, sizeof(surf));
@ -275,7 +275,7 @@ brw_update_texture_surface( GLcontext *ctx, GLuint unit )
key.cpp = intelObj->mt->cpp;
key.tiling = intelObj->mt->region->tiling;
dri_bo_unreference(brw->wm.surf_bo[surf]);
drm_intel_bo_unreference(brw->wm.surf_bo[surf]);
brw->wm.surf_bo[surf] = brw_search_cache(&brw->surface_cache,
BRW_SS_SURFACE,
&key, sizeof(key),
@ -292,13 +292,13 @@ brw_update_texture_surface( GLcontext *ctx, GLuint unit )
* Create the constant buffer surface. Vertex/fragment shader constants will be
* read from this buffer with Data Port Read instructions/messages.
*/
dri_bo *
drm_intel_bo *
brw_create_constant_surface( struct brw_context *brw,
struct brw_surface_key *key )
{
const GLint w = key->width - 1;
struct brw_surface_state surf;
dri_bo *bo;
drm_intel_bo *bo;
memset(&surf, 0, sizeof(surf));
@ -355,7 +355,7 @@ brw_wm_update_constant_buffer(struct brw_context *brw)
size, 64);
/* _NEW_PROGRAM_CONSTANTS */
dri_bo_subdata(const_buffer, 0, size, params->ParameterValues);
drm_intel_bo_subdata(const_buffer, 0, size, params->ParameterValues);
return const_buffer;
}
@ -378,7 +378,7 @@ brw_update_wm_constant_surface( GLcontext *ctx,
/* If we're in this state update atom, we need to update WM constants, so
* free the old buffer and create a new one for the new contents.
*/
dri_bo_unreference(fp->const_buffer);
drm_intel_bo_unreference(fp->const_buffer);
fp->const_buffer = brw_wm_update_constant_buffer(brw);
/* If there's no constant buffer, then no surface BO is needed to point at
@ -408,7 +408,7 @@ brw_update_wm_constant_surface( GLcontext *ctx,
key.width, key.height, key.depth, key.cpp, key.pitch);
*/
dri_bo_unreference(brw->wm.surf_bo[surf]);
drm_intel_bo_unreference(brw->wm.surf_bo[surf]);
brw->wm.surf_bo[surf] = brw_search_cache(&brw->surface_cache,
BRW_SS_SURFACE,
&key, sizeof(key),
@ -475,7 +475,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
{
struct intel_context *intel = &brw->intel;
GLcontext *ctx = &intel->ctx;
dri_bo *region_bo = NULL;
drm_intel_bo *region_bo = NULL;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
struct intel_region *region = irb ? irb->region : NULL;
struct {
@ -551,7 +551,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
(ctx->Color.BlendEnabled & (1 << unit)));
}
dri_bo_unreference(brw->wm.surf_bo[unit]);
drm_intel_bo_unreference(brw->wm.surf_bo[unit]);
brw->wm.surf_bo[unit] = brw_search_cache(&brw->surface_cache,
BRW_SS_SURFACE,
&key, sizeof(key),
@ -636,10 +636,10 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
* Constructs the binding table for the WM surface state, which maps unit
* numbers to surface state objects.
*/
static dri_bo *
static drm_intel_bo *
brw_wm_get_binding_table(struct brw_context *brw)
{
dri_bo *bind_bo;
drm_intel_bo *bind_bo;
assert(brw->wm.nr_surfaces <= BRW_WM_MAX_SURF);
@ -713,12 +713,12 @@ static void prepare_wm_surfaces(struct brw_context *brw )
brw_update_texture_surface(ctx, i);
brw->wm.nr_surfaces = surf + 1;
} else {
dri_bo_unreference(brw->wm.surf_bo[surf]);
drm_intel_bo_unreference(brw->wm.surf_bo[surf]);
brw->wm.surf_bo[surf] = NULL;
}
}
dri_bo_unreference(brw->wm.bind_bo);
drm_intel_bo_unreference(brw->wm.bind_bo);
brw->wm.bind_bo = brw_wm_get_binding_table(brw);
if (brw->wm.nr_surfaces != old_nr_surfaces)

6
src/mesa/drivers/dri/i965/gen6_depthstencil.c
View file

@ -77,12 +77,12 @@ depth_stencil_state_populate_key(struct brw_context *brw,
/**
* Creates the state cache entry for the given DEPTH_STENCIL_STATE state key.
*/
static dri_bo *
static drm_intel_bo *
depth_stencil_state_create_from_key(struct brw_context *brw,
struct brw_depth_stencil_state_key *key)
{
struct gen6_depth_stencil_state ds;
dri_bo *bo;
drm_intel_bo *bo;
memset(&ds, 0, sizeof(ds));
@ -143,7 +143,7 @@ prepare_depth_stencil_state(struct brw_context *brw)
depth_stencil_state_populate_key(brw, &key);
dri_bo_unreference(brw->cc.depth_stencil_state_bo);
drm_intel_bo_unreference(brw->cc.depth_stencil_state_bo);
brw->cc.depth_stencil_state_bo = brw_search_cache(&brw->cache,
BRW_DEPTH_STENCIL_STATE,
&key, sizeof(key),

26
src/mesa/drivers/dri/intel/intel_batchbuffer.c
View file

@ -38,12 +38,12 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)
struct intel_context *intel = batch->intel;
if (batch->buf != NULL) {
dri_bo_unreference(batch->buf);
drm_intel_bo_unreference(batch->buf);
batch->buf = NULL;
}
batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
intel->maxBatchSize, 4096);
batch->buf = drm_intel_bo_alloc(intel->bufmgr, "batchbuffer",
intel->maxBatchSize, 4096);
batch->map = batch->buffer;
batch->size = intel->maxBatchSize;
batch->ptr = batch->map;
@ -67,7 +67,7 @@ void
intel_batchbuffer_free(struct intel_batchbuffer *batch)
{
free (batch->buffer);
dri_bo_unreference(batch->buf);
drm_intel_bo_unreference(batch->buf);
batch->buf = NULL;
free(batch);
}
@ -83,18 +83,20 @@ do_flush_locked(struct intel_batchbuffer *batch, GLuint used)
int ret = 0;
int x_off = 0, y_off = 0;
dri_bo_subdata (batch->buf, 0, used, batch->buffer);
drm_intel_bo_subdata(batch->buf, 0, used, batch->buffer);
batch->ptr = NULL;
if (!intel->no_hw)
dri_bo_exec(batch->buf, used, NULL, 0, (x_off & 0xffff) | (y_off << 16));
if (!intel->no_hw) {
drm_intel_bo_exec(batch->buf, used, NULL, 0,
(x_off & 0xffff) | (y_off << 16));
}
if (INTEL_DEBUG & DEBUG_BATCH) {
dri_bo_map(batch->buf, GL_FALSE);
drm_intel_bo_map(batch->buf, GL_FALSE);
intel_decode(batch->buf->virtual, used / 4, batch->buf->offset,
intel->intelScreen->deviceID);
dri_bo_unmap(batch->buf);
drm_intel_bo_unmap(batch->buf);
if (intel->vtbl.debug_batch != NULL)
intel->vtbl.debug_batch(intel);
@ -167,8 +169,8 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
if (INTEL_DEBUG & DEBUG_SYNC) {
fprintf(stderr, "waiting for idle\n");
dri_bo_map(batch->buf, GL_TRUE);
dri_bo_unmap(batch->buf);
drm_intel_bo_map(batch->buf, GL_TRUE);
drm_intel_bo_unmap(batch->buf);
}
/* Reset the buffer:
@ -181,7 +183,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
*/
GLboolean
intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
dri_bo *buffer,
drm_intel_bo *buffer,
uint32_t read_domains, uint32_t write_domain,
uint32_t delta)
{

4
src/mesa/drivers/dri/intel/intel_batchbuffer.h
View file

@ -15,7 +15,7 @@ struct intel_batchbuffer
{
struct intel_context *intel;
dri_bo *buf;
drm_intel_bo *buf;
GLubyte *buffer;
@ -62,7 +62,7 @@ void intel_batchbuffer_release_space(struct intel_batchbuffer *batch,
GLuint bytes);
GLboolean intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
dri_bo *buffer,
drm_intel_bo *buffer,
uint32_t read_domains,
uint32_t write_domain,
uint32_t offset);

8
src/mesa/drivers/dri/intel/intel_blit.c
View file

@ -71,11 +71,11 @@ GLboolean
intelEmitCopyBlit(struct intel_context *intel,
GLuint cpp,
GLshort src_pitch,
dri_bo *src_buffer,
drm_intel_bo *src_buffer,
GLuint src_offset,
uint32_t src_tiling,
GLshort dst_pitch,
dri_bo *dst_buffer,
drm_intel_bo *dst_buffer,
GLuint dst_offset,
uint32_t dst_tiling,
GLshort src_x, GLshort src_y,
@ -86,7 +86,7 @@ intelEmitCopyBlit(struct intel_context *intel,
GLuint CMD, BR13, pass = 0;
int dst_y2 = dst_y + h;
int dst_x2 = dst_x + w;
dri_bo *aper_array[3];
drm_intel_bo *aper_array[3];
BATCH_LOCALS;
/* Blits are in a different ringbuffer so we don't use them. */
@ -369,7 +369,7 @@ intelEmitImmediateColorExpandBlit(struct intel_context *intel,
GLubyte *src_bits, GLuint src_size,
GLuint fg_color,
GLshort dst_pitch,
dri_bo *dst_buffer,
drm_intel_bo *dst_buffer,
GLuint dst_offset,
uint32_t dst_tiling,
GLshort x, GLshort y,

6
src/mesa/drivers/dri/intel/intel_blit.h
View file

@ -39,11 +39,11 @@ GLboolean
intelEmitCopyBlit(struct intel_context *intel,
GLuint cpp,
GLshort src_pitch,
dri_bo *src_buffer,
drm_intel_bo *src_buffer,
GLuint src_offset,
uint32_t src_tiling,
GLshort dst_pitch,
dri_bo *dst_buffer,
drm_intel_bo *dst_buffer,
GLuint dst_offset,
uint32_t dst_tiling,
GLshort srcx, GLshort srcy,
@ -57,7 +57,7 @@ intelEmitImmediateColorExpandBlit(struct intel_context *intel,
GLubyte *src_bits, GLuint src_size,
GLuint fg_color,
GLshort dst_pitch,
dri_bo *dst_buffer,
drm_intel_bo *dst_buffer,
GLuint dst_offset,
uint32_t dst_tiling,
GLshort x, GLshort y,

24
src/mesa/drivers/dri/intel/intel_buffer_objects.c
View file

@ -43,13 +43,13 @@ static GLboolean
intel_bufferobj_unmap(GLcontext * ctx,
GLenum target, struct gl_buffer_object *obj);
/** Allocates a new dri_bo to store the data for the buffer object. */
/** Allocates a new drm_intel_bo to store the data for the buffer object. */
static void
intel_bufferobj_alloc_buffer(struct intel_context *intel,
struct intel_buffer_object *intel_obj)
{
intel_obj->buffer = dri_bo_alloc(intel->bufmgr, "bufferobj",
intel_obj->Base.Size, 64);
intel_obj->buffer = drm_intel_bo_alloc(intel->bufmgr, "bufferobj",
intel_obj->Base.Size, 64);
}
/**
@ -80,7 +80,7 @@ intel_bufferobj_release_region(struct intel_context *intel,
intel_obj->region->pbo = NULL;
intel_obj->region = NULL;
dri_bo_unreference(intel_obj->buffer);
drm_intel_bo_unreference(intel_obj->buffer);
intel_obj->buffer = NULL;
}
@ -120,7 +120,7 @@ intel_bufferobj_free(GLcontext * ctx, struct gl_buffer_object *obj)
intel_bufferobj_release_region(intel, intel_obj);
}
else if (intel_obj->buffer) {
dri_bo_unreference(intel_obj->buffer);
drm_intel_bo_unreference(intel_obj->buffer);
}
free(intel_obj);
@ -154,7 +154,7 @@ intel_bufferobj_data(GLcontext * ctx,
intel_bufferobj_release_region(intel, intel_obj);
if (intel_obj->buffer != NULL) {
dri_bo_unreference(intel_obj->buffer);
drm_intel_bo_unreference(intel_obj->buffer);
intel_obj->buffer = NULL;
}
free(intel_obj->sys_buffer);
@ -179,7 +179,7 @@ intel_bufferobj_data(GLcontext * ctx,
return GL_FALSE;
if (data != NULL)
dri_bo_subdata(intel_obj->buffer, 0, size, data);
drm_intel_bo_subdata(intel_obj->buffer, 0, size, data);
}
return GL_TRUE;
@ -226,7 +226,7 @@ intel_bufferobj_subdata(GLcontext * ctx,
drm_intel_bo_unreference(temp_bo);
} else {
dri_bo_subdata(intel_obj->buffer, offset, size, data);
drm_intel_bo_subdata(intel_obj->buffer, offset, size, data);
}
}
}
@ -248,7 +248,7 @@ intel_bufferobj_get_subdata(GLcontext * ctx,
if (intel_obj->sys_buffer)
memcpy(data, (char *)intel_obj->sys_buffer + offset, size);
else
dri_bo_get_subdata(intel_obj->buffer, offset, size, data);
drm_intel_bo_get_subdata(intel_obj->buffer, offset, size, data);
}
@ -363,8 +363,8 @@ intel_bufferobj_map_range(GLcontext * ctx,
(access & GL_MAP_INVALIDATE_BUFFER_BIT) &&
drm_intel_bo_busy(intel_obj->buffer)) {
drm_intel_bo_unreference(intel_obj->buffer);
intel_obj->buffer = dri_bo_alloc(intel->bufmgr, "bufferobj",
intel_obj->Base.Size, 64);
intel_obj->buffer = drm_intel_bo_alloc(intel->bufmgr, "bufferobj",
intel_obj->Base.Size, 64);
}
/* If the user is mapping a range of an active buffer object but
@ -497,7 +497,7 @@ intel_bufferobj_unmap(GLcontext * ctx,
return GL_TRUE;
}
dri_bo *
drm_intel_bo *
intel_bufferobj_buffer(struct intel_context *intel,
struct intel_buffer_object *intel_obj, GLuint flag)
{

8
src/mesa/drivers/dri/intel/intel_buffer_objects.h
View file

@ -41,7 +41,7 @@ struct gl_buffer_object;
struct intel_buffer_object
{
struct gl_buffer_object Base;
dri_bo *buffer; /* the low-level buffer manager's buffer handle */
drm_intel_bo *buffer; /* the low-level buffer manager's buffer handle */
/** System memory buffer data, if not using a BO to store the data. */
void *sys_buffer;
@ -60,9 +60,9 @@ struct intel_buffer_object
/* Get the bm buffer associated with a GL bufferobject:
*/
dri_bo *intel_bufferobj_buffer(struct intel_context *intel,
struct intel_buffer_object
*obj, GLuint flag);
drm_intel_bo *intel_bufferobj_buffer(struct intel_context *intel,
struct intel_buffer_object *obj,
GLuint flag);
/* Hook the bufferobject implementation into mesa:
*/

6
src/mesa/drivers/dri/intel/intel_context.c
View file

@ -570,7 +570,7 @@ intelFinish(GLcontext * ctx)
irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
if (irb && irb->region)
dri_bo_wait_rendering(irb->region->buffer);
drm_intel_bo_wait_rendering(irb->region->buffer);
}
if (fb->_DepthBuffer) {
/* XXX: Wait on buffer idle */
@ -850,9 +850,9 @@ intelDestroyContext(__DRIcontext * driContextPriv)
free(intel->prim.vb);
intel->prim.vb = NULL;
dri_bo_unreference(intel->prim.vb_bo);
drm_intel_bo_unreference(intel->prim.vb_bo);
intel->prim.vb_bo = NULL;
dri_bo_unreference(intel->first_post_swapbuffers_batch);
drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
intel->first_post_swapbuffers_batch = NULL;
if (release_texture_heaps) {

2
src/mesa/drivers/dri/intel/intel_context.h
View file

@ -160,7 +160,7 @@ struct intel_context
uint32_t primitive; /**< Current hardware primitive type */
void (*flush) (struct intel_context *);
GLubyte *start_ptr; /**< for i8xx */
dri_bo *vb_bo;
drm_intel_bo *vb_bo;
uint8_t *vb;
unsigned int start_offset; /**< Byte offset of primitive sequence */
unsigned int current_offset; /**< Byte offset of next vertex */

33
src/mesa/drivers/dri/intel/intel_regions.c
View file

@ -121,7 +121,7 @@ intel_region_map(struct intel_context *intel, struct intel_region *region)
if (region->tiling != I915_TILING_NONE)
drm_intel_gem_bo_map_gtt(region->buffer);
else
dri_bo_map(region->buffer, GL_TRUE);
drm_intel_bo_map(region->buffer, GL_TRUE);
region->map = region->buffer->virtual;
}
@ -136,7 +136,7 @@ intel_region_unmap(struct intel_context *intel, struct intel_region *region)
if (region->tiling != I915_TILING_NONE)
drm_intel_gem_bo_unmap_gtt(region->buffer);
else
dri_bo_unmap(region->buffer);
drm_intel_bo_unmap(region->buffer);
region->map = NULL;
}
}
@ -145,7 +145,7 @@ static struct intel_region *
intel_region_alloc_internal(struct intel_context *intel,
GLuint cpp,
GLuint width, GLuint height, GLuint pitch,
dri_bo *buffer)
drm_intel_bo *buffer)
{
struct intel_region *region;
@ -175,7 +175,7 @@ intel_region_alloc(struct intel_context *intel,
GLuint cpp, GLuint width, GLuint height,
GLboolean expect_accelerated_upload)
{
dri_bo *buffer;
drm_intel_bo *buffer;
struct intel_region *region;
unsigned long flags = 0;
unsigned long aligned_pitch;
@ -201,7 +201,7 @@ intel_region_alloc_for_handle(struct intel_context *intel,
GLuint handle, const char *name)
{
struct intel_region *region, *dummy;
dri_bo *buffer;
drm_intel_bo *buffer;
int ret;
uint32_t bit_6_swizzle;
@ -226,8 +226,8 @@ intel_region_alloc_for_handle(struct intel_context *intel,
if (region == NULL)
return region;
ret = dri_bo_get_tiling(region->buffer, &region->tiling,
&bit_6_swizzle);
ret = drm_intel_bo_get_tiling(region->buffer, &region->tiling,
&bit_6_swizzle);
if (ret != 0) {
fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
handle, name, strerror(-ret));
@ -276,7 +276,7 @@ intel_region_release(struct intel_region **region_handle)
if (region->pbo)
region->pbo->region = NULL;
region->pbo = NULL;
dri_bo_unreference(region->buffer);
drm_intel_bo_unreference(region->buffer);
if (region->name > 0)
_mesa_HashRemove(region->screen->named_regions, region->name);
@ -410,7 +410,7 @@ intel_region_attach_pbo(struct intel_context *intel,
struct intel_region *region,
struct intel_buffer_object *pbo)
{
dri_bo *buffer;
drm_intel_bo *buffer;
if (region->pbo == pbo)
return;
@ -428,7 +428,7 @@ intel_region_attach_pbo(struct intel_context *intel,
}
if (region->buffer) {
dri_bo_unreference(region->buffer);
drm_intel_bo_unreference(region->buffer);
region->buffer = NULL;
}
@ -437,7 +437,7 @@ intel_region_attach_pbo(struct intel_context *intel,
region->pbo = pbo;
region->pbo->region = region;
dri_bo_reference(buffer);
drm_intel_bo_reference(buffer);
region->buffer = buffer;
region->tiling = I915_TILING_NONE;
}
@ -454,12 +454,13 @@ intel_region_release_pbo(struct intel_context *intel,
assert(region->buffer == region->pbo->buffer);
region->pbo->region = NULL;
region->pbo = NULL;
dri_bo_unreference(region->buffer);
drm_intel_bo_unreference(region->buffer);
region->buffer = NULL;
region->buffer = dri_bo_alloc(intel->bufmgr, "region",
region->pitch * region->cpp * region->height,
64);
region->buffer = drm_intel_bo_alloc(intel->bufmgr, "region",
region->pitch * region->cpp *
region->height,
64);
}
/* Break the COW tie to the pbo. Both the pbo and the region end up
@ -491,7 +492,7 @@ intel_region_cow(struct intel_context *intel, struct intel_region *region)
assert(ok);
}
dri_bo *
drm_intel_bo *
intel_region_buffer(struct intel_context *intel,
struct intel_region *region, GLuint flag)
{

11
src/mesa/drivers/dri/intel/intel_regions.h
View file

@ -30,8 +30,9 @@
/** @file intel_regions.h
*
* Structure definitions and prototypes for intel_region handling, which is
* the basic structure for rectangular collections of pixels stored in a dri_bo.
* Structure definitions and prototypes for intel_region handling,
* which is the basic structure for rectangular collections of pixels
* stored in a drm_intel_bo.
*/
#include <xf86drm.h>
@ -134,9 +135,9 @@ void intel_region_release_pbo(struct intel_context *intel,
void intel_region_cow(struct intel_context *intel,
struct intel_region *region);
dri_bo *intel_region_buffer(struct intel_context *intel,
struct intel_region *region,
GLuint flag);
drm_intel_bo *intel_region_buffer(struct intel_context *intel,
struct intel_region *region,
GLuint flag);
void _mesa_copy_rect(GLubyte * dst,
GLuint cpp,

8
src/mesa/drivers/dri/intel/intel_tex_image.c
View file

@ -213,9 +213,9 @@ try_pbo_upload(struct intel_context *intel,
struct intel_buffer_object *pbo = intel_buffer_object(unpack->BufferObj);
GLuint src_offset, src_stride;
GLuint dst_x, dst_y, dst_stride;
dri_bo *dst_buffer = intel_region_buffer(intel,
intelImage->mt->region,
INTEL_WRITE_FULL);
drm_intel_bo *dst_buffer = intel_region_buffer(intel,
intelImage->mt->region,
INTEL_WRITE_FULL);
if (!_mesa_is_bufferobj(unpack->BufferObj) ||
intel->ctx._ImageTransferState ||
@ -242,7 +242,7 @@ try_pbo_upload(struct intel_context *intel,
intel_flush(&intel->ctx);
{
dri_bo *src_buffer = intel_bufferobj_buffer(intel, pbo, INTEL_READ);
drm_intel_bo *src_buffer = intel_bufferobj_buffer(intel, pbo, INTEL_READ);
if (!intelEmitCopyBlit(intel,
intelImage->mt->cpp,