diff --git a/src/gallium/drivers/crocus/crocus_program.c b/src/gallium/drivers/crocus/crocus_program.c index 9db6cbdb085..d32e8e17ab6 100644 --- a/src/gallium/drivers/crocus/crocus_program.c +++ b/src/gallium/drivers/crocus/crocus_program.c @@ -1219,16 +1219,19 @@ crocus_compile_vs(struct crocus_context *ice, crocus_sanitize_tex_key(&key_no_ucp.base.tex); struct brw_compile_vs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = &ice->dbg, + }, .key = &key_no_ucp, .prog_data = vs_prog_data, .edgeflag_is_last = devinfo->ver < 6, - .log_data = &ice->dbg, }; const unsigned *program = - brw_compile_vs(compiler, mem_ctx, ¶ms); + brw_compile_vs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile vertex shader: %s\n", params.error_str); + dbg_printf("Failed to compile vertex shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); return false; } @@ -1414,15 +1417,18 @@ crocus_compile_tcs(struct crocus_context *ice, crocus_sanitize_tex_key(&key_clean.base.tex); struct brw_compile_tcs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = &ice->dbg, + }, .key = &key_clean, .prog_data = tcs_prog_data, - .log_data = &ice->dbg, }; - const unsigned *program = brw_compile_tcs(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_tcs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile control shader: %s\n", params.error_str); + dbg_printf("Failed to compile control shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); return false; } @@ -1555,16 +1561,19 @@ crocus_compile_tes(struct crocus_context *ice, crocus_sanitize_tex_key(&key_clean.base.tex); struct brw_compile_tes_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = &ice->dbg, + }, .key = &key_clean, .prog_data = tes_prog_data, .input_vue_map = &input_vue_map, - .log_data = &ice->dbg, }; - const unsigned *program = brw_compile_tes(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_tes(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile evaluation shader: %s\n", params.error_str); + dbg_printf("Failed to compile evaluation shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); return false; } @@ -1697,15 +1706,18 @@ crocus_compile_gs(struct crocus_context *ice, crocus_sanitize_tex_key(&key_clean.base.tex); struct brw_compile_gs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = &ice->dbg, + }, .key = &key_clean, .prog_data = gs_prog_data, - .log_data = &ice->dbg, }; - const unsigned *program = brw_compile_gs(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_gs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile geometry shader: %s\n", params.error_str); + dbg_printf("Failed to compile geometry shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); return false; } @@ -1830,19 +1842,21 @@ crocus_compile_fs(struct crocus_context *ice, crocus_sanitize_tex_key(&key_clean.base.tex); struct brw_compile_fs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = &ice->dbg, + }, .key = &key_clean, .prog_data = fs_prog_data, .allow_spilling = true, .vue_map = vue_map, - - .log_data = &ice->dbg, }; const unsigned *program = - brw_compile_fs(compiler, mem_ctx, ¶ms); + brw_compile_fs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile fragment shader: %s\n", params.error_str); + dbg_printf("Failed to compile fragment shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); return false; } @@ -2508,16 +2522,19 @@ crocus_compile_cs(struct crocus_context *ice, num_system_values, num_cbufs, &key->base.tex); struct brw_compile_cs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = &ice->dbg, + }, .key = key, .prog_data = cs_prog_data, - .log_data = &ice->dbg, }; const unsigned *program = - brw_compile_cs(compiler, mem_ctx, ¶ms); + brw_compile_cs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile compute shader: %s\n", params.error_str); + dbg_printf("Failed to compile compute shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); return false; } diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index 7645e44b774..98a04d8af4b 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -1333,15 +1333,18 @@ iris_compile_vs(struct iris_screen *screen, struct brw_vs_prog_key brw_key = iris_to_brw_vs_key(screen, key); struct brw_compile_vs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = dbg, + }, .key = &brw_key, .prog_data = vs_prog_data, - .log_data = dbg, }; - const unsigned *program = brw_compile_vs(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_vs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile vertex shader: %s\n", params.error_str); + dbg_printf("Failed to compile vertex shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); shader->compilation_failed = true; @@ -1502,15 +1505,18 @@ iris_compile_tcs(struct iris_screen *screen, brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); struct brw_compile_tcs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = dbg, + }, .key = &brw_key, .prog_data = tcs_prog_data, - .log_data = dbg, }; - const unsigned *program = brw_compile_tcs(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_tcs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile control shader: %s\n", params.error_str); + dbg_printf("Failed to compile control shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); shader->compilation_failed = true; @@ -1664,16 +1670,19 @@ iris_compile_tes(struct iris_screen *screen, struct brw_tes_prog_key brw_key = iris_to_brw_tes_key(screen, key); struct brw_compile_tes_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = dbg, + }, .key = &brw_key, .prog_data = tes_prog_data, .input_vue_map = &input_vue_map, - .log_data = dbg, }; - const unsigned *program = brw_compile_tes(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_tes(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile evaluation shader: %s\n", params.error_str); + dbg_printf("Failed to compile evaluation shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); shader->compilation_failed = true; @@ -1803,15 +1812,18 @@ iris_compile_gs(struct iris_screen *screen, struct brw_gs_prog_key brw_key = iris_to_brw_gs_key(screen, key); struct brw_compile_gs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = dbg, + }, .key = &brw_key, .prog_data = gs_prog_data, - .log_data = dbg, }; - const unsigned *program = brw_compile_gs(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_gs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile geometry shader: %s\n", params.error_str); + dbg_printf("Failed to compile geometry shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); shader->compilation_failed = true; @@ -1939,19 +1951,21 @@ iris_compile_fs(struct iris_screen *screen, struct brw_wm_prog_key brw_key = iris_to_brw_fs_key(screen, key); struct brw_compile_fs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = dbg, + }, .key = &brw_key, .prog_data = fs_prog_data, .allow_spilling = true, .vue_map = vue_map, - - .log_data = dbg, }; - const unsigned *program = brw_compile_fs(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_fs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile fragment shader: %s\n", params.error_str); + dbg_printf("Failed to compile fragment shader: %s\n", params.base.error_str); ralloc_free(mem_ctx); shader->compilation_failed = true; @@ -2216,15 +2230,18 @@ iris_compile_cs(struct iris_screen *screen, struct brw_cs_prog_key brw_key = iris_to_brw_cs_key(screen, key); struct brw_compile_cs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = dbg, + }, .key = &brw_key, .prog_data = cs_prog_data, - .log_data = dbg, }; - const unsigned *program = brw_compile_cs(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_cs(compiler, ¶ms); if (program == NULL) { - dbg_printf("Failed to compile compute shader: %s\n", params.error_str); + dbg_printf("Failed to compile compute shader: %s\n", params.base.error_str); shader->compilation_failed = true; util_queue_fence_signal(&shader->ready); diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c index 57627b492c7..2beca9e23c9 100644 --- a/src/intel/blorp/blorp.c +++ b/src/intel/blorp/blorp.c @@ -303,17 +303,19 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx, } struct brw_compile_fs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = blorp->driver_ctx, + .debug_flag = DEBUG_BLORP, + }, .key = wm_key, .prog_data = wm_prog_data, .use_rep_send = use_repclear, - .log_data = blorp->driver_ctx, - - .debug_flag = DEBUG_BLORP, }; - return brw_compile_fs(compiler, mem_ctx, ¶ms); + return brw_compile_fs(compiler, ¶ms); } const unsigned * @@ -340,15 +342,17 @@ blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx, struct brw_vs_prog_key vs_key = { 0, }; struct brw_compile_vs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = blorp->driver_ctx, + .debug_flag = DEBUG_BLORP, + }, .key = &vs_key, .prog_data = vs_prog_data, - .log_data = blorp->driver_ctx, - - .debug_flag = DEBUG_BLORP, }; - return brw_compile_vs(compiler, mem_ctx, ¶ms); + return brw_compile_vs(compiler, ¶ms); } static bool @@ -398,14 +402,17 @@ blorp_compile_cs(struct blorp_context *blorp, void *mem_ctx, nir_metadata_block_index | nir_metadata_dominance, NULL); struct brw_compile_cs_params params = { - .nir = nir, + .base = { + .mem_ctx = mem_ctx, + .nir = nir, + .log_data = blorp->driver_ctx, + .debug_flag = DEBUG_BLORP, + }, .key = cs_key, .prog_data = cs_prog_data, - .log_data = blorp->driver_ctx, - .debug_flag = DEBUG_BLORP, }; - const unsigned *program = brw_compile_cs(compiler, mem_ctx, ¶ms); + const unsigned *program = brw_compile_cs(compiler, ¶ms); ralloc_free(cs_prog_data->base.param); cs_prog_data->base.param = NULL; diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index 5656b5ea4de..ecc01a68398 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -1754,29 +1754,34 @@ brw_prog_data_size(gl_shader_stage stage); unsigned brw_prog_key_size(gl_shader_stage stage); -/** - * Parameters for compiling a vertex shader. - * - * Some of these will be modified during the shader compilation. - */ -struct brw_compile_vs_params { +struct brw_compile_params { + void *mem_ctx; + nir_shader *nir; - const struct brw_vs_prog_key *key; - struct brw_vs_prog_data *prog_data; - - bool edgeflag_is_last; /* true for gallium */ - struct brw_compile_stats *stats; void *log_data; char *error_str; - /* If unset, DEBUG_VS is used. */ uint64_t debug_flag; }; +/** + * Parameters for compiling a vertex shader. + * + * Some of these will be modified during the shader compilation. + */ +struct brw_compile_vs_params { + struct brw_compile_params base; + + const struct brw_vs_prog_key *key; + struct brw_vs_prog_data *prog_data; + + bool edgeflag_is_last; /* true for gallium */ +}; + /** * Compile a vertex shader. * @@ -1784,7 +1789,6 @@ struct brw_compile_vs_params { */ const unsigned * brw_compile_vs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_vs_params *params); /** @@ -1793,16 +1797,10 @@ brw_compile_vs(const struct brw_compiler *compiler, * Some of these will be modified during the shader compilation. */ struct brw_compile_tcs_params { - nir_shader *nir; + struct brw_compile_params base; const struct brw_tcs_prog_key *key; struct brw_tcs_prog_data *prog_data; - - struct brw_compile_stats *stats; - - void *log_data; - - char *error_str; }; /** @@ -1812,7 +1810,6 @@ struct brw_compile_tcs_params { */ const unsigned * brw_compile_tcs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_tcs_params *params); /** @@ -1821,17 +1818,11 @@ brw_compile_tcs(const struct brw_compiler *compiler, * Some of these will be modified during the shader compilation. */ struct brw_compile_tes_params { - nir_shader *nir; + struct brw_compile_params base; const struct brw_tes_prog_key *key; struct brw_tes_prog_data *prog_data; const struct brw_vue_map *input_vue_map; - - struct brw_compile_stats *stats; - - void *log_data; - - char *error_str; }; /** @@ -1841,7 +1832,6 @@ struct brw_compile_tes_params { */ const unsigned * brw_compile_tes(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_tes_params *params); /** @@ -1850,16 +1840,10 @@ brw_compile_tes(const struct brw_compiler *compiler, * Some of these will be modified during the shader compilation. */ struct brw_compile_gs_params { - nir_shader *nir; + struct brw_compile_params base; const struct brw_gs_prog_key *key; struct brw_gs_prog_data *prog_data; - - struct brw_compile_stats *stats; - - void *log_data; - - char *error_str; }; /** @@ -1869,7 +1853,6 @@ struct brw_compile_gs_params { */ const unsigned * brw_compile_gs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_gs_params *params); /** @@ -1905,38 +1888,26 @@ brw_compile_clip(const struct brw_compiler *compiler, unsigned *final_assembly_size); struct brw_compile_task_params { - struct nir_shader *nir; + struct brw_compile_params base; const struct brw_task_prog_key *key; struct brw_task_prog_data *prog_data; - - struct brw_compile_stats *stats; - - char *error_str; - void *log_data; }; const unsigned * brw_compile_task(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_task_params *params); struct brw_compile_mesh_params { - struct nir_shader *nir; + struct brw_compile_params base; const struct brw_mesh_prog_key *key; struct brw_mesh_prog_data *prog_data; const struct brw_tue_map *tue_map; - - struct brw_compile_stats *stats; - - char *error_str; - void *log_data; }; const unsigned * brw_compile_mesh(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_mesh_params *params); /** @@ -1945,7 +1916,7 @@ brw_compile_mesh(const struct brw_compiler *compiler, * Some of these will be modified during the shader compilation. */ struct brw_compile_fs_params { - nir_shader *nir; + struct brw_compile_params base; const struct brw_wm_prog_key *key; struct brw_wm_prog_data *prog_data; @@ -1955,15 +1926,6 @@ struct brw_compile_fs_params { bool allow_spilling; bool use_rep_send; - - struct brw_compile_stats *stats; - - void *log_data; - - char *error_str; - - /* If unset, DEBUG_WM is used. */ - uint64_t debug_flag; }; /** @@ -1973,7 +1935,6 @@ struct brw_compile_fs_params { */ const unsigned * brw_compile_fs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_fs_params *params); /** @@ -1982,19 +1943,10 @@ brw_compile_fs(const struct brw_compiler *compiler, * Some of these will be modified during the shader compilation. */ struct brw_compile_cs_params { - nir_shader *nir; + struct brw_compile_params base; const struct brw_cs_prog_key *key; struct brw_cs_prog_data *prog_data; - - struct brw_compile_stats *stats; - - void *log_data; - - char *error_str; - - /* If unset, DEBUG_CS is used. */ - uint64_t debug_flag; }; /** @@ -2004,7 +1956,6 @@ struct brw_compile_cs_params { */ const unsigned * brw_compile_cs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_cs_params *params); /** @@ -2013,19 +1964,13 @@ brw_compile_cs(const struct brw_compiler *compiler, * Some of these will be modified during the shader compilation. */ struct brw_compile_bs_params { - nir_shader *nir; + struct brw_compile_params base; const struct brw_bs_prog_key *key; struct brw_bs_prog_data *prog_data; unsigned num_resume_shaders; struct nir_shader **resume_shaders; - - struct brw_compile_stats *stats; - - void *log_data; - - char *error_str; }; /** @@ -2035,7 +1980,6 @@ struct brw_compile_bs_params { */ const unsigned * brw_compile_bs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_bs_params *params); /** diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index be692dab709..2f2b27c90a4 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -7475,15 +7475,15 @@ brw_register_blocks(int reg_count) const unsigned * brw_compile_fs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_fs_params *params) { - struct nir_shader *nir = params->nir; + struct nir_shader *nir = params->base.nir; const struct brw_wm_prog_key *key = params->key; struct brw_wm_prog_data *prog_data = params->prog_data; bool allow_spilling = params->allow_spilling; const bool debug_enabled = - brw_should_print_shader(nir, params->debug_flag ? params->debug_flag : DEBUG_WM); + brw_should_print_shader(nir, params->base.debug_flag ? + params->base.debug_flag : DEBUG_WM); prog_data->base.stage = MESA_SHADER_FRAGMENT; prog_data->base.ray_queries = nir->info.ray_queries; @@ -7524,12 +7524,12 @@ brw_compile_fs(const struct brw_compiler *compiler, float throughput = 0; bool has_spilled = false; - v8 = std::make_unique(compiler, params->log_data, mem_ctx, &key->base, + v8 = std::make_unique(compiler, ¶ms->base, &key->base, &prog_data->base, nir, 8, - params->stats != NULL, + params->base.stats != NULL, debug_enabled); if (!v8->run_fs(allow_spilling, false /* do_rep_send */)) { - params->error_str = ralloc_strdup(mem_ctx, v8->fail_msg); + params->base.error_str = ralloc_strdup(params->base.mem_ctx, v8->fail_msg); return NULL; } else if (INTEL_SIMD(FS, 8)) { simd8_cfg = v8->cfg; @@ -7567,13 +7567,13 @@ brw_compile_fs(const struct brw_compiler *compiler, v8->max_dispatch_width >= 16 && (INTEL_SIMD(FS, 16) || params->use_rep_send)) { /* Try a SIMD16 compile */ - v16 = std::make_unique(compiler, params->log_data, mem_ctx, &key->base, + v16 = std::make_unique(compiler, ¶ms->base, &key->base, &prog_data->base, nir, 16, - params->stats != NULL, + params->base.stats != NULL, debug_enabled); v16->import_uniforms(v8.get()); if (!v16->run_fs(allow_spilling, params->use_rep_send)) { - brw_shader_perf_log(compiler, params->log_data, + brw_shader_perf_log(compiler, params->base.log_data, "SIMD16 shader failed to compile: %s\n", v16->fail_msg); } else { @@ -7595,20 +7595,20 @@ brw_compile_fs(const struct brw_compiler *compiler, devinfo->ver >= 6 && !simd16_failed && INTEL_SIMD(FS, 32)) { /* Try a SIMD32 compile */ - v32 = std::make_unique(compiler, params->log_data, mem_ctx, &key->base, + v32 = std::make_unique(compiler, ¶ms->base, &key->base, &prog_data->base, nir, 32, - params->stats != NULL, + params->base.stats != NULL, debug_enabled); v32->import_uniforms(v8.get()); if (!v32->run_fs(allow_spilling, false)) { - brw_shader_perf_log(compiler, params->log_data, + brw_shader_perf_log(compiler, params->base.log_data, "SIMD32 shader failed to compile: %s\n", v32->fail_msg); } else { const performance &perf = v32->performance_analysis.require(); if (!INTEL_DEBUG(DEBUG_DO32) && throughput > perf.throughput) { - brw_shader_perf_log(compiler, params->log_data, + brw_shader_perf_log(compiler, params->base.log_data, "SIMD32 shader inefficient\n"); } else { simd32_cfg = v32->cfg; @@ -7653,17 +7653,18 @@ brw_compile_fs(const struct brw_compiler *compiler, } } - fs_generator g(compiler, params->log_data, mem_ctx, &prog_data->base, + fs_generator g(compiler, ¶ms->base, &prog_data->base, v8->runtime_check_aads_emit, MESA_SHADER_FRAGMENT); if (unlikely(debug_enabled)) { - g.enable_debug(ralloc_asprintf(mem_ctx, "%s fragment shader %s", + g.enable_debug(ralloc_asprintf(params->base.mem_ctx, + "%s fragment shader %s", nir->info.label ? nir->info.label : "unnamed", nir->info.name)); } - struct brw_compile_stats *stats = params->stats; + struct brw_compile_stats *stats = params->base.stats; uint32_t max_dispatch_width = 0; if (simd8_cfg) { @@ -7692,7 +7693,7 @@ brw_compile_fs(const struct brw_compiler *compiler, max_dispatch_width = 32; } - for (struct brw_compile_stats *s = params->stats; s != NULL && s != stats; s++) + for (struct brw_compile_stats *s = params->base.stats; s != NULL && s != stats; s++) s->max_dispatch_width = max_dispatch_width; g.add_const_data(nir->constant_data, nir->constant_data_size); @@ -7828,15 +7829,15 @@ brw_nir_lower_simd(nir_shader *nir, unsigned dispatch_width) const unsigned * brw_compile_cs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_cs_params *params) { - const nir_shader *nir = params->nir; + const nir_shader *nir = params->base.nir; const struct brw_cs_prog_key *key = params->key; struct brw_cs_prog_data *prog_data = params->prog_data; const bool debug_enabled = - brw_should_print_shader(nir, params->debug_flag ? params->debug_flag : DEBUG_CS); + brw_should_print_shader(nir, params->base.debug_flag ? + params->base.debug_flag : DEBUG_CS); prog_data->base.stage = MESA_SHADER_COMPUTE; prog_data->base.total_shared = nir->info.shared_size; @@ -7850,7 +7851,7 @@ brw_compile_cs(const struct brw_compiler *compiler, } brw_simd_selection_state simd_state{ - .mem_ctx = mem_ctx, + .mem_ctx = params->base.mem_ctx, .devinfo = compiler->devinfo, .prog_data = prog_data, .required_width = brw_required_dispatch_width(&nir->info), @@ -7864,7 +7865,7 @@ brw_compile_cs(const struct brw_compiler *compiler, const unsigned dispatch_width = 8u << simd; - nir_shader *shader = nir_shader_clone(mem_ctx, nir); + nir_shader *shader = nir_shader_clone(params->base.mem_ctx, nir); brw_nir_apply_key(shader, compiler, &key->base, dispatch_width); @@ -7877,9 +7878,11 @@ brw_compile_cs(const struct brw_compiler *compiler, brw_postprocess_nir(shader, compiler, debug_enabled, key->base.robust_buffer_access); - v[simd] = std::make_unique(compiler, params->log_data, mem_ctx, &key->base, - &prog_data->base, shader, dispatch_width, - params->stats != NULL, + v[simd] = std::make_unique(compiler, ¶ms->base, + &key->base, + &prog_data->base, + shader, dispatch_width, + params->base.stats != NULL, debug_enabled); const int first = brw_simd_first_compiled(simd_state); @@ -7893,9 +7896,9 @@ brw_compile_cs(const struct brw_compiler *compiler, brw_simd_mark_compiled(simd_state, simd, v[simd]->spilled_any_registers); } else { - simd_state.error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg); + simd_state.error[simd] = ralloc_strdup(params->base.mem_ctx, v[simd]->fail_msg); if (simd > 0) { - brw_shader_perf_log(compiler, params->log_data, + brw_shader_perf_log(compiler, params->base.log_data, "SIMD%u shader failed to compile: %s\n", dispatch_width, v[simd]->fail_msg); } @@ -7904,9 +7907,11 @@ brw_compile_cs(const struct brw_compiler *compiler, const int selected_simd = brw_simd_select(simd_state); if (selected_simd < 0) { - params->error_str = ralloc_asprintf(mem_ctx, "Can't compile shader: %s, %s and %s.\n", - simd_state.error[0], simd_state.error[1], - simd_state.error[2]); + params->base.error_str = + ralloc_asprintf(params->base.mem_ctx, + "Can't compile shader: %s, %s and %s.\n", + simd_state.error[0], simd_state.error[1], + simd_state.error[2]); return NULL; } @@ -7916,10 +7921,11 @@ brw_compile_cs(const struct brw_compiler *compiler, if (!nir->info.workgroup_size_variable) prog_data->prog_mask = 1 << selected_simd; - fs_generator g(compiler, params->log_data, mem_ctx, &prog_data->base, + fs_generator g(compiler, ¶ms->base, &prog_data->base, selected->runtime_check_aads_emit, MESA_SHADER_COMPUTE); if (unlikely(debug_enabled)) { - char *name = ralloc_asprintf(mem_ctx, "%s compute shader %s", + char *name = ralloc_asprintf(params->base.mem_ctx, + "%s compute shader %s", nir->info.label ? nir->info.label : "unnamed", nir->info.name); @@ -7928,7 +7934,7 @@ brw_compile_cs(const struct brw_compiler *compiler, uint32_t max_dispatch_width = 8u << (util_last_bit(prog_data->prog_mask) - 1); - struct brw_compile_stats *stats = params->stats; + struct brw_compile_stats *stats = params->base.stats; for (unsigned simd = 0; simd < 3; simd++) { if (prog_data->prog_mask & (1u << simd)) { assert(v[simd]); @@ -7975,15 +7981,14 @@ brw_cs_get_dispatch_info(const struct intel_device_info *devinfo, } static uint8_t -compile_single_bs(const struct brw_compiler *compiler, void *log_data, - void *mem_ctx, +compile_single_bs(const struct brw_compiler *compiler, + struct brw_compile_bs_params *params, const struct brw_bs_prog_key *key, struct brw_bs_prog_data *prog_data, nir_shader *shader, fs_generator *g, struct brw_compile_stats *stats, - int *prog_offset, - char **error_str) + int *prog_offset) { const bool debug_enabled = brw_should_print_shader(shader, DEBUG_RT); @@ -7997,7 +8002,7 @@ compile_single_bs(const struct brw_compiler *compiler, void *log_data, key->base.robust_buffer_access); brw_simd_selection_state simd_state{ - .mem_ctx = mem_ctx, + .mem_ctx = params->base.mem_ctx, .devinfo = compiler->devinfo, .prog_data = prog_data, @@ -8015,7 +8020,8 @@ compile_single_bs(const struct brw_compiler *compiler, void *log_data, const unsigned dispatch_width = 8u << simd; - v[simd] = std::make_unique(compiler, log_data, mem_ctx, &key->base, + v[simd] = std::make_unique(compiler, ¶ms->base, + &key->base, &prog_data->base, shader, dispatch_width, stats != NULL, @@ -8025,9 +8031,10 @@ compile_single_bs(const struct brw_compiler *compiler, void *log_data, if (v[simd]->run_bs(allow_spilling)) { brw_simd_mark_compiled(simd_state, simd, v[simd]->spilled_any_registers); } else { - simd_state.error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg); + simd_state.error[simd] = ralloc_strdup(params->base.mem_ctx, + v[simd]->fail_msg); if (simd > 0) { - brw_shader_perf_log(compiler, log_data, + brw_shader_perf_log(compiler, params->base.log_data, "SIMD%u shader failed to compile: %s", dispatch_width, v[simd]->fail_msg); } @@ -8036,8 +8043,10 @@ compile_single_bs(const struct brw_compiler *compiler, void *log_data, const int selected_simd = brw_simd_select(simd_state); if (selected_simd < 0) { - *error_str = ralloc_asprintf(mem_ctx, "Can't compile shader: %s and %s.", - simd_state.error[0], simd_state.error[1]); + params->base.error_str = + ralloc_asprintf(params->base.mem_ctx, + "Can't compile shader: %s and %s.", + simd_state.error[0], simd_state.error[1]); return 0; } @@ -8072,10 +8081,9 @@ brw_bsr(const struct intel_device_info *devinfo, const unsigned * brw_compile_bs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_bs_params *params) { - nir_shader *shader = params->nir; + nir_shader *shader = params->base.nir; struct brw_bs_prog_data *prog_data = params->prog_data; unsigned num_resume_shaders = params->num_resume_shaders; nir_shader **resume_shaders = params->resume_shaders; @@ -8088,10 +8096,11 @@ brw_compile_bs(const struct brw_compiler *compiler, prog_data->max_stack_size = 0; prog_data->num_resume_shaders = num_resume_shaders; - fs_generator g(compiler, params->log_data, mem_ctx, &prog_data->base, + fs_generator g(compiler, ¶ms->base, &prog_data->base, false, shader->info.stage); if (unlikely(debug_enabled)) { - char *name = ralloc_asprintf(mem_ctx, "%s %s shader %s", + char *name = ralloc_asprintf(params->base.mem_ctx, + "%s %s shader %s", shader->info.label ? shader->info.label : "unnamed", gl_shader_stage_name(shader->info.stage), @@ -8100,16 +8109,17 @@ brw_compile_bs(const struct brw_compiler *compiler, } prog_data->simd_size = - compile_single_bs(compiler, params->log_data, mem_ctx, - params->key, prog_data, - shader, &g, params->stats, NULL, ¶ms->error_str); + compile_single_bs(compiler, params, params->key, prog_data, + shader, &g, params->base.stats, NULL); if (prog_data->simd_size == 0) return NULL; - uint64_t *resume_sbt = ralloc_array(mem_ctx, uint64_t, num_resume_shaders); + uint64_t *resume_sbt = ralloc_array(params->base.mem_ctx, + uint64_t, num_resume_shaders); for (unsigned i = 0; i < num_resume_shaders; i++) { if (INTEL_DEBUG(DEBUG_RT)) { - char *name = ralloc_asprintf(mem_ctx, "%s %s resume(%u) shader %s", + char *name = ralloc_asprintf(params->base.mem_ctx, + "%s %s resume(%u) shader %s", shader->info.label ? shader->info.label : "unnamed", gl_shader_stage_name(shader->info.stage), @@ -8120,9 +8130,8 @@ brw_compile_bs(const struct brw_compiler *compiler, /* TODO: Figure out shader stats etc. for resume shaders */ int offset = 0; uint8_t simd_size = - compile_single_bs(compiler, params->log_data, mem_ctx, params->key, - prog_data, resume_shaders[i], &g, NULL, &offset, - ¶ms->error_str); + compile_single_bs(compiler, params, params->key, + prog_data, resume_shaders[i], &g, NULL, &offset); if (simd_size == 0) return NULL; diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 1286c187f07..923d86c2235 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -191,16 +191,16 @@ struct brw_fs_bind_info { class fs_visitor : public backend_shader { public: - fs_visitor(const struct brw_compiler *compiler, void *log_data, - void *mem_ctx, + fs_visitor(const struct brw_compiler *compiler, + const struct brw_compile_params *params, const brw_base_prog_key *key, struct brw_stage_prog_data *prog_data, const nir_shader *shader, unsigned dispatch_width, bool needs_register_pressure, bool debug_enabled); - fs_visitor(const struct brw_compiler *compiler, void *log_data, - void *mem_ctx, + fs_visitor(const struct brw_compiler *compiler, + const struct brw_compile_params *params, struct brw_gs_compile *gs_compile, struct brw_gs_prog_data *prog_data, const nir_shader *shader, @@ -593,8 +593,8 @@ sample_mask_flag_subreg(const fs_visitor *shader) class fs_generator { public: - fs_generator(const struct brw_compiler *compiler, void *log_data, - void *mem_ctx, + fs_generator(const struct brw_compiler *compiler, + const struct brw_compile_params *params, struct brw_stage_prog_data *prog_data, bool runtime_check_aads_emit, gl_shader_stage stage); @@ -669,7 +669,7 @@ private: bool patch_halt_jumps(); const struct brw_compiler *compiler; - void *log_data; /* Passed to compiler->*_log functions */ + const struct brw_compile_params *params; const struct intel_device_info *devinfo; diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 777221df93f..ffacbe26f82 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -185,17 +185,17 @@ brw_reg_from_fs_reg(const struct intel_device_info *devinfo, fs_inst *inst, return brw_reg; } -fs_generator::fs_generator(const struct brw_compiler *compiler, void *log_data, - void *mem_ctx, +fs_generator::fs_generator(const struct brw_compiler *compiler, + const struct brw_compile_params *params, struct brw_stage_prog_data *prog_data, bool runtime_check_aads_emit, gl_shader_stage stage) - : compiler(compiler), log_data(log_data), + : compiler(compiler), params(params), devinfo(compiler->devinfo), prog_data(prog_data), dispatch_width(0), runtime_check_aads_emit(runtime_check_aads_emit), debug_flag(false), - shader_name(NULL), stage(stage), mem_ctx(mem_ctx) + shader_name(NULL), stage(stage), mem_ctx(params->mem_ctx) { p = rzalloc(mem_ctx, struct brw_codegen); brw_init_codegen(&compiler->isa, p, mem_ctx); @@ -2422,7 +2422,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, #endif assert(validated); - brw_shader_debug_log(compiler, log_data, + brw_shader_debug_log(compiler, params->log_data, "%s SIMD%d shader: %d inst, %d loops, %u cycles, " "%d:%d spills:fills, %u sends, " "scheduled with mode %s, " diff --git a/src/intel/compiler/brw_fs_visitor.cpp b/src/intel/compiler/brw_fs_visitor.cpp index 0e372c2ac8c..3cf29c7b48b 100644 --- a/src/intel/compiler/brw_fs_visitor.cpp +++ b/src/intel/compiler/brw_fs_visitor.cpp @@ -1347,16 +1347,15 @@ fs_visitor::emit_tcs_barrier() bld.emit(SHADER_OPCODE_BARRIER, bld.null_reg_ud(), m0); } -fs_visitor::fs_visitor(const struct brw_compiler *compiler, void *log_data, - void *mem_ctx, +fs_visitor::fs_visitor(const struct brw_compiler *compiler, + const struct brw_compile_params *params, const brw_base_prog_key *key, struct brw_stage_prog_data *prog_data, const nir_shader *shader, unsigned dispatch_width, bool needs_register_pressure, bool debug_enabled) - : backend_shader(compiler, log_data, mem_ctx, shader, prog_data, - debug_enabled), + : backend_shader(compiler, params, shader, prog_data, debug_enabled), key(key), gs_compile(NULL), prog_data(prog_data), live_analysis(this), regpressure_analysis(this), performance_analysis(this), @@ -1372,15 +1371,15 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler, void *log_data, api_subgroup_size == 32); } -fs_visitor::fs_visitor(const struct brw_compiler *compiler, void *log_data, - void *mem_ctx, +fs_visitor::fs_visitor(const struct brw_compiler *compiler, + const struct brw_compile_params *params, struct brw_gs_compile *c, struct brw_gs_prog_data *prog_data, const nir_shader *shader, bool needs_register_pressure, bool debug_enabled) - : backend_shader(compiler, log_data, mem_ctx, shader, - &prog_data->base.base, debug_enabled), + : backend_shader(compiler, params, shader, &prog_data->base.base, + debug_enabled), key(&c->key.base), gs_compile(c), prog_data(&prog_data->base.base), live_analysis(this), regpressure_analysis(this), diff --git a/src/intel/compiler/brw_kernel.c b/src/intel/compiler/brw_kernel.c index c920bb5c269..f6930b3b544 100644 --- a/src/intel/compiler/brw_kernel.c +++ b/src/intel/compiler/brw_kernel.c @@ -439,17 +439,20 @@ brw_kernel_from_spirv(struct brw_compiler *compiler, kernel->prog_data.base.nr_params = DIV_ROUND_UP(nir->num_uniforms, 4); struct brw_compile_cs_params params = { - .nir = nir, + .base = { + .nir = nir, + .stats = kernel->stats, + .log_data = log_data, + .mem_ctx = mem_ctx, + }, .key = &key, .prog_data = &kernel->prog_data, - .stats = kernel->stats, - .log_data = log_data, }; - kernel->code = brw_compile_cs(compiler, mem_ctx, ¶ms); + kernel->code = brw_compile_cs(compiler, ¶ms); if (error_str) - *error_str = params.error_str; + *error_str = params.base.error_str; return kernel->code != NULL; } diff --git a/src/intel/compiler/brw_mesh.cpp b/src/intel/compiler/brw_mesh.cpp index f377bfc15a6..04ef760d060 100644 --- a/src/intel/compiler/brw_mesh.cpp +++ b/src/intel/compiler/brw_mesh.cpp @@ -271,10 +271,9 @@ brw_nir_align_launch_mesh_workgroups(nir_shader *nir) const unsigned * brw_compile_task(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_task_params *params) { - struct nir_shader *nir = params->nir; + struct nir_shader *nir = params->base.nir; const struct brw_task_prog_key *key = params->key; struct brw_task_prog_data *prog_data = params->prog_data; const bool debug_enabled = brw_should_print_shader(nir, DEBUG_TASK); @@ -307,7 +306,7 @@ brw_compile_task(const struct brw_compiler *compiler, BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_DRAW_ID); brw_simd_selection_state simd_state{ - .mem_ctx = mem_ctx, + .mem_ctx = params->base.mem_ctx, .devinfo = compiler->devinfo, .prog_data = &prog_data->base, .required_width = brw_required_dispatch_width(&nir->info), @@ -321,7 +320,7 @@ brw_compile_task(const struct brw_compiler *compiler, const unsigned dispatch_width = 8 << simd; - nir_shader *shader = nir_shader_clone(mem_ctx, nir); + nir_shader *shader = nir_shader_clone(params->base.mem_ctx, nir); brw_nir_apply_key(shader, compiler, &key->base, dispatch_width); NIR_PASS(_, shader, brw_nir_lower_load_uniforms); @@ -332,9 +331,11 @@ brw_compile_task(const struct brw_compiler *compiler, brw_nir_adjust_payload(shader, compiler); - v[simd] = std::make_unique(compiler, params->log_data, mem_ctx, &key->base, - &prog_data->base.base, shader, dispatch_width, - params->stats != NULL, + v[simd] = std::make_unique(compiler, ¶ms->base, + &key->base, + &prog_data->base.base, + shader, dispatch_width, + params->base.stats != NULL, debug_enabled); if (prog_data->base.prog_mask) { @@ -346,14 +347,16 @@ brw_compile_task(const struct brw_compiler *compiler, if (v[simd]->run_task(allow_spilling)) brw_simd_mark_compiled(simd_state, simd, v[simd]->spilled_any_registers); else - simd_state.error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg); + simd_state.error[simd] = ralloc_strdup(params->base.mem_ctx, v[simd]->fail_msg); } int selected_simd = brw_simd_select(simd_state); if (selected_simd < 0) { - params->error_str = ralloc_asprintf(mem_ctx, "Can't compile shader: %s, %s and %s.\n", - simd_state.error[0], simd_state.error[1], - simd_state.error[2]); + params->base.error_str = + ralloc_asprintf(params->base.mem_ctx, + "Can't compile shader: %s, %s and %s.\n", + simd_state.error[0], simd_state.error[1], + simd_state.error[2]); return NULL; } @@ -365,10 +368,10 @@ brw_compile_task(const struct brw_compiler *compiler, brw_print_tue_map(stderr, &prog_data->map); } - fs_generator g(compiler, params->log_data, mem_ctx, - &prog_data->base.base, false, MESA_SHADER_TASK); + fs_generator g(compiler, ¶ms->base, &prog_data->base.base, + false, MESA_SHADER_TASK); if (unlikely(debug_enabled)) { - g.enable_debug(ralloc_asprintf(mem_ctx, + g.enable_debug(ralloc_asprintf(params->base.mem_ctx, "%s task shader %s", nir->info.label ? nir->info.label : "unnamed", @@ -376,7 +379,7 @@ brw_compile_task(const struct brw_compiler *compiler, } g.generate_code(selected->cfg, selected->dispatch_width, selected->shader_stats, - selected->performance_analysis.require(), params->stats); + selected->performance_analysis.require(), params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); return g.get_assembly(); } @@ -953,10 +956,9 @@ brw_pack_primitive_indices(nir_shader *nir, void *data) const unsigned * brw_compile_mesh(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_mesh_params *params) { - struct nir_shader *nir = params->nir; + struct nir_shader *nir = params->base.nir; const struct brw_mesh_prog_key *key = params->key; struct brw_mesh_prog_data *prog_data = params->prog_data; const bool debug_enabled = brw_should_print_shader(nir, DEBUG_MESH); @@ -993,7 +995,7 @@ brw_compile_mesh(const struct brw_compiler *compiler, brw_nir_lower_mue_outputs(nir, &prog_data->map); brw_simd_selection_state simd_state{ - .mem_ctx = mem_ctx, + .mem_ctx = params->base.mem_ctx, .devinfo = compiler->devinfo, .prog_data = &prog_data->base, .required_width = brw_required_dispatch_width(&nir->info), @@ -1007,7 +1009,7 @@ brw_compile_mesh(const struct brw_compiler *compiler, const unsigned dispatch_width = 8 << simd; - nir_shader *shader = nir_shader_clone(mem_ctx, nir); + nir_shader *shader = nir_shader_clone(params->base.mem_ctx, nir); /* * When Primitive Header is enabled, we may not generates writes to all @@ -1030,9 +1032,11 @@ brw_compile_mesh(const struct brw_compiler *compiler, brw_nir_adjust_payload(shader, compiler); - v[simd] = std::make_unique(compiler, params->log_data, mem_ctx, &key->base, - &prog_data->base.base, shader, dispatch_width, - params->stats != NULL, + v[simd] = std::make_unique(compiler, ¶ms->base, + &key->base, + &prog_data->base.base, + shader, dispatch_width, + params->base.stats != NULL, debug_enabled); if (prog_data->base.prog_mask) { @@ -1044,14 +1048,16 @@ brw_compile_mesh(const struct brw_compiler *compiler, if (v[simd]->run_mesh(allow_spilling)) brw_simd_mark_compiled(simd_state, simd, v[simd]->spilled_any_registers); else - simd_state.error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg); + simd_state.error[simd] = ralloc_strdup(params->base.mem_ctx, v[simd]->fail_msg); } int selected_simd = brw_simd_select(simd_state); if (selected_simd < 0) { - params->error_str = ralloc_asprintf(mem_ctx, "Can't compile shader: %s, %s and %s.\n", - simd_state.error[0], simd_state.error[1], - simd_state.error[2]);; + params->base.error_str = + ralloc_asprintf(params->base.mem_ctx, + "Can't compile shader: %s, %s and %s.\n", + simd_state.error[0], simd_state.error[1], + simd_state.error[2]);; return NULL; } @@ -1067,10 +1073,10 @@ brw_compile_mesh(const struct brw_compiler *compiler, brw_print_mue_map(stderr, &prog_data->map); } - fs_generator g(compiler, params->log_data, mem_ctx, - &prog_data->base.base, false, MESA_SHADER_MESH); + fs_generator g(compiler, ¶ms->base, &prog_data->base.base, + false, MESA_SHADER_MESH); if (unlikely(debug_enabled)) { - g.enable_debug(ralloc_asprintf(mem_ctx, + g.enable_debug(ralloc_asprintf(params->base.mem_ctx, "%s mesh shader %s", nir->info.label ? nir->info.label : "unnamed", @@ -1078,7 +1084,7 @@ brw_compile_mesh(const struct brw_compiler *compiler, } g.generate_code(selected->cfg, selected->dispatch_width, selected->shader_stats, - selected->performance_analysis.require(), params->stats); + selected->performance_analysis.require(), params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); return g.get_assembly(); } diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index ac817973bc8..b831335585d 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -685,17 +685,16 @@ brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg) } backend_shader::backend_shader(const struct brw_compiler *compiler, - void *log_data, - void *mem_ctx, + const struct brw_compile_params *params, const nir_shader *shader, struct brw_stage_prog_data *stage_prog_data, bool debug_enabled) : compiler(compiler), - log_data(log_data), + log_data(params->log_data), devinfo(compiler->devinfo), nir(shader), stage_prog_data(stage_prog_data), - mem_ctx(mem_ctx), + mem_ctx(params->mem_ctx), cfg(NULL), idom_analysis(this), stage(shader->info.stage), debug_enabled(debug_enabled) @@ -1296,11 +1295,10 @@ backend_shader::invalidate_analysis(brw::analysis_dependency_class c) extern "C" const unsigned * brw_compile_tes(const struct brw_compiler *compiler, - void *mem_ctx, brw_compile_tes_params *params) { const struct intel_device_info *devinfo = compiler->devinfo; - nir_shader *nir = params->nir; + nir_shader *nir = params->base.nir; const struct brw_tes_prog_key *key = params->key; const struct brw_vue_map *input_vue_map = params->input_vue_map; struct brw_tes_prog_data *prog_data = params->prog_data; @@ -1329,7 +1327,8 @@ brw_compile_tes(const struct brw_compiler *compiler, assert(output_size_bytes >= 1); if (output_size_bytes > GFX7_MAX_DS_URB_ENTRY_SIZE_BYTES) { - params->error_str = ralloc_strdup(mem_ctx, "DS outputs exceed maximum size"); + params->base.error_str = ralloc_strdup(params->base.mem_ctx, + "DS outputs exceed maximum size"); return NULL; } @@ -1390,21 +1389,22 @@ brw_compile_tes(const struct brw_compiler *compiler, } if (is_scalar) { - fs_visitor v(compiler, params->log_data, mem_ctx, &key->base, + fs_visitor v(compiler, ¶ms->base, &key->base, &prog_data->base.base, nir, 8, - params->stats != NULL, debug_enabled); + params->base.stats != NULL, debug_enabled); if (!v.run_tes()) { - params->error_str = ralloc_strdup(mem_ctx, v.fail_msg); + params->base.error_str = + ralloc_strdup(params->base.mem_ctx, v.fail_msg); return NULL; } prog_data->base.base.dispatch_grf_start_reg = v.payload().num_regs; prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; - fs_generator g(compiler, params->log_data, mem_ctx, + fs_generator g(compiler, ¶ms->base, &prog_data->base.base, false, MESA_SHADER_TESS_EVAL); if (unlikely(debug_enabled)) { - g.enable_debug(ralloc_asprintf(mem_ctx, + g.enable_debug(ralloc_asprintf(params->base.mem_ctx, "%s tessellation evaluation shader %s", nir->info.label ? nir->info.label : "unnamed", @@ -1412,26 +1412,27 @@ brw_compile_tes(const struct brw_compiler *compiler, } g.generate_code(v.cfg, 8, v.shader_stats, - v.performance_analysis.require(), params->stats); + v.performance_analysis.require(), params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); assembly = g.get_assembly(); } else { - brw::vec4_tes_visitor v(compiler, params->log_data, key, prog_data, - nir, mem_ctx, debug_enabled); + brw::vec4_tes_visitor v(compiler, ¶ms->base, key, prog_data, + nir, debug_enabled); if (!v.run()) { - params->error_str = ralloc_strdup(mem_ctx, v.fail_msg); + params->base.error_str = + ralloc_strdup(params->base.mem_ctx, v.fail_msg); return NULL; } if (unlikely(debug_enabled)) v.dump_instructions(); - assembly = brw_vec4_generate_assembly(compiler, params->log_data, mem_ctx, nir, + assembly = brw_vec4_generate_assembly(compiler, ¶ms->base, nir, &prog_data->base, v.cfg, v.performance_analysis.require(), - params->stats, debug_enabled); + debug_enabled); } return assembly; diff --git a/src/intel/compiler/brw_shader.h b/src/intel/compiler/brw_shader.h index 4f2a94f6d80..b4a6c181709 100644 --- a/src/intel/compiler/brw_shader.h +++ b/src/intel/compiler/brw_shader.h @@ -47,8 +47,7 @@ struct backend_shader { protected: backend_shader(const struct brw_compiler *compiler, - void *log_data, - void *mem_ctx, + const struct brw_compile_params *params, const nir_shader *shader, struct brw_stage_prog_data *stage_prog_data, bool debug_enabled); diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index 44129b6285b..f9d698b06a9 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -2495,7 +2495,7 @@ vec4_visitor::run() bool allocated_without_spills = reg_allocate(); if (!allocated_without_spills) { - brw_shader_perf_log(compiler, log_data, + brw_shader_perf_log(compiler, params->log_data, "%s shader triggered register spilling. " "Try reducing the number of live vec4 values " "to improve performance.\n", @@ -2533,14 +2533,14 @@ extern "C" { const unsigned * brw_compile_vs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_vs_params *params) { - struct nir_shader *nir = params->nir; + struct nir_shader *nir = params->base.nir; const struct brw_vs_prog_key *key = params->key; struct brw_vs_prog_data *prog_data = params->prog_data; const bool debug_enabled = - brw_should_print_shader(nir, params->debug_flag ? params->debug_flag : DEBUG_VS); + brw_should_print_shader(nir, params->base.debug_flag ? + params->base.debug_flag : DEBUG_VS); prog_data->base.base.stage = MESA_SHADER_VERTEX; prog_data->base.base.ray_queries = nir->info.ray_queries; @@ -2635,22 +2635,23 @@ brw_compile_vs(const struct brw_compiler *compiler, if (is_scalar) { prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; - fs_visitor v(compiler, params->log_data, mem_ctx, &key->base, + fs_visitor v(compiler, ¶ms->base, &key->base, &prog_data->base.base, nir, 8, - params->stats != NULL, debug_enabled); + params->base.stats != NULL, debug_enabled); if (!v.run_vs()) { - params->error_str = ralloc_strdup(mem_ctx, v.fail_msg); + params->base.error_str = + ralloc_strdup(params->base.mem_ctx, v.fail_msg); return NULL; } prog_data->base.base.dispatch_grf_start_reg = v.payload().num_regs; - fs_generator g(compiler, params->log_data, mem_ctx, + fs_generator g(compiler, ¶ms->base, &prog_data->base.base, v.runtime_check_aads_emit, MESA_SHADER_VERTEX); if (unlikely(debug_enabled)) { const char *debug_name = - ralloc_asprintf(mem_ctx, "%s vertex shader %s", + ralloc_asprintf(params->base.mem_ctx, "%s vertex shader %s", nir->info.label ? nir->info.label : "unnamed", nir->info.name); @@ -2658,7 +2659,7 @@ brw_compile_vs(const struct brw_compiler *compiler, g.enable_debug(debug_name); } g.generate_code(v.cfg, 8, v.shader_stats, - v.performance_analysis.require(), params->stats); + v.performance_analysis.require(), params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); assembly = g.get_assembly(); } @@ -2666,19 +2667,19 @@ brw_compile_vs(const struct brw_compiler *compiler, if (!assembly) { prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; - vec4_vs_visitor v(compiler, params->log_data, key, prog_data, - nir, mem_ctx, - debug_enabled); + vec4_vs_visitor v(compiler, ¶ms->base, key, prog_data, + nir, debug_enabled); if (!v.run()) { - params->error_str = ralloc_strdup(mem_ctx, v.fail_msg); + params->base.error_str = + ralloc_strdup(params->base.mem_ctx, v.fail_msg); return NULL; } - assembly = brw_vec4_generate_assembly(compiler, params->log_data, mem_ctx, + assembly = brw_vec4_generate_assembly(compiler, ¶ms->base, nir, &prog_data->base, v.cfg, v.performance_analysis.require(), - params->stats, debug_enabled); + debug_enabled); } return assembly; diff --git a/src/intel/compiler/brw_vec4.h b/src/intel/compiler/brw_vec4.h index 94a99b54a5a..5ab95673924 100644 --- a/src/intel/compiler/brw_vec4.h +++ b/src/intel/compiler/brw_vec4.h @@ -43,13 +43,11 @@ extern "C" { const unsigned * brw_vec4_generate_assembly(const struct brw_compiler *compiler, - void *log_data, - void *mem_ctx, + const struct brw_compile_params *params, const nir_shader *nir, struct brw_vue_prog_data *prog_data, const struct cfg_t *cfg, const brw::performance &perf, - struct brw_compile_stats *stats, bool debug_enabled); #ifdef __cplusplus @@ -66,11 +64,10 @@ class vec4_visitor : public backend_shader { public: vec4_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, const struct brw_sampler_prog_key_data *key, struct brw_vue_prog_data *prog_data, const nir_shader *shader, - void *mem_ctx, bool no_spills, bool debug_enabled); @@ -345,6 +342,8 @@ private: const bool no_spills; unsigned last_scratch; /**< measured in 32-byte (register size) units */ + + const struct brw_compile_params *params; }; } /* namespace brw */ diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp index f47fee23a73..5e0a1bd4127 100644 --- a/src/intel/compiler/brw_vec4_generator.cpp +++ b/src/intel/compiler/brw_vec4_generator.cpp @@ -2281,21 +2281,20 @@ generate_code(struct brw_codegen *p, extern "C" const unsigned * brw_vec4_generate_assembly(const struct brw_compiler *compiler, - void *log_data, - void *mem_ctx, + const struct brw_compile_params *params, const nir_shader *nir, struct brw_vue_prog_data *prog_data, const struct cfg_t *cfg, const performance &perf, - struct brw_compile_stats *stats, bool debug_enabled) { - struct brw_codegen *p = rzalloc(mem_ctx, struct brw_codegen); - brw_init_codegen(&compiler->isa, p, mem_ctx); + struct brw_codegen *p = rzalloc(params->mem_ctx, struct brw_codegen); + brw_init_codegen(&compiler->isa, p, params->mem_ctx); brw_set_default_access_mode(p, BRW_ALIGN_16); - generate_code(p, compiler, log_data, nir, prog_data, cfg, perf, stats, - debug_enabled); + generate_code(p, compiler, params->log_data, + nir, prog_data, cfg, perf, + params->stats, debug_enabled); assert(prog_data->base.const_data_size == 0); if (nir->constant_data_size > 0) { diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp index 3d7f3d0de46..174c8cfdb99 100644 --- a/src/intel/compiler/brw_vec4_gs_visitor.cpp +++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp @@ -39,15 +39,14 @@ namespace brw { vec4_gs_visitor::vec4_gs_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, struct brw_gs_compile *c, struct brw_gs_prog_data *prog_data, const nir_shader *shader, - void *mem_ctx, bool no_spills, bool debug_enabled) - : vec4_visitor(compiler, log_data, &c->key.base.tex, - &prog_data->base, shader, mem_ctx, + : vec4_visitor(compiler, params, &c->key.base.tex, + &prog_data->base, shader, no_spills, debug_enabled), c(c), gs_prog_data(prog_data) @@ -583,10 +582,9 @@ static const GLuint gl_prim_to_hw_prim[MESA_PRIM_TRIANGLE_STRIP_ADJACENCY+1] = { extern "C" const unsigned * brw_compile_gs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_gs_params *params) { - nir_shader *nir = params->nir; + nir_shader *nir = params->base.nir; const struct brw_gs_prog_key *key = params->key; struct brw_gs_prog_data *prog_data = params->prog_data; @@ -820,28 +818,29 @@ brw_compile_gs(const struct brw_compiler *compiler, } if (is_scalar) { - fs_visitor v(compiler, params->log_data, mem_ctx, &c, prog_data, nir, - params->stats != NULL, debug_enabled); + fs_visitor v(compiler, ¶ms->base, &c, prog_data, nir, + params->base.stats != NULL, debug_enabled); if (v.run_gs()) { prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; prog_data->base.base.dispatch_grf_start_reg = v.payload().num_regs; - fs_generator g(compiler, params->log_data, mem_ctx, + fs_generator g(compiler, ¶ms->base, &prog_data->base.base, false, MESA_SHADER_GEOMETRY); if (unlikely(debug_enabled)) { const char *label = nir->info.label ? nir->info.label : "unnamed"; - char *name = ralloc_asprintf(mem_ctx, "%s geometry shader %s", + char *name = ralloc_asprintf(params->base.mem_ctx, + "%s geometry shader %s", label, nir->info.name); g.enable_debug(name); } g.generate_code(v.cfg, 8, v.shader_stats, - v.performance_analysis.require(), params->stats); + v.performance_analysis.require(), params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); return g.get_assembly(); } - params->error_str = ralloc_strdup(mem_ctx, v.fail_msg); + params->base.error_str = ralloc_strdup(params->base.mem_ctx, v.fail_msg); return NULL; } @@ -855,8 +854,8 @@ brw_compile_gs(const struct brw_compiler *compiler, !INTEL_DEBUG(DEBUG_NO_DUAL_OBJECT_GS)) { prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; - brw::vec4_gs_visitor v(compiler, params->log_data, &c, prog_data, nir, - mem_ctx, true /* no_spills */, + brw::vec4_gs_visitor v(compiler, ¶ms->base, &c, prog_data, nir, + true /* no_spills */, debug_enabled); /* Backup 'nr_params' and 'param' as they can be modified by the @@ -872,11 +871,11 @@ brw_compile_gs(const struct brw_compiler *compiler, if (v.run()) { /* Success! Backup is not needed */ ralloc_free(param); - return brw_vec4_generate_assembly(compiler, params->log_data, mem_ctx, + return brw_vec4_generate_assembly(compiler, ¶ms->base, nir, &prog_data->base, v.cfg, v.performance_analysis.require(), - params->stats, debug_enabled); + debug_enabled); } else { /* These variables could be modified by the execution of the GS * visitor if it packed the uniforms in the push constant buffer. @@ -925,21 +924,22 @@ brw_compile_gs(const struct brw_compiler *compiler, const unsigned *ret = NULL; if (compiler->devinfo->ver >= 7) - gs = new brw::vec4_gs_visitor(compiler, params->log_data, &c, prog_data, - nir, mem_ctx, false /* no_spills */, + gs = new brw::vec4_gs_visitor(compiler, ¶ms->base, &c, prog_data, + nir, false /* no_spills */, debug_enabled); else - gs = new brw::gfx6_gs_visitor(compiler, params->log_data, &c, prog_data, - nir, mem_ctx, false /* no_spills */, + gs = new brw::gfx6_gs_visitor(compiler, ¶ms->base, &c, prog_data, + nir, false /* no_spills */, debug_enabled); if (!gs->run()) { - params->error_str = ralloc_strdup(mem_ctx, gs->fail_msg); + params->base.error_str = + ralloc_strdup(params->base.mem_ctx, gs->fail_msg); } else { - ret = brw_vec4_generate_assembly(compiler, params->log_data, mem_ctx, nir, + ret = brw_vec4_generate_assembly(compiler, ¶ms->base, nir, &prog_data->base, gs->cfg, gs->performance_analysis.require(), - params->stats, debug_enabled); + debug_enabled); } delete gs; diff --git a/src/intel/compiler/brw_vec4_gs_visitor.h b/src/intel/compiler/brw_vec4_gs_visitor.h index 009a8c1d7c1..ec8b6f7fa8b 100644 --- a/src/intel/compiler/brw_vec4_gs_visitor.h +++ b/src/intel/compiler/brw_vec4_gs_visitor.h @@ -41,11 +41,10 @@ class vec4_gs_visitor : public vec4_visitor { public: vec4_gs_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, struct brw_gs_compile *c, struct brw_gs_prog_data *prog_data, const nir_shader *shader, - void *mem_ctx, bool no_spills, bool debug_enabled); diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp index 08ce1ca385d..9f7b2e5c75e 100644 --- a/src/intel/compiler/brw_vec4_tcs.cpp +++ b/src/intel/compiler/brw_vec4_tcs.cpp @@ -36,14 +36,13 @@ namespace brw { vec4_tcs_visitor::vec4_tcs_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, const struct brw_tcs_prog_key *key, struct brw_tcs_prog_data *prog_data, const nir_shader *nir, - void *mem_ctx, bool debug_enabled) - : vec4_visitor(compiler, log_data, &key->base.tex, &prog_data->base, - nir, mem_ctx, false, debug_enabled), + : vec4_visitor(compiler, params, &key->base.tex, &prog_data->base, + nir, false, debug_enabled), key(key) { } @@ -353,11 +352,10 @@ get_patch_count_threshold(int input_control_points) extern "C" const unsigned * brw_compile_tcs(const struct brw_compiler *compiler, - void *mem_ctx, struct brw_compile_tcs_params *params) { const struct intel_device_info *devinfo = compiler->devinfo; - nir_shader *nir = params->nir; + nir_shader *nir = params->base.nir; const struct brw_tcs_prog_key *key = params->key; struct brw_tcs_prog_data *prog_data = params->prog_data; struct brw_vue_prog_data *vue_prog_data = &prog_data->base; @@ -449,20 +447,21 @@ brw_compile_tcs(const struct brw_compiler *compiler, } if (is_scalar) { - fs_visitor v(compiler, params->log_data, mem_ctx, &key->base, - &prog_data->base.base, nir, 8, params->stats != NULL, + fs_visitor v(compiler, ¶ms->base, &key->base, + &prog_data->base.base, nir, 8, params->base.stats != NULL, debug_enabled); if (!v.run_tcs()) { - params->error_str = ralloc_strdup(mem_ctx, v.fail_msg); + params->base.error_str = + ralloc_strdup(params->base.mem_ctx, v.fail_msg); return NULL; } prog_data->base.base.dispatch_grf_start_reg = v.payload().num_regs; - fs_generator g(compiler, params->log_data, mem_ctx, + fs_generator g(compiler, ¶ms->base, &prog_data->base.base, false, MESA_SHADER_TESS_CTRL); if (unlikely(debug_enabled)) { - g.enable_debug(ralloc_asprintf(mem_ctx, + g.enable_debug(ralloc_asprintf(params->base.mem_ctx, "%s tessellation control shader %s", nir->info.label ? nir->info.label : "unnamed", @@ -470,16 +469,17 @@ brw_compile_tcs(const struct brw_compiler *compiler, } g.generate_code(v.cfg, 8, v.shader_stats, - v.performance_analysis.require(), params->stats); + v.performance_analysis.require(), params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); assembly = g.get_assembly(); } else { - brw::vec4_tcs_visitor v(compiler, params->log_data, key, prog_data, - nir, mem_ctx, debug_enabled); + brw::vec4_tcs_visitor v(compiler, ¶ms->base, key, prog_data, + nir, debug_enabled); if (!v.run()) { - params->error_str = ralloc_strdup(mem_ctx, v.fail_msg); + params->base.error_str = + ralloc_strdup(params->base.mem_ctx, v.fail_msg); return NULL; } @@ -487,10 +487,10 @@ brw_compile_tcs(const struct brw_compiler *compiler, v.dump_instructions(); - assembly = brw_vec4_generate_assembly(compiler, params->log_data, mem_ctx, nir, + assembly = brw_vec4_generate_assembly(compiler, ¶ms->base, nir, &prog_data->base, v.cfg, v.performance_analysis.require(), - params->stats, debug_enabled); + debug_enabled); } return assembly; diff --git a/src/intel/compiler/brw_vec4_tcs.h b/src/intel/compiler/brw_vec4_tcs.h index b251fe38413..542b47ed16f 100644 --- a/src/intel/compiler/brw_vec4_tcs.h +++ b/src/intel/compiler/brw_vec4_tcs.h @@ -40,11 +40,10 @@ class vec4_tcs_visitor : public vec4_visitor { public: vec4_tcs_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, const struct brw_tcs_prog_key *key, struct brw_tcs_prog_data *prog_data, const nir_shader *nir, - void *mem_ctx, bool debug_enabled); protected: diff --git a/src/intel/compiler/brw_vec4_tes.cpp b/src/intel/compiler/brw_vec4_tes.cpp index af572a857c6..7aef55d5ac1 100644 --- a/src/intel/compiler/brw_vec4_tes.cpp +++ b/src/intel/compiler/brw_vec4_tes.cpp @@ -34,14 +34,13 @@ namespace brw { vec4_tes_visitor::vec4_tes_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, const struct brw_tes_prog_key *key, struct brw_tes_prog_data *prog_data, const nir_shader *shader, - void *mem_ctx, bool debug_enabled) - : vec4_visitor(compiler, log_data, &key->base.tex, &prog_data->base, - shader, mem_ctx, false, debug_enabled) + : vec4_visitor(compiler, params, &key->base.tex, &prog_data->base, + shader, false, debug_enabled) { } diff --git a/src/intel/compiler/brw_vec4_tes.h b/src/intel/compiler/brw_vec4_tes.h index af9333b30ac..23a11956681 100644 --- a/src/intel/compiler/brw_vec4_tes.h +++ b/src/intel/compiler/brw_vec4_tes.h @@ -39,11 +39,10 @@ class vec4_tes_visitor : public vec4_visitor { public: vec4_tes_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, const struct brw_tes_prog_key *key, struct brw_tes_prog_data *prog_data, const nir_shader *nir, - void *mem_ctx, bool debug_enabled); protected: diff --git a/src/intel/compiler/brw_vec4_visitor.cpp b/src/intel/compiler/brw_vec4_visitor.cpp index a1c0c13622e..971b5f655bc 100644 --- a/src/intel/compiler/brw_vec4_visitor.cpp +++ b/src/intel/compiler/brw_vec4_visitor.cpp @@ -1369,15 +1369,13 @@ vec4_visitor::emit_shader_float_controls_execution_mode() } vec4_visitor::vec4_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, const struct brw_sampler_prog_key_data *key_tex, struct brw_vue_prog_data *prog_data, const nir_shader *shader, - void *mem_ctx, bool no_spills, bool debug_enabled) - : backend_shader(compiler, log_data, mem_ctx, shader, &prog_data->base, - debug_enabled), + : backend_shader(compiler, params, shader, &prog_data->base, debug_enabled), key_tex(key_tex), prog_data(prog_data), fail_msg(NULL), diff --git a/src/intel/compiler/brw_vec4_vs.h b/src/intel/compiler/brw_vec4_vs.h index 264d9789e7a..0929df5ff3d 100644 --- a/src/intel/compiler/brw_vec4_vs.h +++ b/src/intel/compiler/brw_vec4_vs.h @@ -32,11 +32,10 @@ class vec4_vs_visitor : public vec4_visitor { public: vec4_vs_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, const struct brw_vs_prog_key *key, struct brw_vs_prog_data *vs_prog_data, const nir_shader *shader, - void *mem_ctx, bool debug_enabled); protected: diff --git a/src/intel/compiler/brw_vec4_vs_visitor.cpp b/src/intel/compiler/brw_vec4_vs_visitor.cpp index 07ef1c875e8..c30a3434451 100644 --- a/src/intel/compiler/brw_vec4_vs_visitor.cpp +++ b/src/intel/compiler/brw_vec4_vs_visitor.cpp @@ -92,14 +92,13 @@ vec4_vs_visitor::emit_thread_end() vec4_vs_visitor::vec4_vs_visitor(const struct brw_compiler *compiler, - void *log_data, + const struct brw_compile_params *params, const struct brw_vs_prog_key *key, struct brw_vs_prog_data *vs_prog_data, const nir_shader *shader, - void *mem_ctx, bool debug_enabled) - : vec4_visitor(compiler, log_data, &key->base.tex, &vs_prog_data->base, - shader, mem_ctx, false /* no_spills */, debug_enabled), + : vec4_visitor(compiler, params, &key->base.tex, &vs_prog_data->base, + shader, false /* no_spills */, debug_enabled), key(key), vs_prog_data(vs_prog_data) { diff --git a/src/intel/compiler/gfx6_gs_visitor.h b/src/intel/compiler/gfx6_gs_visitor.h index 34a68d4f728..61832a0cb6b 100644 --- a/src/intel/compiler/gfx6_gs_visitor.h +++ b/src/intel/compiler/gfx6_gs_visitor.h @@ -36,15 +36,13 @@ class gfx6_gs_visitor : public vec4_gs_visitor { public: gfx6_gs_visitor(const struct brw_compiler *comp, - void *log_data, + const struct brw_compile_params *params, struct brw_gs_compile *c, struct brw_gs_prog_data *prog_data, const nir_shader *shader, - void *mem_ctx, bool no_spills, bool debug_enabled) : - vec4_gs_visitor(comp, log_data, c, prog_data, shader, mem_ctx, no_spills, - debug_enabled) + vec4_gs_visitor(comp, params, c, prog_data, shader, no_spills, debug_enabled) { } diff --git a/src/intel/compiler/test_fs_cmod_propagation.cpp b/src/intel/compiler/test_fs_cmod_propagation.cpp index cfc99a96fef..27f0bd05e50 100644 --- a/src/intel/compiler/test_fs_cmod_propagation.cpp +++ b/src/intel/compiler/test_fs_cmod_propagation.cpp @@ -34,6 +34,7 @@ class cmod_propagation_test : public ::testing::Test { public: struct brw_compiler *compiler; + struct brw_compile_params params; struct intel_device_info *devinfo; void *ctx; struct brw_wm_prog_data *prog_data; @@ -56,10 +57,10 @@ class cmod_propagation_fs_visitor : public fs_visitor { public: cmod_propagation_fs_visitor(struct brw_compiler *compiler, - void *mem_ctx, + struct brw_compile_params *params, struct brw_wm_prog_data *prog_data, nir_shader *shader) - : fs_visitor(compiler, NULL, mem_ctx, NULL, + : fs_visitor(compiler, params, NULL, &prog_data->base, shader, 8, false, false) {} }; @@ -71,11 +72,14 @@ void cmod_propagation_test::SetUp() devinfo = rzalloc(ctx, struct intel_device_info); compiler->devinfo = devinfo; + params = {}; + params.mem_ctx = ctx; + prog_data = ralloc(ctx, struct brw_wm_prog_data); nir_shader *shader = nir_shader_create(ctx, MESA_SHADER_FRAGMENT, NULL, NULL); - v = new cmod_propagation_fs_visitor(compiler, ctx, prog_data, shader); + v = new cmod_propagation_fs_visitor(compiler, ¶ms, prog_data, shader); devinfo->ver = 7; devinfo->verx10 = devinfo->ver * 10; diff --git a/src/intel/compiler/test_fs_copy_propagation.cpp b/src/intel/compiler/test_fs_copy_propagation.cpp index c66f64fd139..15c4b647840 100644 --- a/src/intel/compiler/test_fs_copy_propagation.cpp +++ b/src/intel/compiler/test_fs_copy_propagation.cpp @@ -34,6 +34,7 @@ class copy_propagation_test : public ::testing::Test { public: struct brw_compiler *compiler; + struct brw_compile_params params; struct intel_device_info *devinfo; void *ctx; struct brw_wm_prog_data *prog_data; @@ -45,10 +46,10 @@ class copy_propagation_fs_visitor : public fs_visitor { public: copy_propagation_fs_visitor(struct brw_compiler *compiler, - void *mem_ctx, + struct brw_compile_params *params, struct brw_wm_prog_data *prog_data, nir_shader *shader) - : fs_visitor(compiler, NULL, mem_ctx, NULL, + : fs_visitor(compiler, params, NULL, &prog_data->base, shader, 8, false, false) {} }; @@ -60,11 +61,14 @@ void copy_propagation_test::SetUp() devinfo = rzalloc(ctx, struct intel_device_info); compiler->devinfo = devinfo; + params = {}; + params.mem_ctx = ctx; + prog_data = ralloc(ctx, struct brw_wm_prog_data); nir_shader *shader = nir_shader_create(ctx, MESA_SHADER_FRAGMENT, NULL, NULL); - v = new copy_propagation_fs_visitor(compiler, ctx, prog_data, shader); + v = new copy_propagation_fs_visitor(compiler, ¶ms, prog_data, shader); devinfo->ver = 4; devinfo->verx10 = devinfo->ver * 10; diff --git a/src/intel/compiler/test_fs_saturate_propagation.cpp b/src/intel/compiler/test_fs_saturate_propagation.cpp index 5c85c0165c1..3b895376521 100644 --- a/src/intel/compiler/test_fs_saturate_propagation.cpp +++ b/src/intel/compiler/test_fs_saturate_propagation.cpp @@ -34,6 +34,7 @@ class saturate_propagation_test : public ::testing::Test { public: struct brw_compiler *compiler; + struct brw_compile_params params; struct intel_device_info *devinfo; void *ctx; struct brw_wm_prog_data *prog_data; @@ -45,10 +46,10 @@ class saturate_propagation_fs_visitor : public fs_visitor { public: saturate_propagation_fs_visitor(struct brw_compiler *compiler, - void *mem_ctx, + struct brw_compile_params *params, struct brw_wm_prog_data *prog_data, nir_shader *shader) - : fs_visitor(compiler, NULL, mem_ctx, NULL, + : fs_visitor(compiler, params, NULL, &prog_data->base, shader, 16, false, false) {} }; @@ -60,11 +61,14 @@ void saturate_propagation_test::SetUp() devinfo = rzalloc(ctx, struct intel_device_info); compiler->devinfo = devinfo; + params = {}; + params.mem_ctx = ctx; + prog_data = ralloc(ctx, struct brw_wm_prog_data); nir_shader *shader = nir_shader_create(ctx, MESA_SHADER_FRAGMENT, NULL, NULL); - v = new saturate_propagation_fs_visitor(compiler, ctx, prog_data, shader); + v = new saturate_propagation_fs_visitor(compiler, ¶ms, prog_data, shader); devinfo->ver = 6; devinfo->verx10 = devinfo->ver * 10; diff --git a/src/intel/compiler/test_fs_scoreboard.cpp b/src/intel/compiler/test_fs_scoreboard.cpp index 39b2b85eb07..415a02e09dd 100644 --- a/src/intel/compiler/test_fs_scoreboard.cpp +++ b/src/intel/compiler/test_fs_scoreboard.cpp @@ -34,6 +34,7 @@ class scoreboard_test : public ::testing::Test { public: struct brw_compiler *compiler; + struct brw_compile_params params; struct intel_device_info *devinfo; void *ctx; struct brw_wm_prog_data *prog_data; @@ -48,11 +49,14 @@ void scoreboard_test::SetUp() devinfo = rzalloc(ctx, struct intel_device_info); compiler->devinfo = devinfo; + params = {}; + params.mem_ctx = ctx; + prog_data = ralloc(ctx, struct brw_wm_prog_data); nir_shader *shader = nir_shader_create(ctx, MESA_SHADER_FRAGMENT, NULL, NULL); - v = new fs_visitor(compiler, NULL, ctx, NULL, &prog_data->base, shader, 8, + v = new fs_visitor(compiler, ¶ms, NULL, &prog_data->base, shader, 8, false, false); devinfo->ver = 12; diff --git a/src/intel/compiler/test_vec4_cmod_propagation.cpp b/src/intel/compiler/test_vec4_cmod_propagation.cpp index f589427f5a8..ce0e0131cc0 100644 --- a/src/intel/compiler/test_vec4_cmod_propagation.cpp +++ b/src/intel/compiler/test_vec4_cmod_propagation.cpp @@ -37,6 +37,7 @@ class cmod_propagation_vec4_test : public ::testing::Test { public: struct brw_compiler *compiler; + struct brw_compile_params params; struct intel_device_info *devinfo; void *ctx; struct gl_shader_program *shader_prog; @@ -48,10 +49,10 @@ class cmod_propagation_vec4_visitor : public vec4_visitor { public: cmod_propagation_vec4_visitor(struct brw_compiler *compiler, - void *mem_ctx, + struct brw_compile_params *params, nir_shader *shader, struct brw_vue_prog_data *prog_data) - : vec4_visitor(compiler, NULL, NULL, prog_data, shader, mem_ctx, + : vec4_visitor(compiler, params, NULL, prog_data, shader, false, false) { prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; @@ -103,11 +104,14 @@ void cmod_propagation_vec4_test::SetUp() devinfo = rzalloc(ctx, struct intel_device_info); compiler->devinfo = devinfo; + params = {}; + params.mem_ctx = ctx; + prog_data = ralloc(ctx, struct brw_vue_prog_data); nir_shader *shader = nir_shader_create(ctx, MESA_SHADER_VERTEX, NULL, NULL); - v = new cmod_propagation_vec4_visitor(compiler, ctx, shader, prog_data); + v = new cmod_propagation_vec4_visitor(compiler, ¶ms, shader, prog_data); devinfo->ver = 7; devinfo->verx10 = devinfo->ver * 10; diff --git a/src/intel/compiler/test_vec4_copy_propagation.cpp b/src/intel/compiler/test_vec4_copy_propagation.cpp index 2600c9c5bf4..7ed6880a4e4 100644 --- a/src/intel/compiler/test_vec4_copy_propagation.cpp +++ b/src/intel/compiler/test_vec4_copy_propagation.cpp @@ -33,6 +33,7 @@ class copy_propagation_vec4_test : public ::testing::Test { public: struct brw_compiler *compiler; + struct brw_compile_params params; struct intel_device_info *devinfo; void *ctx; struct gl_shader_program *shader_prog; @@ -44,10 +45,10 @@ class copy_propagation_vec4_visitor : public vec4_visitor { public: copy_propagation_vec4_visitor(struct brw_compiler *compiler, - void *mem_ctx, + struct brw_compile_params *params, nir_shader *shader, struct brw_vue_prog_data *prog_data) - : vec4_visitor(compiler, NULL, NULL, prog_data, shader, mem_ctx, + : vec4_visitor(compiler, params, NULL, prog_data, shader, false /* no_spills */, false) { prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; @@ -93,11 +94,14 @@ void copy_propagation_vec4_test::SetUp() devinfo = rzalloc(ctx, struct intel_device_info); compiler->devinfo = devinfo; + params = {}; + params.mem_ctx = ctx; + prog_data = ralloc(ctx, struct brw_vue_prog_data); nir_shader *shader = nir_shader_create(ctx, MESA_SHADER_VERTEX, NULL, NULL); - v = new copy_propagation_vec4_visitor(compiler, ctx, shader, prog_data); + v = new copy_propagation_vec4_visitor(compiler, ¶ms, shader, prog_data); devinfo->ver = 4; devinfo->verx10 = devinfo->ver * 10; diff --git a/src/intel/compiler/test_vec4_dead_code_eliminate.cpp b/src/intel/compiler/test_vec4_dead_code_eliminate.cpp index 721f51ec432..f9f2c861d4b 100644 --- a/src/intel/compiler/test_vec4_dead_code_eliminate.cpp +++ b/src/intel/compiler/test_vec4_dead_code_eliminate.cpp @@ -33,6 +33,7 @@ class dead_code_eliminate_vec4_test : public ::testing::Test { public: struct brw_compiler *compiler; + struct brw_compile_params params; struct intel_device_info *devinfo; void *ctx; struct gl_shader_program *shader_prog; @@ -44,10 +45,10 @@ class dead_code_eliminate_vec4_visitor : public vec4_visitor { public: dead_code_eliminate_vec4_visitor(struct brw_compiler *compiler, - void *mem_ctx, + struct brw_compile_params *params, nir_shader *shader, struct brw_vue_prog_data *prog_data) - : vec4_visitor(compiler, NULL, NULL, prog_data, shader, mem_ctx, + : vec4_visitor(compiler, params, NULL, prog_data, shader, false /* no_spills */, false) { prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; @@ -93,11 +94,14 @@ void dead_code_eliminate_vec4_test::SetUp() devinfo = rzalloc(ctx, struct intel_device_info); compiler->devinfo = devinfo; + params = {}; + params.mem_ctx = ctx; + prog_data = ralloc(ctx, struct brw_vue_prog_data); nir_shader *shader = nir_shader_create(ctx, MESA_SHADER_VERTEX, NULL, NULL); - v = new dead_code_eliminate_vec4_visitor(compiler, ctx, shader, prog_data); + v = new dead_code_eliminate_vec4_visitor(compiler, ¶ms, shader, prog_data); devinfo->ver = 4; devinfo->verx10 = devinfo->ver * 10; diff --git a/src/intel/compiler/test_vec4_register_coalesce.cpp b/src/intel/compiler/test_vec4_register_coalesce.cpp index f0ddbeeadab..35cb36ae4aa 100644 --- a/src/intel/compiler/test_vec4_register_coalesce.cpp +++ b/src/intel/compiler/test_vec4_register_coalesce.cpp @@ -35,6 +35,7 @@ class register_coalesce_vec4_test : public ::testing::Test { public: struct brw_compiler *compiler; + struct brw_compile_params params; struct intel_device_info *devinfo; void *ctx; struct gl_shader_program *shader_prog; @@ -47,10 +48,10 @@ class register_coalesce_vec4_visitor : public vec4_visitor { public: register_coalesce_vec4_visitor(struct brw_compiler *compiler, - void *mem_ctx, + struct brw_compile_params *params, nir_shader *shader, struct brw_vue_prog_data *prog_data) - : vec4_visitor(compiler, NULL, NULL, prog_data, shader, mem_ctx, + : vec4_visitor(compiler, params, NULL, prog_data, shader, false /* no_spills */, false) { prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; @@ -98,10 +99,13 @@ void register_coalesce_vec4_test::SetUp() prog_data = ralloc(ctx, struct brw_vue_prog_data); + params = {}; + params.mem_ctx = ctx; + nir_shader *shader = nir_shader_create(ctx, MESA_SHADER_VERTEX, NULL, NULL); - v = new register_coalesce_vec4_visitor(compiler, ctx, shader, prog_data); + v = new register_coalesce_vec4_visitor(compiler, ¶ms, shader, prog_data); devinfo->ver = 4; devinfo->verx10 = devinfo->ver * 10; diff --git a/src/intel/vulkan/anv_internal_kernels.c b/src/intel/vulkan/anv_internal_kernels.c index edb5d710a7d..e7e33db4f65 100644 --- a/src/intel/vulkan/anv_internal_kernels.c +++ b/src/intel/vulkan/anv_internal_kernels.c @@ -259,14 +259,16 @@ compile_upload_spirv(struct anv_device *device, if (stage == MESA_SHADER_FRAGMENT) { struct brw_compile_stats stats[3]; struct brw_compile_fs_params params = { - .nir = nir, + .base = { + .nir = nir, + .log_data = device, + .debug_flag = DEBUG_WM, + .stats = stats, + }, .key = &key.wm, .prog_data = &prog_data.wm, - .stats = stats, - .log_data = device, - .debug_flag = DEBUG_WM, }; - program = brw_compile_fs(compiler, nir, ¶ms); + program = brw_compile_fs(compiler, ¶ms); unsigned stat_idx = 0; if (prog_data.wm.dispatch_8) { @@ -290,14 +292,16 @@ compile_upload_spirv(struct anv_device *device, } else { struct brw_compile_stats stats; struct brw_compile_cs_params params = { - .nir = nir, + .base = { + .nir = nir, + .stats = &stats, + .log_data = device, + .debug_flag = DEBUG_CS, + }, .key = &key.cs, .prog_data = &prog_data.cs, - .stats = &stats, - .log_data = device, - .debug_flag = DEBUG_CS, }; - program = brw_compile_cs(compiler, nir, ¶ms); + program = brw_compile_cs(compiler, ¶ms); assert(stats.spills == 0); assert(stats.fills == 0); diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 2c337994613..0e0f42cd846 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -1124,14 +1124,17 @@ anv_pipeline_compile_vs(const struct brw_compiler *compiler, vs_stage->num_stats = 1; struct brw_compile_vs_params params = { - .nir = vs_stage->nir, + .base = { + .nir = vs_stage->nir, + .stats = vs_stage->stats, + .log_data = pipeline->base.device, + .mem_ctx = mem_ctx, + }, .key = &vs_stage->key.vs, .prog_data = &vs_stage->prog_data.vs, - .stats = vs_stage->stats, - .log_data = pipeline->base.device, }; - vs_stage->code = brw_compile_vs(compiler, mem_ctx, ¶ms); + vs_stage->code = brw_compile_vs(compiler, ¶ms); } static void @@ -1212,14 +1215,17 @@ anv_pipeline_compile_tcs(const struct brw_compiler *compiler, tcs_stage->num_stats = 1; struct brw_compile_tcs_params params = { - .nir = tcs_stage->nir, + .base = { + .nir = tcs_stage->nir, + .stats = tcs_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &tcs_stage->key.tcs, .prog_data = &tcs_stage->prog_data.tcs, - .stats = tcs_stage->stats, - .log_data = device, }; - tcs_stage->code = brw_compile_tcs(compiler, mem_ctx, ¶ms); + tcs_stage->code = brw_compile_tcs(compiler, ¶ms); } static void @@ -1246,15 +1252,18 @@ anv_pipeline_compile_tes(const struct brw_compiler *compiler, tes_stage->num_stats = 1; struct brw_compile_tes_params params = { - .nir = tes_stage->nir, + .base = { + .nir = tes_stage->nir, + .stats = tes_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &tes_stage->key.tes, .prog_data = &tes_stage->prog_data.tes, .input_vue_map = &tcs_stage->prog_data.tcs.base.vue_map, - .stats = tes_stage->stats, - .log_data = device, }; - tes_stage->code = brw_compile_tes(compiler, mem_ctx, ¶ms); + tes_stage->code = brw_compile_tes(compiler, ¶ms); } static void @@ -1281,14 +1290,17 @@ anv_pipeline_compile_gs(const struct brw_compiler *compiler, gs_stage->num_stats = 1; struct brw_compile_gs_params params = { - .nir = gs_stage->nir, + .base = { + .nir = gs_stage->nir, + .stats = gs_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &gs_stage->key.gs, .prog_data = &gs_stage->prog_data.gs, - .stats = gs_stage->stats, - .log_data = device, }; - gs_stage->code = brw_compile_gs(compiler, mem_ctx, ¶ms); + gs_stage->code = brw_compile_gs(compiler, ¶ms); } static void @@ -1310,14 +1322,17 @@ anv_pipeline_compile_task(const struct brw_compiler *compiler, task_stage->num_stats = 1; struct brw_compile_task_params params = { - .nir = task_stage->nir, + .base = { + .nir = task_stage->nir, + .stats = task_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &task_stage->key.task, .prog_data = &task_stage->prog_data.task, - .stats = task_stage->stats, - .log_data = device, }; - task_stage->code = brw_compile_task(compiler, mem_ctx, ¶ms); + task_stage->code = brw_compile_task(compiler, ¶ms); } static void @@ -1340,11 +1355,14 @@ anv_pipeline_compile_mesh(const struct brw_compiler *compiler, mesh_stage->num_stats = 1; struct brw_compile_mesh_params params = { - .nir = mesh_stage->nir, + .base = { + .nir = mesh_stage->nir, + .stats = mesh_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &mesh_stage->key.mesh, .prog_data = &mesh_stage->prog_data.mesh, - .stats = mesh_stage->stats, - .log_data = device, }; if (prev_stage) { @@ -1352,7 +1370,7 @@ anv_pipeline_compile_mesh(const struct brw_compiler *compiler, params.tue_map = &prev_stage->prog_data.task.map; } - mesh_stage->code = brw_compile_mesh(compiler, mem_ctx, ¶ms); + mesh_stage->code = brw_compile_mesh(compiler, ¶ms); } static void @@ -1453,13 +1471,16 @@ anv_pipeline_compile_fs(const struct brw_compiler *compiler, } struct brw_compile_fs_params params = { - .nir = fs_stage->nir, + .base = { + .nir = fs_stage->nir, + .stats = fs_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &fs_stage->key.wm, .prog_data = &fs_stage->prog_data.wm, .allow_spilling = true, - .stats = fs_stage->stats, - .log_data = device, }; if (prev_stage && prev_stage->stage == MESA_SHADER_MESH) { @@ -1467,7 +1488,7 @@ anv_pipeline_compile_fs(const struct brw_compiler *compiler, /* TODO(mesh): Slots valid, do we even use/rely on it? */ } - fs_stage->code = brw_compile_fs(compiler, mem_ctx, ¶ms); + fs_stage->code = brw_compile_fs(compiler, ¶ms); fs_stage->num_stats = (uint32_t)fs_stage->prog_data.wm.dispatch_8 + (uint32_t)fs_stage->prog_data.wm.dispatch_16 + @@ -2530,14 +2551,17 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline, stage.num_stats = 1; struct brw_compile_cs_params params = { - .nir = stage.nir, + .base = { + .nir = stage.nir, + .stats = stage.stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &stage.key.cs, .prog_data = &stage.prog_data.cs, - .stats = stage.stats, - .log_data = device, }; - stage.code = brw_compile_cs(compiler, mem_ctx, ¶ms); + stage.code = brw_compile_cs(compiler, ¶ms); if (stage.code == NULL) { ralloc_free(mem_ctx); return vk_error(pipeline, VK_ERROR_OUT_OF_HOST_MEMORY); @@ -3244,17 +3268,19 @@ compile_upload_rt_shader(struct anv_ray_tracing_pipeline *pipeline, } struct brw_compile_bs_params params = { - .nir = nir, + .base = { + .nir = nir, + .stats = stage->stats, + .log_data = pipeline->base.device, + .mem_ctx = mem_ctx, + }, .key = &stage->key.bs, .prog_data = &stage->prog_data.bs, .num_resume_shaders = num_resume_shaders, .resume_shaders = resume_shaders, - - .stats = stage->stats, - .log_data = pipeline->base.device, }; - stage->code = brw_compile_bs(compiler, mem_ctx, ¶ms); + stage->code = brw_compile_bs(compiler, ¶ms); if (stage->code == NULL) return vk_error(pipeline, VK_ERROR_OUT_OF_HOST_MEMORY); @@ -3736,13 +3762,16 @@ anv_device_init_rt_shaders(struct anv_device *device) .uses_btd_stack_ids = true, }; struct brw_compile_cs_params params = { - .nir = trampoline_nir, + .base = { + .nir = trampoline_nir, + .log_data = device, + .mem_ctx = tmp_ctx, + }, .key = &trampoline_key.key, .prog_data = &trampoline_prog_data, - .log_data = device, }; const unsigned *tramp_data = - brw_compile_cs(device->physical->compiler, tmp_ctx, ¶ms); + brw_compile_cs(device->physical->compiler, ¶ms); device->rt_trampoline = anv_device_upload_kernel(device, device->internal_cache, @@ -3791,14 +3820,16 @@ anv_device_init_rt_shaders(struct anv_device *device) }; struct brw_bs_prog_data return_prog_data = { 0, }; struct brw_compile_bs_params params = { - .nir = trivial_return_nir, + .base = { + .nir = trivial_return_nir, + .log_data = device, + .mem_ctx = tmp_ctx, + }, .key = &return_key.key, .prog_data = &return_prog_data, - - .log_data = device, }; const unsigned *return_data = - brw_compile_bs(device->physical->compiler, tmp_ctx, ¶ms); + brw_compile_bs(device->physical->compiler, ¶ms); device->rt_trivial_return = anv_device_upload_kernel(device, device->internal_cache, diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index 0d79c08ef6e..632721fba36 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -691,14 +691,17 @@ anv_pipeline_compile_vs(const struct brw_compiler *compiler, vs_stage->num_stats = 1; struct brw_compile_vs_params params = { - .nir = vs_stage->nir, + .base = { + .nir = vs_stage->nir, + .stats = vs_stage->stats, + .log_data = pipeline->base.device, + .mem_ctx = mem_ctx, + }, .key = &vs_stage->key.vs, .prog_data = &vs_stage->prog_data.vs, - .stats = vs_stage->stats, - .log_data = pipeline->base.device, }; - vs_stage->code = brw_compile_vs(compiler, mem_ctx, ¶ms); + vs_stage->code = brw_compile_vs(compiler, ¶ms); } static void @@ -783,14 +786,17 @@ anv_pipeline_compile_tcs(const struct brw_compiler *compiler, tcs_stage->num_stats = 1; struct brw_compile_tcs_params params = { - .nir = tcs_stage->nir, + .base = { + .nir = tcs_stage->nir, + .stats = tcs_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &tcs_stage->key.tcs, .prog_data = &tcs_stage->prog_data.tcs, - .stats = tcs_stage->stats, - .log_data = device, }; - tcs_stage->code = brw_compile_tcs(compiler, mem_ctx, ¶ms); + tcs_stage->code = brw_compile_tcs(compiler, ¶ms); } static void @@ -817,15 +823,18 @@ anv_pipeline_compile_tes(const struct brw_compiler *compiler, tes_stage->num_stats = 1; struct brw_compile_tes_params params = { - .nir = tes_stage->nir, + .base = { + .nir = tes_stage->nir, + .stats = tes_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &tes_stage->key.tes, .prog_data = &tes_stage->prog_data.tes, .input_vue_map = &tcs_stage->prog_data.tcs.base.vue_map, - .stats = tes_stage->stats, - .log_data = device, }; - tes_stage->code = brw_compile_tes(compiler, mem_ctx, ¶ms); + tes_stage->code = brw_compile_tes(compiler, ¶ms); } static void @@ -852,14 +861,17 @@ anv_pipeline_compile_gs(const struct brw_compiler *compiler, gs_stage->num_stats = 1; struct brw_compile_gs_params params = { - .nir = gs_stage->nir, + .base = { + .nir = gs_stage->nir, + .stats = gs_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &gs_stage->key.gs, .prog_data = &gs_stage->prog_data.gs, - .stats = gs_stage->stats, - .log_data = device, }; - gs_stage->code = brw_compile_gs(compiler, mem_ctx, ¶ms); + gs_stage->code = brw_compile_gs(compiler, ¶ms); } static void @@ -937,19 +949,22 @@ anv_pipeline_compile_fs(const struct brw_compiler *compiler, assert(prev_stage); struct brw_compile_fs_params params = { - .nir = fs_stage->nir, + .base = { + .nir = fs_stage->nir, + .stats = fs_stage->stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &fs_stage->key.wm, .prog_data = &fs_stage->prog_data.wm, .allow_spilling = true, - .stats = fs_stage->stats, - .log_data = device, }; fs_stage->key.wm.input_slots_valid = prev_stage->prog_data.vue.vue_map.slots_valid; - fs_stage->code = brw_compile_fs(compiler, mem_ctx, ¶ms); + fs_stage->code = brw_compile_fs(compiler, ¶ms); fs_stage->num_stats = (uint32_t)fs_stage->prog_data.wm.dispatch_8 + (uint32_t)fs_stage->prog_data.wm.dispatch_16 + @@ -1573,14 +1588,17 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline, stage.num_stats = 1; struct brw_compile_cs_params params = { - .nir = stage.nir, + .base = { + .nir = stage.nir, + .stats = stage.stats, + .log_data = device, + .mem_ctx = mem_ctx, + }, .key = &stage.key.cs, .prog_data = &stage.prog_data.cs, - .stats = stage.stats, - .log_data = device, }; - stage.code = brw_compile_cs(compiler, mem_ctx, ¶ms); + stage.code = brw_compile_cs(compiler, ¶ms); if (stage.code == NULL) { ralloc_free(mem_ctx); return vk_error(pipeline, VK_ERROR_OUT_OF_HOST_MEMORY);