diff --git a/src/gallium/drivers/r300/compiler/r500_fragprog.c b/src/gallium/drivers/r300/compiler/r500_fragprog.c index 297c290be7d..e0b88e3be60 100644 --- a/src/gallium/drivers/r300/compiler/r500_fragprog.c +++ b/src/gallium/drivers/r300/compiler/r500_fragprog.c @@ -145,7 +145,9 @@ static void r500_transform_IF_instr( break; } if (!preserve_opcode) { - writer->Inst->U.I.Opcode = RC_OPCODE_SUB; + writer->Inst->U.I.Opcode = RC_OPCODE_ADD; + writer->Inst->U.I.SrcReg[1].Negate = + ~writer->Inst->U.I.SrcReg[1].Negate; } writer->Inst->U.I.DstReg.WriteMask = 0; writer->Inst->U.I.DstReg.File = RC_FILE_NONE; diff --git a/src/gallium/drivers/r300/compiler/radeon_opcodes.c b/src/gallium/drivers/r300/compiler/radeon_opcodes.c index 853d7982f0d..6054474c3e5 100644 --- a/src/gallium/drivers/r300/compiler/radeon_opcodes.c +++ b/src/gallium/drivers/r300/compiler/radeon_opcodes.c @@ -261,13 +261,6 @@ const struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = { .HasDstReg = 1, .IsComponentwise = 1 }, - { - .Opcode = RC_OPCODE_SUB, - .Name = "SUB", - .NumSrcRegs = 2, - .HasDstReg = 1, - .IsComponentwise = 1 - }, { .Opcode = RC_OPCODE_TEX, .Name = "TEX", diff --git a/src/gallium/drivers/r300/compiler/radeon_opcodes.h b/src/gallium/drivers/r300/compiler/radeon_opcodes.h index 573ce8db8b9..90b1aef2a73 100644 --- a/src/gallium/drivers/r300/compiler/radeon_opcodes.h +++ b/src/gallium/drivers/r300/compiler/radeon_opcodes.h @@ -140,9 +140,6 @@ typedef enum { /** vec4 instruction: dst.c = (src0.c != src1.c) ? 1.0 : 0.0 */ RC_OPCODE_SNE, - /** vec4 instruction: dst.c = src0.c - src1.c */ - RC_OPCODE_SUB, - RC_OPCODE_TEX, RC_OPCODE_TXB, RC_OPCODE_TXD, diff --git a/src/gallium/drivers/r300/compiler/radeon_program_alu.c b/src/gallium/drivers/r300/compiler/radeon_program_alu.c index 504e24bf06d..bc8b77214a8 100644 --- a/src/gallium/drivers/r300/compiler/radeon_program_alu.c +++ b/src/gallium/drivers/r300/compiler/radeon_program_alu.c @@ -213,13 +213,6 @@ static void transform_RSQ(struct radeon_compiler* c, inst->U.I.SrcReg[0] = absolute(inst->U.I.SrcReg[0]); } -static void transform_SUB(struct radeon_compiler* c, - struct rc_instruction* inst) -{ - inst->U.I.Opcode = RC_OPCODE_ADD; - inst->U.I.SrcReg[1] = negate(inst->U.I.SrcReg[1]); -} - static void transform_KILP(struct radeon_compiler * c, struct rc_instruction * inst) { @@ -231,11 +224,6 @@ static void transform_KILP(struct radeon_compiler * c, * Can be used as a transformation for @ref radeonClauseLocalTransform, * no userData necessary. * - * Eliminates the following ALU instructions: - * SUB - * using: - * ADD - * * Transforms RSQ to Radeon's native RSQ by explicitly setting * absolute value. * @@ -254,7 +242,6 @@ int radeonTransformALU( case RC_OPCODE_SGE: unreachable(); case RC_OPCODE_SLT: unreachable(); case RC_OPCODE_SNE: unreachable(); - case RC_OPCODE_SUB: transform_SUB(c, inst); return 1; default: return 0; } @@ -398,7 +385,6 @@ int r300_transform_vertex_alu( return 1; } return 0; - case RC_OPCODE_SUB: transform_SUB(c, inst); return 1; default: return 0; }