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r600: remove TGSI code path

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Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7780
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7342

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21521>
This commit is contained in:
Gert Wollny 2023-02-24 12:32:56 +01:00 • committed by Marge Bot
parent 608ed04cc1
commit 337dc7d766
5 changed files with 30 additions and 11498 deletions
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32
src/gallium/drivers/r600/r600_pipe.c
View file

@ -244,10 +244,6 @@ fail:
return NULL;
}
static bool is_nir_enabled(struct r600_common_screen *screen) {
return !(screen->debug_flags & DBG_USE_TGSI);
}
/*
* pipe_screen
*/
@ -317,7 +313,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_NIR_ATOMICS_AS_DEREF:
case PIPE_CAP_GL_SPIRV:
return is_nir_enabled(&rscreen->b);
return 1;
case PIPE_CAP_TEXTURE_TRANSFER_MODES:
return PIPE_TEXTURE_TRANSFER_BLIT;
@ -357,12 +353,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
return 4;
case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
if (!is_nir_enabled(&rscreen->b))
return 140;
FALLTHROUGH;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
if (family >= CHIP_CEDAR)
return is_nir_enabled(&rscreen->b) ? 450 : 430;
return 450;
return 330;
/* Supported except the original R600. */
@ -413,18 +406,17 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
rscreen->b.family == CHIP_CYPRESS ||
rscreen->b.family == CHIP_HEMLOCK)
return 1;
if (is_nir_enabled(&rscreen->b) &&
rscreen->b.family >= CHIP_CEDAR)
if (rscreen->b.family >= CHIP_CEDAR)
return 1;
return 0;
case PIPE_CAP_TWO_SIDED_COLOR:
return !is_nir_enabled(&rscreen->b);
return 0;
case PIPE_CAP_INT64_DIVMOD:
/* it is actually not supported, but the nir lowering handles this correctly whereas
* the glsl lowering path seems to not initialize the buildins correctly.
*/
return is_nir_enabled(&rscreen->b);
return 1;
case PIPE_CAP_CULL_DISTANCE:
return 1;
@ -588,9 +580,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen,
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
if (shader == PIPE_SHADER_COMPUTE) {
uint64_t max_const_buffer_size;
enum pipe_shader_ir ir_type = is_nir_enabled(&rscreen->b) ?
PIPE_SHADER_IR_NIR: PIPE_SHADER_IR_TGSI;
pscreen->get_compute_param(pscreen, ir_type,
pscreen->get_compute_param(pscreen, PIPE_SHADER_IR_NIR,
PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
&max_const_buffer_size);
return MIN2(max_const_buffer_size, INT_MAX);
@ -624,17 +614,12 @@ static int r600_get_shader_param(struct pipe_screen* pscreen,
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 16;
case PIPE_SHADER_CAP_PREFERRED_IR:
if (rscreen->b.debug_flags & DBG_USE_TGSI)
return PIPE_SHADER_IR_TGSI;
return PIPE_SHADER_IR_NIR;
case PIPE_SHADER_CAP_SUPPORTED_IRS: {
int ir = 0;
if (shader == PIPE_SHADER_COMPUTE)
ir = 1 << PIPE_SHADER_IR_NATIVE;
ir |= 1 << PIPE_SHADER_IR_TGSI;
if (is_nir_enabled(&rscreen->b)) {
ir |= 1 << PIPE_SHADER_IR_NIR;
}
ir |= 1 << PIPE_SHADER_IR_NIR;
return ir;
}
case PIPE_SHADER_CAP_DROUND_SUPPORTED:
@ -731,8 +716,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws,
return NULL;
}
if (is_nir_enabled(&rscreen->b))
rscreen->b.b.finalize_nir = r600_finalize_nir;
rscreen->b.b.finalize_nir = r600_finalize_nir;
rscreen->b.has_streamout = true;

1
src/gallium/drivers/r600/r600_pipe.h
View file

@ -268,7 +268,6 @@ struct r600_gs_rings_state {
#define DBG_SB_DISASM (1 << 27)
#define DBG_SB_SAFEMATH (1 << 28)
#define DBG_NIR_SB (1 << 28)
#define DBG_USE_TGSI (1 << 29)
struct r600_screen {
struct r600_common_screen b;

45
src/gallium/drivers/r600/r600_pipe_common.c
View file

@ -693,7 +693,6 @@ static const struct debug_named_value common_debug_options[] = {
{ "tes", DBG_TES, "Print tessellation evaluation shaders" },
{ "preoptir", DBG_PREOPT_IR, "Print the LLVM IR before initial optimizations" },
{ "checkir", DBG_CHECK_IR, "Enable additional sanity checks on shader IR" },
{ "use_tgsi", DBG_USE_TGSI, "Take TGSI directly instead of using NIR-to-TGSI"},
{ "testdma", DBG_TEST_DMA, "Invoke SDMA tests and exit." },
{ "testvmfaultcp", DBG_TEST_VMFAULT_CP, "Invoke a CP VM fault test and exit." },
@ -776,13 +775,9 @@ static void r600_disk_cache_create(struct r600_common_screen *rscreen)
mesa_bytes_to_hex(cache_id, sha1, 20);
/* These flags affect shader compilation. */
uint64_t shader_debug_flags =
rscreen->debug_flags & DBG_USE_TGSI;
rscreen->disk_shader_cache =
disk_cache_create(r600_get_family_name(rscreen),
cache_id,
shader_debug_flags);
cache_id, 0);
}
static struct disk_cache *r600_get_disk_shader_cache(struct pipe_screen *pscreen)
@ -1385,17 +1380,17 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
if (rscreen->info.family < CHIP_CEDAR)
rscreen->nir_options.force_indirect_unrolling_sampler = true;
if (rscreen->info.gfx_level >= EVERGREEN) {
rscreen->nir_options.lower_bitfield_extract = true;
if (rscreen->info.gfx_level >= EVERGREEN) {
rscreen->nir_options.lower_bitfield_extract = true;
rscreen->nir_options.lower_bitfield_insert_to_bitfield_select = true;
}
}
if (rscreen->info.gfx_level < EVERGREEN) {
/* Pre-EG doesn't have these ALU ops */
rscreen->nir_options.lower_bit_count = true;
rscreen->nir_options.lower_bitfield_reverse = true;
rscreen->nir_options.lower_bitfield_insert_to_shifts = true;
rscreen->nir_options.lower_bitfield_extract_to_shifts = true;
rscreen->nir_options.lower_bitfield_insert_to_shifts = true;
rscreen->nir_options.lower_bitfield_extract_to_shifts = true;
}
if (rscreen->info.gfx_level < CAYMAN) {
@ -1411,33 +1406,7 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
nir_lower_dtrunc;
}
if (rscreen->debug_flags & DBG_USE_TGSI) {
rscreen->nir_options.lower_fpow = false;
/* TGSI is vector, and NIR-to-TGSI doesn't like it when the
* input vars have been scalarized.
*/
rscreen->nir_options.lower_to_scalar = false;
/* NIR-to-TGSI can't do fused integer csel, and it can't just
* override the flag and get the code lowered back when we ask
* it to handle it.
*/
rscreen->nir_options.has_fused_comp_and_csel = false;
/* r600 has a bitfield_select and bitfield_extract opcode
* (called bfi/bfe), but TGSI's BFI/BFE isn't that.
*/
rscreen->nir_options.lower_bitfield_extract = false;
rscreen->nir_options.lower_bitfield_insert_to_bitfield_select = false;
/* TGSI's ifind is reversed from ours, keep it the TGSI way. */
rscreen->nir_options.lower_find_msb_to_reverse = false;
} else {
rscreen->nir_options.has_fmulz = true;
}
rscreen->nir_options_fs = rscreen->nir_options;
rscreen->nir_options_fs = rscreen->nir_options;
rscreen->nir_options_fs.lower_all_io_to_temps = true;
return true;

11435
src/gallium/drivers/r600/r600_shader.c
View file

File diff suppressed because it is too large Load diff

15
src/gallium/drivers/r600/r600_state_common.c
View file

@ -39,9 +39,7 @@
#include "tgsi/tgsi_ureg.h"
#include "nir.h"
#include "nir/nir_to_tgsi.h"
#include "nir/nir_to_tgsi_info.h"
#include "tgsi/tgsi_from_mesa.h"
void r600_init_command_buffer(struct r600_command_buffer *cb, unsigned num_dw)
{
@ -991,23 +989,14 @@ struct r600_pipe_shader_selector *r600_create_shader_state_tokens(struct pipe_co
unsigned pipe_shader_type)
{
struct r600_pipe_shader_selector *sel = CALLOC_STRUCT(r600_pipe_shader_selector);
struct r600_screen *rscreen = (struct r600_screen *)ctx->screen;
sel->type = pipe_shader_type;
if (ir == PIPE_SHADER_IR_TGSI) {
sel->tokens = tgsi_dup_tokens((const struct tgsi_token *)prog);
tgsi_scan_shader(sel->tokens, &sel->info);
} else if (ir == PIPE_SHADER_IR_NIR){
nir_shader *s = (nir_shader *)prog;
if (rscreen->b.debug_flags & DBG_USE_TGSI) {
sel->tokens = (void *)nir_to_tgsi(s, ctx->screen);
ir = PIPE_SHADER_IR_TGSI;
tgsi_scan_shader(sel->tokens, &sel->info);
} else {
sel->nir = s;
nir_tgsi_scan_shader(sel->nir, &sel->info, true);
}
sel->nir = (nir_shader *)prog;
nir_tgsi_scan_shader(sel->nir, &sel->info, true);
}
sel->ir_type = ir;
return sel;