Partially revert "amd/addrlib: silence warnings" to fix builds with DEBUG

This partially reverts commit 8a74140a21.
This commit is contained in:
Marek Olšák 2017-03-30 19:01:02 +02:00
parent 681adbc18c
commit 331714d72e
3 changed files with 6 additions and 6 deletions

View file

@ -832,7 +832,7 @@ BOOL_32 ADDR_API ElemGetExportNorm(
Addr::Lib* pLib = Lib::GetLib(hLib);
BOOL_32 enabled = FALSE;
//ADDR_E_RETURNCODE returnCode = ADDR_OK;
ADDR_E_RETURNCODE returnCode = ADDR_OK;
if (pLib != NULL)
{
@ -840,7 +840,7 @@ BOOL_32 ADDR_API ElemGetExportNorm(
}
else
{
//returnCode = ADDR_ERROR;
returnCode = ADDR_ERROR;
}
ADDR_ASSERT(returnCode == ADDR_OK);

View file

@ -2159,7 +2159,7 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeBlock256Equation(
// Post validation
if (ret == ADDR_OK)
{
//Dim2d microBlockDim = Block256b[elementBytesLog2];
Dim2d microBlockDim = Block256b[elementBytesLog2];
ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 0)) ==
(microBlockDim.w * (1 << elementBytesLog2)));
ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 1)) == microBlockDim.h);

View file

@ -978,7 +978,7 @@ BOOL_32 EgBasedLib::SanityCheckMacroTiled(
) const
{
BOOL_32 valid = TRUE;
//UINT_32 numPipes = HwlGetPipes(pTileInfo);
UINT_32 numPipes = HwlGetPipes(pTileInfo);
switch (pTileInfo->banks)
{
@ -4748,7 +4748,7 @@ UINT_64 EgBasedLib::HwlGetSizeAdjustmentMicroTiled(
) const
{
UINT_64 logicalSliceSize;
//UINT_64 physicalSliceSize;
UINT_64 physicalSliceSize;
UINT_32 pitch = *pPitch;
UINT_32 height = *pHeight;
@ -4757,7 +4757,7 @@ UINT_64 EgBasedLib::HwlGetSizeAdjustmentMicroTiled(
logicalSliceSize = BITS_TO_BYTES(static_cast<UINT_64>(pitch) * height * bpp * numSamples);
// Physical slice: multiplied by thickness
//physicalSliceSize = logicalSliceSize * thickness;
physicalSliceSize = logicalSliceSize * thickness;
//
// R800 will always pad physical slice size to baseAlign which is pipe_interleave_bytes