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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-04-24 18:00:48 +02:00
freedreno/a6xx: fix hangs with newer sqe fw
With the newer (v1.76) fw, we were getting hangs (compared to older
v1.66 fw). Re-work the GMEM code to structure things a bit closer to
the blob. This moves some PKT7 packets from IB2 to IB1, which I think
is what was confusing SQE and causing it to get stuck in an infinite
loop. But in general structuring things at least closer to the same way
blob does makes it easier to compare cmdstream.
Note: this is a bit on the large side for what I'd normally consider for
stable.. but right now it is looking like it is the newer fw that is
headed for linux-firmware. This should defn have some soak time on
master, but probably a good idea for this patch to end up in distro mesa
builds by the time a630_sqe.fw hits linux-firmware.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
(cherry picked from commit 958f6ffb60)
This commit is contained in:
Rob Clark
Juan A. Suarez Romero
parent
9f71165a1b
commit
3301eeee51
1 changed files with 81 additions and 32 deletions
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@ -214,6 +214,12 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf,
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OUT_RING(ring, 0x00000000);
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}
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/* NOTE: blob emits GRAS_LRZ_CNTL plus GRAZ_LRZ_BUFFER_BASE
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* plus this CP_EVENT_WRITE at the end in it's own IB..
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*/
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OUT_PKT7(ring, CP_EVENT_WRITE, 1);
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OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(UNK_25));
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if (rsc->stencil) {
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struct fd_resource_slice *slice = fd_resource_slice(rsc->stencil, 0);
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stride = slice->pitch * rsc->stencil->cpp;
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@ -402,7 +408,6 @@ set_bin_size(struct fd_ringbuffer *ring, uint32_t w, uint32_t h, uint32_t flag)
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static void
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emit_binning_pass(struct fd_batch *batch)
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{
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struct fd_context *ctx = batch->ctx;
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struct fd_ringbuffer *ring = batch->gmem;
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struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
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@ -463,12 +468,22 @@ emit_binning_pass(struct fd_batch *batch)
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OUT_PKT7(ring, CP_EVENT_WRITE, 1);
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OUT_RING(ring, UNK_2D);
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OUT_PKT7(ring, CP_EVENT_WRITE, 4);
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OUT_RING(ring, CACHE_FLUSH_TS);
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OUT_RELOCW(ring, fd6_context(ctx)->blit_mem, 0, 0, 0); /* ADDR_LO/HI */
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OUT_RING(ring, 0x00000000);
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fd6_cache_inv(batch, ring);
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fd6_cache_flush(batch, ring);
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fd_wfi(batch, ring);
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OUT_PKT7(ring, CP_WAIT_FOR_ME, 0);
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OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1);
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OUT_RING(ring, 0x0);
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OUT_PKT7(ring, CP_SET_MODE, 1);
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OUT_RING(ring, 0x0);
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OUT_WFI5(ring);
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OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
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OUT_RING(ring, 0x7c400004); /* RB_CCU_CNTL */
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}
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static void
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@ -544,6 +559,15 @@ fd6_emit_tile_init(struct fd_batch *batch)
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OUT_PKT4(ring, REG_A6XX_VFD_MODE_CNTL, 1);
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OUT_RING(ring, 0x0);
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OUT_PKT4(ring, REG_A6XX_PC_UNKNOWN_9805, 1);
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OUT_RING(ring, 0x1);
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OUT_PKT4(ring, REG_A6XX_SP_UNKNOWN_A0F8, 1);
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OUT_RING(ring, 0x1);
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OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
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OUT_RING(ring, 0x1);
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} else {
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set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000);
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patch_draws(batch, IGNORE_VISIBILITY);
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@ -580,9 +604,6 @@ fd6_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
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struct fd6_context *fd6_ctx = fd6_context(ctx);
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struct fd_ringbuffer *ring = batch->gmem;
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OUT_PKT7(ring, CP_SET_MARKER, 1);
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OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(0x7));
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emit_marker6(ring, 7);
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OUT_PKT7(ring, CP_SET_MARKER, 1);
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OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_GMEM) | 0x10);
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@ -595,8 +616,6 @@ fd6_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
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set_scissor(ring, x1, y1, x2, y2);
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set_window_offset(ring, x1, y1);
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OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
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OUT_RING(ring, A6XX_VPC_SO_OVERRIDE_SO_DISABLE);
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@ -620,7 +639,32 @@ fd6_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
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(tile->p * 4) + (32 * A6XX_VSC_DATA_PITCH), 0, 0);
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OUT_RELOC(ring, fd6_ctx->vsc_data2,
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(tile->p * A6XX_VSC_DATA2_PITCH), 0, 0);
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set_window_offset(ring, x1, y1);
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struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
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set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000);
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OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
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OUT_RING(ring, A6XX_VPC_SO_OVERRIDE_SO_DISABLE);
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OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1);
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OUT_RING(ring, 0x0);
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OUT_PKT7(ring, CP_SET_MODE, 1);
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OUT_RING(ring, 0x0);
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OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8804, 1);
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OUT_RING(ring, 0x0);
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OUT_PKT4(ring, REG_A6XX_SP_TP_UNKNOWN_B304, 1);
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OUT_RING(ring, 0x0);
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OUT_PKT4(ring, REG_A6XX_GRAS_UNKNOWN_80A4, 1);
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OUT_RING(ring, 0x0);
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} else {
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set_window_offset(ring, x1, y1);
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OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1);
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OUT_RING(ring, 0x1);
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@ -1028,26 +1072,6 @@ prepare_tile_fini_ib(struct fd_batch *batch)
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FD_RINGBUFFER_STREAMING);
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ring = batch->tile_fini;
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if (use_hw_binning(batch)) {
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OUT_PKT7(ring, CP_SET_MARKER, 1);
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OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(0x5) | 0x10);
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}
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OUT_PKT7(ring, CP_SET_DRAW_STATE, 3);
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OUT_RING(ring, CP_SET_DRAW_STATE__0_COUNT(0) |
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CP_SET_DRAW_STATE__0_DISABLE_ALL_GROUPS |
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CP_SET_DRAW_STATE__0_GROUP_ID(0));
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OUT_RING(ring, CP_SET_DRAW_STATE__1_ADDR_LO(0));
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OUT_RING(ring, CP_SET_DRAW_STATE__2_ADDR_HI(0));
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OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
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OUT_RING(ring, 0x0);
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emit_marker6(ring, 7);
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OUT_PKT7(ring, CP_SET_MARKER, 1);
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OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_RESOLVE) | 0x10);
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emit_marker6(ring, 7);
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set_blit_scissor(batch, ring);
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if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) {
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@ -1081,7 +1105,32 @@ prepare_tile_fini_ib(struct fd_batch *batch)
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static void
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fd6_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile)
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{
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fd6_emit_ib(batch->gmem, batch->tile_fini);
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struct fd_ringbuffer *ring = batch->gmem;
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if (use_hw_binning(batch)) {
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OUT_PKT7(ring, CP_SET_MARKER, 1);
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OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(0x5) | 0x10);
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}
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OUT_PKT7(ring, CP_SET_DRAW_STATE, 3);
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OUT_RING(ring, CP_SET_DRAW_STATE__0_COUNT(0) |
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CP_SET_DRAW_STATE__0_DISABLE_ALL_GROUPS |
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CP_SET_DRAW_STATE__0_GROUP_ID(0));
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OUT_RING(ring, CP_SET_DRAW_STATE__1_ADDR_LO(0));
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OUT_RING(ring, CP_SET_DRAW_STATE__2_ADDR_HI(0));
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OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_LOCAL, 1);
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OUT_RING(ring, 0x0);
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emit_marker6(ring, 7);
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OUT_PKT7(ring, CP_SET_MARKER, 1);
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OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_RESOLVE) | 0x10);
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emit_marker6(ring, 7);
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fd6_emit_ib(ring, batch->tile_fini);
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OUT_PKT7(ring, CP_SET_MARKER, 1);
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OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(0x7));
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}
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static void
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