diff --git a/src/intel/compiler/brw_compile_fs.cpp b/src/intel/compiler/brw_compile_fs.cpp index 8e4c843335f..366f7ca8576 100644 --- a/src/intel/compiler/brw_compile_fs.cpp +++ b/src/intel/compiler/brw_compile_fs.cpp @@ -33,6 +33,7 @@ brw_emit_single_fb_write(fs_visitor &s, const brw_builder &bld, sources[FB_WRITE_LOGICAL_SRC_SRC0_ALPHA] = src0_alpha; sources[FB_WRITE_LOGICAL_SRC_COMPONENTS] = brw_imm_ud(components); sources[FB_WRITE_LOGICAL_SRC_NULL_RT] = brw_imm_ud(null_rt); + sources[FB_WRITE_LOGICAL_SRC_LAST_RT] = brw_imm_ud(false); if (prog_data->uses_omask) sources[FB_WRITE_LOGICAL_SRC_OMASK] = s.sample_mask; @@ -105,7 +106,7 @@ brw_do_emit_fb_writes(fs_visitor &s, int nr_color_regions, bool replicate_alpha) inst->target = 0; } - inst->last_rt = true; + inst->src[FB_WRITE_LOGICAL_SRC_LAST_RT] = brw_imm_ud(true); inst->eot = true; } @@ -655,7 +656,6 @@ brw_emit_repclear_shader(fs_visitor &s) write->mlen = 1 + write->header_size; } write->eot = true; - write->last_rt = true; brw_calculate_cfg(s); diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index 2b338e073ab..f32c5d85267 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -568,6 +568,7 @@ enum fb_write_logical_srcs { FB_WRITE_LOGICAL_SRC_OMASK, /* Sample Mask (gl_SampleMask) */ FB_WRITE_LOGICAL_SRC_COMPONENTS, /* REQUIRED */ FB_WRITE_LOGICAL_SRC_NULL_RT, /* Null RT write */ + FB_WRITE_LOGICAL_SRC_LAST_RT, /* Last RT? (bool as UD immediate) */ FB_WRITE_LOGICAL_NUM_SRCS }; diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h index 651f6022c8e..ff6de429704 100644 --- a/src/intel/compiler/brw_inst.h +++ b/src/intel/compiler/brw_inst.h @@ -192,7 +192,7 @@ public: */ unsigned rcount:4; - unsigned pad:4; + unsigned pad:5; bool predicate_inverse:1; bool writes_accumulator:1; /**< instruction implicitly writes accumulator */ @@ -214,7 +214,6 @@ public: */ bool predicate_trivial:1; bool eot:1; - bool last_rt:1; bool keep_payload_trailing_zeros:1; /** * Whether the parameters of the SEND instructions are build with diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp index 759f47fd6e0..c1afbdabc00 100644 --- a/src/intel/compiler/brw_lower_logical_sends.cpp +++ b/src/intel/compiler/brw_lower_logical_sends.cpp @@ -287,6 +287,7 @@ lower_fb_write_logical_send(const brw_builder &bld, brw_inst *inst, { assert(inst->src[FB_WRITE_LOGICAL_SRC_COMPONENTS].file == IMM); assert(inst->src[FB_WRITE_LOGICAL_SRC_NULL_RT].file == IMM); + assert(inst->src[FB_WRITE_LOGICAL_SRC_LAST_RT].file == IMM); const intel_device_info *devinfo = bld.shader->devinfo; const brw_reg color0 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR0]; const brw_reg color1 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR1]; @@ -297,6 +298,7 @@ lower_fb_write_logical_send(const brw_builder &bld, brw_inst *inst, const unsigned components = inst->src[FB_WRITE_LOGICAL_SRC_COMPONENTS].ud; const bool null_rt = inst->src[FB_WRITE_LOGICAL_SRC_NULL_RT].ud != 0; + const bool last_rt = inst->src[FB_WRITE_LOGICAL_SRC_LAST_RT].ud != 0; assert(inst->target != 0 || src0_alpha.file == BAD_FILE); @@ -451,7 +453,7 @@ lower_fb_write_logical_send(const brw_builder &bld, brw_inst *inst, /* XXX - Bit 13 Per-sample PS enable */ inst->desc = (inst->group / 16) << 11 | /* rt slot group */ - brw_fb_write_desc(devinfo, inst->target, msg_ctl, inst->last_rt, + brw_fb_write_desc(devinfo, inst->target, msg_ctl, last_rt, 0 /* coarse_rt_write */); brw_reg desc = brw_imm_ud(0);