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freedreno/registers: Mark LOAD_IMMED as a5xx

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This is replaced by CP_SET_LOAD_IMMEDIATE on later gens.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39029>
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Rob Clark 2025-12-17 09:31:38 -08:00 • committed by Marge Bot
parent af38b71e5b
commit 32be52a457
1 changed files with 1 additions and 1 deletions
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src/freedreno/registers/adreno/adreno_pm4.xml
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@ -1095,7 +1095,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
<bitfield name="DIRTY" pos="16" type="boolean"/>
<bitfield name="DISABLE" pos="17" type="boolean"/>
<bitfield name="DISABLE_ALL_GROUPS" pos="18" type="boolean"/>
<bitfield name="LOAD_IMMED" pos="19" type="boolean"/>
<bitfield name="LOAD_IMMED" pos="19" type="boolean" variants="A5XX"/>
<bitfield name="BINNING" pos="20" varset="chip" variants="A6XX-" type="boolean"/>
<bitfield name="GMEM" pos="21" varset="chip" variants="A6XX-" type="boolean"/>
<bitfield name="SYSMEM" pos="22" varset="chip" variants="A6XX-" type="boolean"/>