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i965/fs: Update an ancient, wrong comment about reg_offset.

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This hasn't been true since SIMD16 mode was added.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
This commit is contained in:
Eric Anholt 2013-10-29 01:06:09 -07:00
parent bbb77fc2f1
commit 32ac5634d6
1 changed files with 5 additions and 3 deletions
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8
src/mesa/drivers/dri/i965/brw_fs.h
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@ -88,9 +88,11 @@ public:
*/
int reg;
/**
* For virtual registers, this is a hardware register offset from
* the start of the register block (for example, a constant index
* in an array access).
* Offset from the start of the contiguous register block.
*
* For pre-register-allocation GRFs, this is in units of a float per pixel
* (1 hardware register for SIMD8 mode, or 2 registers for SIMD16 mode).
* For uniforms, this is in units of 1 float.
*/
int reg_offset;
/** Register type. BRW_REGISTER_TYPE_* */