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i965: get the jmp distance by instruction index

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If dynamic instruction store size is enabled, while after the brw_JMPI()
and before the brw_land_fwd_jump() function, the eu instruction store
base address(p->store) may change. Thus, the safe way to reference the
jmp instruction is by index instead of by the instruction address.

v2: comments from Eric, don't change the prototype of brw_JMPI

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Yuanhan Liu 2011-12-21 15:10:40 +08:00
parent 0a17093eaf
commit 328e6a5497
4 changed files with 10 additions and 12 deletions
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3
src/mesa/drivers/dri/i965/brw_eu.h
View file

@ -1039,8 +1039,7 @@ struct brw_instruction *brw_CONT(struct brw_compile *p);
struct brw_instruction *gen6_CONT(struct brw_compile *p);
/* Forward jumps:
*/
void brw_land_fwd_jump(struct brw_compile *p,
struct brw_instruction *jmp_insn);
void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx);

7
src/mesa/drivers/dri/i965/brw_eu_emit.c
View file

@ -1451,11 +1451,10 @@ struct brw_instruction *brw_WHILE(struct brw_compile *p)
/* FORWARD JUMPS:
*/
void brw_land_fwd_jump(struct brw_compile *p,
struct brw_instruction *jmp_insn)
void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx)
{
struct intel_context *intel = &p->brw->intel;
struct brw_instruction *landing = &p->store[p->nr_insn];
struct brw_instruction *jmp_insn = &p->store[jmp_insn_idx];
GLuint jmpi = 1;
if (intel->gen >= 5)
@ -1464,7 +1463,7 @@ void brw_land_fwd_jump(struct brw_compile *p,
assert(jmp_insn->header.opcode == BRW_OPCODE_JMPI);
assert(jmp_insn->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE);
jmp_insn->bits3.ud = jmpi * ((landing - jmp_insn) - 1);
jmp_insn->bits3.ud = jmpi * (p->nr_insn - jmp_insn_idx - 1);
}

8
src/mesa/drivers/dri/i965/brw_sf_emit.c
View file

@ -717,7 +717,7 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
struct brw_reg payload_prim = brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0);
struct brw_reg payload_attr = get_element_ud(brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0), 0);
struct brw_reg primmask;
struct brw_instruction *jmp;
int jmp;
struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
GLuint saveflag;
@ -738,7 +738,7 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
(1<<_3DPRIM_POLYGON) |
(1<<_3DPRIM_RECTLIST) |
(1<<_3DPRIM_TRIFAN_NOSTIPPLE)));
jmp = brw_JMPI(p, ip, ip, brw_imm_d(0));
jmp = brw_JMPI(p, ip, ip, brw_imm_d(0)) - p->store;
{
saveflag = p->flag_value;
brw_push_insn_state(p);
@ -759,7 +759,7 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
(1<<_3DPRIM_LINESTRIP_CONT) |
(1<<_3DPRIM_LINESTRIP_BF) |
(1<<_3DPRIM_LINESTRIP_CONT_BF)));
jmp = brw_JMPI(p, ip, ip, brw_imm_d(0));
jmp = brw_JMPI(p, ip, ip, brw_imm_d(0)) - p->store;
{
saveflag = p->flag_value;
brw_push_insn_state(p);
@ -772,7 +772,7 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
brw_set_conditionalmod(p, BRW_CONDITIONAL_Z);
brw_AND(p, v1_null_ud, payload_attr, brw_imm_ud(1<<BRW_SPRITE_POINT_ENABLE));
jmp = brw_JMPI(p, ip, ip, brw_imm_d(0));
jmp = brw_JMPI(p, ip, ip, brw_imm_d(0)) - p->store;
{
saveflag = p->flag_value;
brw_push_insn_state(p);

4
src/mesa/drivers/dri/i965/brw_wm_emit.c
View file

@ -1528,7 +1528,7 @@ void emit_fb_write(struct brw_wm_compile *c,
else {
struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
struct brw_reg ip = brw_ip_reg();
struct brw_instruction *jmp;
int jmp;
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_set_conditionalmod(p, BRW_CONDITIONAL_Z);
@ -1537,7 +1537,7 @@ void emit_fb_write(struct brw_wm_compile *c,
get_element_ud(brw_vec8_grf(1,0), 6),
brw_imm_ud(1<<26));
jmp = brw_JMPI(p, ip, ip, brw_imm_w(0));
jmp = brw_JMPI(p, ip, ip, brw_imm_w(0)) - p->store;
{
emit_aa(c, arg1, 2);
fire_fb_write(c, 0, nr, target, eot);