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drm-uapi: Import the new NVIDIA modifiers

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Imported from kernel commit eef295a850820 of drm-misc-fixes

Backport-to: 25.2
Reviewed-by: James Jones <jajones@nvidia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36336>
This commit is contained in:
Faith Ekstrand 2025-07-23 16:38:16 -04:00 • committed by Marge Bot
parent 14194e59a4
commit 3247452b2c
1 changed files with 16 additions and 9 deletions
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25
include/drm-uapi/drm_fourcc.h
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@ -979,14 +979,20 @@ extern "C" {
* 2 = Gob Height 8, Turing+ Page Kind mapping * 2 = Gob Height 8, Turing+ Page Kind mapping
* 3 = Reserved for future use. * 3 = Reserved for future use.
* *
* 22:22 s Sector layout. On Tegra GPUs prior to Xavier, there is a further * 22:22 s Sector layout. There is a further bit remapping step that occurs
* bit remapping step that occurs at an even lower level than the * 26:27 at an even lower level than the page kind and block linear
* page kind and block linear swizzles. This causes the layout of * swizzles. This causes the bit arrangement of surfaces in memory
* surfaces mapped in those SOC's GPUs to be incompatible with the * to differ subtly, and prevents direct sharing of surfaces between
* equivalent mapping on other GPUs in the same system. * GPUs with different layouts.
* *
* 0 = Tegra K1 - Tegra Parker/TX2 Layout. * 0 = Tegra K1 - Tegra Parker/TX2 Layout
* 1 = Desktop GPU and Tegra Xavier+ Layout * 1 = Pre-GB20x, GB20x 32+ bpp, GB10, Tegra Xavier-Orin Layout
* 2 = GB20x(Blackwell 2)+ 8 bpp surface layout
* 3 = GB20x(Blackwell 2)+ 16 bpp surface layout
* 4 = Reserved for future use.
* 5 = Reserved for future use.
* 6 = Reserved for future use.
* 7 = Reserved for future use.
* *
* 25:23 c Lossless Framebuffer Compression type. * 25:23 c Lossless Framebuffer Compression type.
* *
@ -1001,7 +1007,7 @@ extern "C" {
* 6 = Reserved for future use * 6 = Reserved for future use
* 7 = Reserved for future use * 7 = Reserved for future use
* *
* 55:25 - Reserved for future use. Must be zero. * 55:28 - Reserved for future use. Must be zero.
*/ */
#define DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D(c, s, g, k, h) \ #define DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D(c, s, g, k, h) \
fourcc_mod_code(NVIDIA, (0x10 | \ fourcc_mod_code(NVIDIA, (0x10 | \
@ -1009,6 +1015,7 @@ extern "C" {
(((k) & 0xff) << 12) | \ (((k) & 0xff) << 12) | \
(((g) & 0x3) << 20) | \ (((g) & 0x3) << 20) | \
(((s) & 0x1) << 22) | \ (((s) & 0x1) << 22) | \
(((s) & 0x6) << 25) | \
(((c) & 0x7) << 23))) (((c) & 0x7) << 23)))
/* To grandfather in prior block linear format modifiers to the above layout, /* To grandfather in prior block linear format modifiers to the above layout,
@ -1017,7 +1024,7 @@ extern "C" {
* which corresponds to the "generic" kind used for simple single-sample * which corresponds to the "generic" kind used for simple single-sample
* uncompressed color formats on Fermi - Volta GPUs. * uncompressed color formats on Fermi - Volta GPUs.
*/ */
static __inline__ __u64 static inline __u64
drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
{ {
if (!(modifier & 0x10) || (modifier & (0xff << 12))) if (!(modifier & 0x10) || (modifier & (0xff << 12)))