radv: run the pass to fixup SMEM loads with NULL PRT pages

Right after global access are lowered.

fossils-db (NAVI21):
Totals from 37734 (33.68% of 112041) affected shaders:
MaxWaves: 898021 -> 897961 (-0.01%); split: +0.00%, -0.01%
Instrs: 34145252 -> 34267942 (+0.36%); split: -0.00%, +0.36%
CodeSize: 182360344 -> 182943952 (+0.32%); split: -0.00%, +0.32%
VGPRs: 1796672 -> 1796816 (+0.01%); split: -0.00%, +0.01%
SpillSGPRs: 13708 -> 13964 (+1.87%); split: -0.28%, +2.15%
Latency: 442451029 -> 442827188 (+0.09%); split: -0.02%, +0.10%
InvThroughput: 105259490 -> 105287803 (+0.03%); split: -0.01%, +0.03%
VClause: 672269 -> 672252 (-0.00%); split: -0.12%, +0.12%
SClause: 847133 -> 847677 (+0.06%); split: -0.35%, +0.41%
Copies: 2974422 -> 2979443 (+0.17%); split: -0.35%, +0.52%
Branches: 860896 -> 861639 (+0.09%); split: -0.00%, +0.09%
PreSGPRs: 1677701 -> 1682387 (+0.28%); split: -0.01%, +0.29%
VALU: 22386780 -> 22386984 (+0.00%); split: -0.01%, +0.01%
SALU: 5282218 -> 5406460 (+2.35%); split: -0.01%, +2.36%

fossils-db (POLARIS10):
Totals from 15054 (21.74% of 69255) affected shaders:
MaxWaves: 87688 -> 87689 (+0.00%); split: +0.01%, -0.00%
Instrs: 12542117 -> 12596734 (+0.44%); split: -0.00%, +0.44%
CodeSize: 65209280 -> 65458732 (+0.38%); split: -0.00%, +0.39%
SGPRs: 1149639 -> 1149975 (+0.03%); split: -0.24%, +0.27%
VGPRs: 749928 -> 749956 (+0.00%); split: -0.02%, +0.02%
SpillSGPRs: 11139 -> 11413 (+2.46%); split: -0.29%, +2.75%
Latency: 169204114 -> 169533989 (+0.19%); split: -0.01%, +0.21%
InvThroughput: 88091947 -> 88185872 (+0.11%); split: -0.01%, +0.11%
VClause: 280519 -> 280318 (-0.07%); split: -0.18%, +0.10%
SClause: 343474 -> 344686 (+0.35%); split: -0.32%, +0.67%
Copies: 1529440 -> 1530545 (+0.07%); split: -0.30%, +0.38%
Branches: 286849 -> 286856 (+0.00%); split: -0.01%, +0.01%
PreSGPRs: 661815 -> 663239 (+0.22%); split: -0.02%, +0.23%
VALU: 8758472 -> 8759214 (+0.01%); split: -0.01%, +0.01%
SALU: 1775129 -> 1829513 (+3.06%); split: -0.02%, +3.08%

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38698>
This commit is contained in:
Samuel Pitoiset 2026-04-21 14:10:09 +02:00 committed by Marge Bot
parent a4668733e5
commit 3237666fc4
3 changed files with 11 additions and 2 deletions

View file

@ -865,7 +865,7 @@ static void
radv_device_init_cache_key(struct radv_device *device)
{
STATIC_ASSERT(sizeof(device->compiler_info.hw) == 12);
STATIC_ASSERT(sizeof(device->compiler_info.key) == 12);
STATIC_ASSERT(sizeof(device->compiler_info.key) == 16);
uint32_t ptr_size = sizeof(void *);
@ -1149,6 +1149,7 @@ radv_device_init_compiler_info(struct radv_device *device)
{
.family = pdev->info.family,
.address32_hi = pdev->info.address32_hi,
.address_prt_wa_control_bit = pdev->info.address_prt_wa_control_bit,
.rbplus_allowed = pdev->info.rbplus_allowed,
},
/* Misc values included as part of the cache key */
@ -1170,6 +1171,8 @@ radv_device_init_compiler_info(struct radv_device *device)
device->vk.enabled_features.robustBufferAccess),
.mitigate_smem_oob = pdev->info.compiler_info.has_smem_oob_access_bug &&
!(instance->debug_flags & RADV_DEBUG_NO_SMEM_MITIGATION),
.mitigate_smem_with_null_prt =
pdev->info.compiler_info.has_smem_with_null_prt_bug && radv_sparse_enabled(pdev),
.bvh8 = radv_use_bvh8(pdev),
.no_rt = !!(instance->debug_flags & RADV_DEBUG_NO_RT),
.rt_cps = !!(instance->perftest_flags & RADV_PERFTEST_RT_CPS),

View file

@ -526,6 +526,9 @@ radv_postprocess_nir(const struct radv_compiler_info *compiler_info, const struc
NIR_PASS(_, stage->nir, ac_nir_lower_global_access);
NIR_PASS(_, stage->nir, nir_lower_int64);
if (compiler_info->key.mitigate_smem_with_null_prt)
NIR_PASS(_, stage->nir, ac_nir_fixup_smem_loads_null_prt, compiler_info->hw.address_prt_wa_control_bit);
if (compiler_info->key.mitigate_smem_oob)
NIR_PASS(_, stage->nir, ac_nir_fixup_mem_access_gfx6, &stage->args.ac, 4096, true, true);

View file

@ -518,7 +518,8 @@ struct radv_compiler_info {
uint32_t family;
uint32_t address32_hi;
uint32_t rbplus_allowed : 1;
uint32_t padding : 31;
uint32_t address_prt_wa_control_bit : 8;
uint32_t padding : 23;
} hw;
/* Misc values included as part of the cache key */
@ -537,6 +538,7 @@ struct radv_compiler_info {
uint32_t use_fmask : 1;
uint32_t robust_buffer_access : 1; /* Only used by LLVM. */
uint32_t mitigate_smem_oob : 1;
uint32_t mitigate_smem_with_null_prt : 1;
uint32_t bvh8 : 1;
uint32_t no_rt : 1;
uint32_t rt_cps : 1;
@ -553,6 +555,7 @@ struct radv_compiler_info {
uint32_t tex_non_uniform : 1;
uint32_t lower_terminate_to_discard : 1;
uint32_t no_implicit_varying_subgroup_size : 1;
uint32_t padding : 31;
int32_t force_aniso;