diff --git a/src/intel/compiler/brw/brw_lower_regioning.cpp b/src/intel/compiler/brw/brw_lower_regioning.cpp index e931ac73007..3ad93762242 100644 --- a/src/intel/compiler/brw/brw_lower_regioning.cpp +++ b/src/intel/compiler/brw/brw_lower_regioning.cpp @@ -452,8 +452,16 @@ namespace { switch (inst->opcode) { case BRW_OPCODE_MOV: return false; - case BRW_OPCODE_SEL: - return inst->dst.type != get_exec_type(inst); + case BRW_OPCODE_SEL: { + const brw_reg_type exec_type = get_exec_type(inst); + + if (inst->dst.type == exec_type) + return false; + + /* SEL can mix integer sizes and signed/unsigned. */ + return !brw_type_is_int(inst->dst.type) || + !brw_type_is_int(exec_type); + } default: /* FIXME: We assume the opcodes not explicitly mentioned before just * work fine with arbitrary conversions, unless they need to be diff --git a/src/intel/compiler/brw/meson.build b/src/intel/compiler/brw/meson.build index 88d42fe6648..f96ea1b2650 100644 --- a/src/intel/compiler/brw/meson.build +++ b/src/intel/compiler/brw/meson.build @@ -163,6 +163,7 @@ if with_tests 'test_helpers.cpp', 'test_helpers.h', 'test_insert_load_reg.cpp', + 'test_lower_regioning.cpp', 'test_lower_scoreboard.cpp', 'test_opt_algebraic.cpp', 'test_opt_cmod_propagation.cpp', diff --git a/src/intel/compiler/brw/test_lower_regioning.cpp b/src/intel/compiler/brw/test_lower_regioning.cpp new file mode 100644 index 00000000000..a0cfe82da02 --- /dev/null +++ b/src/intel/compiler/brw/test_lower_regioning.cpp @@ -0,0 +1,24 @@ +/* + * Copyright © 2025 Intel Corporation + * SPDX-License-Identifier: MIT + */ + +#include "test_helpers.h" +#include "brw_builder.h" + +class lower_regioning_test : public brw_shader_pass_test { +}; + +TEST_F(lower_regioning_test, sel_ud_d_d) +{ + brw_builder bld = make_shader(); + + brw_reg dest = vgrf(bld, BRW_TYPE_UD); + brw_reg src0 = vgrf(bld, BRW_TYPE_D); + brw_reg src1 = vgrf(bld, BRW_TYPE_D); + + bld.SEL(dest, src0, src1) + ->saturate = true; + + EXPECT_NO_PROGRESS(brw_lower_regioning, bld); +}