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i965/gs: Fix extra level of indentation left by the previous commit.
I left a bunch of code indented a level in the previous patch to make the diff easier to read. But now we should fix that. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
This commit is contained in:
Kenneth Graunke
parent
df31c1850d
commit
31a36ffbc8
2 changed files with 112 additions and 116 deletions
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@ -484,76 +484,74 @@ vec4_gs_visitor::gs_emit_vertex(int stream_id)
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if (stream_id > 0 && shader_prog->TransformFeedback.NumVarying == 0)
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return;
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{
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/* If we're outputting 32 control data bits or less, then we can wait
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* until the shader is over to output them all. Otherwise we need to
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* output them as we go. Now is the time to do it, since we're about to
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* output the vertex_count'th vertex, so it's guaranteed that the
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* control data bits associated with the (vertex_count - 1)th vertex are
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* correct.
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/* If we're outputting 32 control data bits or less, then we can wait
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* until the shader is over to output them all. Otherwise we need to
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* output them as we go. Now is the time to do it, since we're about to
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* output the vertex_count'th vertex, so it's guaranteed that the
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* control data bits associated with the (vertex_count - 1)th vertex are
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* correct.
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*/
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if (c->control_data_header_size_bits > 32) {
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this->current_annotation = "emit vertex: emit control data bits";
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/* Only emit control data bits if we've finished accumulating a batch
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* of 32 bits. This is the case when:
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*
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* (vertex_count * bits_per_vertex) % 32 == 0
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*
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* (in other words, when the last 5 bits of vertex_count *
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* bits_per_vertex are 0). Assuming bits_per_vertex == 2^n for some
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* integer n (which is always the case, since bits_per_vertex is
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* always 1 or 2), this is equivalent to requiring that the last 5-n
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* bits of vertex_count are 0:
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*
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* vertex_count & (2^(5-n) - 1) == 0
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*
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* 2^(5-n) == 2^5 / 2^n == 32 / bits_per_vertex, so this is
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* equivalent to:
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*
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* vertex_count & (32 / bits_per_vertex - 1) == 0
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*/
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if (c->control_data_header_size_bits > 32) {
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this->current_annotation = "emit vertex: emit control data bits";
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/* Only emit control data bits if we've finished accumulating a batch
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* of 32 bits. This is the case when:
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*
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* (vertex_count * bits_per_vertex) % 32 == 0
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*
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* (in other words, when the last 5 bits of vertex_count *
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* bits_per_vertex are 0). Assuming bits_per_vertex == 2^n for some
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* integer n (which is always the case, since bits_per_vertex is
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* always 1 or 2), this is equivalent to requiring that the last 5-n
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* bits of vertex_count are 0:
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*
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* vertex_count & (2^(5-n) - 1) == 0
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*
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* 2^(5-n) == 2^5 / 2^n == 32 / bits_per_vertex, so this is
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* equivalent to:
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*
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* vertex_count & (32 / bits_per_vertex - 1) == 0
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vec4_instruction *inst =
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emit(AND(dst_null_d(), this->vertex_count,
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(uint32_t) (32 / c->control_data_bits_per_vertex - 1)));
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inst->conditional_mod = BRW_CONDITIONAL_Z;
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emit(IF(BRW_PREDICATE_NORMAL));
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{
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/* If vertex_count is 0, then no control data bits have been
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* accumulated yet, so we skip emitting them.
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*/
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vec4_instruction *inst =
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emit(AND(dst_null_d(), this->vertex_count,
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(uint32_t) (32 / c->control_data_bits_per_vertex - 1)));
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inst->conditional_mod = BRW_CONDITIONAL_Z;
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emit(CMP(dst_null_d(), this->vertex_count, 0u,
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BRW_CONDITIONAL_NEQ));
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emit(IF(BRW_PREDICATE_NORMAL));
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{
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/* If vertex_count is 0, then no control data bits have been
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* accumulated yet, so we skip emitting them.
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*/
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emit(CMP(dst_null_d(), this->vertex_count, 0u,
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BRW_CONDITIONAL_NEQ));
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emit(IF(BRW_PREDICATE_NORMAL));
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emit_control_data_bits();
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emit(BRW_OPCODE_ENDIF);
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/* Reset control_data_bits to 0 so we can start accumulating a new
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* batch.
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*
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* Note: in the case where vertex_count == 0, this neutralizes the
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* effect of any call to EndPrimitive() that the shader may have
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* made before outputting its first vertex.
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*/
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inst = emit(MOV(dst_reg(this->control_data_bits), 0u));
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inst->force_writemask_all = true;
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}
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emit_control_data_bits();
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emit(BRW_OPCODE_ENDIF);
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}
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this->current_annotation = "emit vertex: vertex data";
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emit_vertex();
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/* In stream mode we have to set control data bits for all vertices
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* unless we have disabled control data bits completely (which we do
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* do for GL_POINTS outputs that don't use streams).
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*/
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if (c->control_data_header_size_bits > 0 &&
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c->prog_data.control_data_format ==
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GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID) {
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this->current_annotation = "emit vertex: Stream control data bits";
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set_stream_control_data_bits(stream_id);
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/* Reset control_data_bits to 0 so we can start accumulating a new
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* batch.
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*
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* Note: in the case where vertex_count == 0, this neutralizes the
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* effect of any call to EndPrimitive() that the shader may have
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* made before outputting its first vertex.
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*/
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inst = emit(MOV(dst_reg(this->control_data_bits), 0u));
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inst->force_writemask_all = true;
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}
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emit(BRW_OPCODE_ENDIF);
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}
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this->current_annotation = "emit vertex: vertex data";
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emit_vertex();
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/* In stream mode we have to set control data bits for all vertices
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* unless we have disabled control data bits completely (which we do
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* do for GL_POINTS outputs that don't use streams).
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*/
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if (c->control_data_header_size_bits > 0 &&
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c->prog_data.control_data_format ==
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GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID) {
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this->current_annotation = "emit vertex: Stream control data bits";
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set_stream_control_data_bits(stream_id);
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}
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this->current_annotation = NULL;
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@ -172,64 +172,62 @@ gen6_gs_visitor::gs_emit_vertex(int stream_id)
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{
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this->current_annotation = "gen6 emit vertex";
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{
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/* Buffer all output slots for this vertex in vertex_output */
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for (int slot = 0; slot < prog_data->vue_map.num_slots; ++slot) {
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int varying = prog_data->vue_map.slot_to_varying[slot];
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if (varying != VARYING_SLOT_PSIZ) {
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dst_reg dst(this->vertex_output);
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dst.reladdr = ralloc(mem_ctx, src_reg);
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memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg));
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emit_urb_slot(dst, varying);
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} else {
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/* The PSIZ slot can pack multiple varyings in different channels
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* and emit_urb_slot() will produce a MOV instruction for each of
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* them. Since we are writing to an array, that will translate to
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* possibly multiple MOV instructions with an array destination and
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* each will generate a scratch write with the same offset into
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* scratch space (thus, each one overwriting the previous). This is
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* not what we want. What we will do instead is emit PSIZ to a
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* a regular temporary register, then move that resgister into the
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* array. This way we only have one instruction with an array
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* destination and we only produce a single scratch write.
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*/
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dst_reg tmp = dst_reg(src_reg(this, glsl_type::uvec4_type));
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emit_urb_slot(tmp, varying);
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dst_reg dst(this->vertex_output);
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dst.reladdr = ralloc(mem_ctx, src_reg);
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memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg));
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vec4_instruction *inst = emit(MOV(dst, src_reg(tmp)));
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inst->force_writemask_all = true;
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}
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emit(ADD(dst_reg(this->vertex_output_offset),
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this->vertex_output_offset, 1u));
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}
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/* Now buffer flags for this vertex */
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dst_reg dst(this->vertex_output);
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dst.reladdr = ralloc(mem_ctx, src_reg);
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memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg));
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if (c->gp->program.OutputType == GL_POINTS) {
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/* If we are outputting points, then every vertex has PrimStart and
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* PrimEnd set.
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*/
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emit(MOV(dst, (_3DPRIM_POINTLIST << URB_WRITE_PRIM_TYPE_SHIFT) |
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URB_WRITE_PRIM_START | URB_WRITE_PRIM_END));
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emit(ADD(dst_reg(this->prim_count), this->prim_count, 1u));
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/* Buffer all output slots for this vertex in vertex_output */
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for (int slot = 0; slot < prog_data->vue_map.num_slots; ++slot) {
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int varying = prog_data->vue_map.slot_to_varying[slot];
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if (varying != VARYING_SLOT_PSIZ) {
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dst_reg dst(this->vertex_output);
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dst.reladdr = ralloc(mem_ctx, src_reg);
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memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg));
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emit_urb_slot(dst, varying);
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} else {
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/* Otherwise, we can only set the PrimStart flag, which we have stored
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* in the first_vertex register. We will have to wait until we execute
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* EndPrimitive() or we end the thread to set the PrimEnd flag on a
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* vertex.
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/* The PSIZ slot can pack multiple varyings in different channels
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* and emit_urb_slot() will produce a MOV instruction for each of
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* them. Since we are writing to an array, that will translate to
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* possibly multiple MOV instructions with an array destination and
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* each will generate a scratch write with the same offset into
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* scratch space (thus, each one overwriting the previous). This is
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* not what we want. What we will do instead is emit PSIZ to a
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* a regular temporary register, then move that resgister into the
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* array. This way we only have one instruction with an array
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* destination and we only produce a single scratch write.
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*/
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emit(OR(dst, this->first_vertex,
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(c->prog_data.output_topology << URB_WRITE_PRIM_TYPE_SHIFT)));
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emit(MOV(dst_reg(this->first_vertex), 0u));
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dst_reg tmp = dst_reg(src_reg(this, glsl_type::uvec4_type));
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emit_urb_slot(tmp, varying);
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dst_reg dst(this->vertex_output);
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dst.reladdr = ralloc(mem_ctx, src_reg);
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memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg));
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vec4_instruction *inst = emit(MOV(dst, src_reg(tmp)));
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inst->force_writemask_all = true;
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}
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emit(ADD(dst_reg(this->vertex_output_offset),
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this->vertex_output_offset, 1u));
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}
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/* Now buffer flags for this vertex */
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dst_reg dst(this->vertex_output);
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dst.reladdr = ralloc(mem_ctx, src_reg);
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memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg));
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if (c->gp->program.OutputType == GL_POINTS) {
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/* If we are outputting points, then every vertex has PrimStart and
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* PrimEnd set.
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*/
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emit(MOV(dst, (_3DPRIM_POINTLIST << URB_WRITE_PRIM_TYPE_SHIFT) |
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URB_WRITE_PRIM_START | URB_WRITE_PRIM_END));
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emit(ADD(dst_reg(this->prim_count), this->prim_count, 1u));
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} else {
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/* Otherwise, we can only set the PrimStart flag, which we have stored
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* in the first_vertex register. We will have to wait until we execute
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* EndPrimitive() or we end the thread to set the PrimEnd flag on a
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* vertex.
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*/
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emit(OR(dst, this->first_vertex,
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(c->prog_data.output_topology << URB_WRITE_PRIM_TYPE_SHIFT)));
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emit(MOV(dst_reg(this->first_vertex), 0u));
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}
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emit(ADD(dst_reg(this->vertex_output_offset),
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this->vertex_output_offset, 1u));
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}
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void
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