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swr/rast: x86 autogenerated macro work
Add name argument to x86 autogenerated macros. Add useful variable names for DCL_inputVec implementation. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
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4cd6e2ebfd
commit
3140e714d2
4 changed files with 15 additions and 14 deletions
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@ -223,7 +223,7 @@ def generate_x86_h(output_dir):
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declargs = 'Value* ' + ', Value* '.join(inst[2])
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functions.append({
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'decl' : 'Value* %s(%s)' % (inst[0], declargs),
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'decl' : 'Value* %s(%s, const llvm::Twine& name = "")' % (inst[0], declargs),
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'args' : ', '.join(inst[2]),
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'intrin' : inst[1],
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})
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@ -41,7 +41,7 @@ ${func['decl']}
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{
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%if isX86:
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Function *pFunc = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::${func['intrin']});
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return CALL(pFunc, std::initializer_list<Value*>{${func['args']}});
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return CALL(pFunc, std::initializer_list<Value*>{${func['args']}}, name);
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%else:
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return IRB()->${func['intrin']}(${func['args']});
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%endif
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@ -267,7 +267,7 @@ namespace SwrJit
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return UndefValue::get(VectorType::get(ty, size));
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}
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Value *Builder::VBROADCAST(Value *src)
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Value *Builder::VBROADCAST(Value *src, const llvm::Twine& name)
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{
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// check if src is already a vector
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if (src->getType()->isVectorTy())
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@ -275,7 +275,7 @@ namespace SwrJit
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return src;
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}
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return VECTOR_SPLAT(mVWidth, src);
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return VECTOR_SPLAT(mVWidth, src, name);
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}
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Value *Builder::VBROADCAST_16(Value *src)
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@ -367,12 +367,12 @@ namespace SwrJit
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return STORE(val, GEPA(basePtr, valIndices));
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}
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CallInst *Builder::CALL(Value *Callee, const std::initializer_list<Value*> &argsList)
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CallInst *Builder::CALL(Value *Callee, const std::initializer_list<Value*> &argsList, const llvm::Twine& name)
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{
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std::vector<Value*> args;
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for (auto arg : argsList)
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args.push_back(arg);
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return CALLA(Callee, args);
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return CALLA(Callee, args, name);
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}
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CallInst *Builder::CALL(Value *Callee, Value* arg)
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@ -406,9 +406,9 @@ namespace SwrJit
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return CALL(func);
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}
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Value *Builder::VRCP(Value *va)
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Value *Builder::VRCP(Value *va, const llvm::Twine& name)
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{
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return FDIV(VIMMED1(1.0f), va); // 1 / a
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return FDIV(VIMMED1(1.0f), va, name); // 1 / a
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}
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Value *Builder::VPLANEPS(Value* vA, Value* vB, Value* vC, Value* &vX, Value* &vY)
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@ -990,11 +990,11 @@ namespace SwrJit
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/// @brief Generate a VCVTPH2PS operation (float16->float32 conversion)
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/// in LLVM IR. If not supported on the underlying platform, emulate it
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/// @param a - 128bit SIMD lane(8x16bit) of float16 in int16 format.
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Value *Builder::CVTPH2PS(Value* a)
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Value *Builder::CVTPH2PS(Value* a, const llvm::Twine& name)
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{
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if (JM()->mArch.F16C())
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{
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return VCVTPH2PS(a);
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return VCVTPH2PS(a, name);
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}
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else
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{
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@ -1014,6 +1014,7 @@ namespace SwrJit
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pResult = VINSERT(pResult, pConv, C(i));
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}
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pResult->setName(name);
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return pResult;
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}
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}
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@ -81,10 +81,10 @@ Value *VUNDEF(Type* ty, uint32_t size);
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Value *VUNDEF_IPTR();
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Value *VBROADCAST(Value *src);
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Value *VBROADCAST(Value *src, const llvm::Twine& name = "");
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Value *VBROADCAST_16(Value *src);
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Value *VRCP(Value *va);
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Value *VRCP(Value *va, const llvm::Twine& name = "");
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Value *VPLANEPS(Value* vA, Value* vB, Value* vC, Value* &vX, Value* &vY);
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uint32_t IMMED(Value* i);
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@ -95,7 +95,7 @@ Value *GEP(Value* ptr, const std::initializer_list<uint32_t> &indexList);
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Value *IN_BOUNDS_GEP(Value* ptr, const std::initializer_list<Value*> &indexList);
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Value *IN_BOUNDS_GEP(Value* ptr, const std::initializer_list<uint32_t> &indexList);
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CallInst *CALL(Value *Callee, const std::initializer_list<Value*> &args);
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CallInst *CALL(Value *Callee, const std::initializer_list<Value*> &args, const llvm::Twine& name = "");
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CallInst *CALL(Value *Callee) { return CALLA(Callee); }
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CallInst *CALL(Value *Callee, Value* arg);
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CallInst *CALL2(Value *Callee, Value* arg1, Value* arg2);
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@ -158,7 +158,7 @@ Value *PMOVSXBD(Value* a);
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Value *PMOVSXWD(Value* a);
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Value *PERMD(Value* a, Value* idx);
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Value *PERMPS(Value* a, Value* idx);
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Value *CVTPH2PS(Value* a);
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Value *CVTPH2PS(Value* a, const llvm::Twine& name = "");
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Value *CVTPS2PH(Value* a, Value* rounding);
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Value *PMAXSD(Value* a, Value* b);
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Value *PMINSD(Value* a, Value* b);
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