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gallium/tgsi_exec: Drop the unused dst_datatypes from dest stores.
It was just for the disabled check_inf_or_nan debugging, and if you want to do that then you should do it with an assert at the end of exec_instruction using tgsi_opcode_infer_type(). Despite the fact that this operand was dead, it actually reduces generated code in release builds. Reviewed-by: Adam Jackson <ajax@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10605>
This commit is contained in:
Eric Anholt
Marge Bot
parent
26b28bf0a6
commit
31369987ff
1 changed files with 149 additions and 171 deletions
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@ -1730,8 +1730,7 @@ static union tgsi_exec_channel *
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store_dest_dstret(struct tgsi_exec_machine *mach,
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store_dest_dstret(struct tgsi_exec_machine *mach,
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const union tgsi_exec_channel *chan,
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const union tgsi_exec_channel *chan,
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const struct tgsi_full_dst_register *reg,
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const struct tgsi_full_dst_register *reg,
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uint chan_index,
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uint chan_index)
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enum tgsi_exec_datatype dst_datatype)
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{
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{
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static union tgsi_exec_channel null;
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static union tgsi_exec_channel null;
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union tgsi_exec_channel *dst;
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union tgsi_exec_channel *dst;
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@ -1739,10 +1738,6 @@ store_dest_dstret(struct tgsi_exec_machine *mach,
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int offset = 0; /* indirection offset */
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int offset = 0; /* indirection offset */
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int index;
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int index;
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/* for debugging */
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if (0 && dst_datatype == TGSI_EXEC_DATA_FLOAT) {
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check_inf_or_nan(chan);
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}
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/* There is an extra source register that indirectly subscripts
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/* There is an extra source register that indirectly subscripts
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* a register file. The direct index now becomes an offset
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* a register file. The direct index now becomes an offset
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@ -1897,14 +1892,13 @@ static void
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store_dest_double(struct tgsi_exec_machine *mach,
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store_dest_double(struct tgsi_exec_machine *mach,
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const union tgsi_exec_channel *chan,
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const union tgsi_exec_channel *chan,
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const struct tgsi_full_dst_register *reg,
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const struct tgsi_full_dst_register *reg,
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uint chan_index,
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uint chan_index)
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enum tgsi_exec_datatype dst_datatype)
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{
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{
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union tgsi_exec_channel *dst;
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union tgsi_exec_channel *dst;
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const uint execmask = mach->ExecMask;
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const uint execmask = mach->ExecMask;
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int i;
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int i;
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dst = store_dest_dstret(mach, chan, reg, chan_index, dst_datatype);
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dst = store_dest_dstret(mach, chan, reg, chan_index);
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if (!dst)
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if (!dst)
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return;
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return;
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@ -1919,14 +1913,13 @@ store_dest(struct tgsi_exec_machine *mach,
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const union tgsi_exec_channel *chan,
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const union tgsi_exec_channel *chan,
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const struct tgsi_full_dst_register *reg,
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const struct tgsi_full_dst_register *reg,
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const struct tgsi_full_instruction *inst,
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const struct tgsi_full_instruction *inst,
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uint chan_index,
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uint chan_index)
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enum tgsi_exec_datatype dst_datatype)
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{
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{
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union tgsi_exec_channel *dst;
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union tgsi_exec_channel *dst;
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const uint execmask = mach->ExecMask;
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const uint execmask = mach->ExecMask;
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int i;
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int i;
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dst = store_dest_dstret(mach, chan, reg, chan_index, dst_datatype);
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dst = store_dest_dstret(mach, chan, reg, chan_index);
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if (!dst)
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if (!dst)
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return;
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return;
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@ -2305,7 +2298,7 @@ exec_tex(struct tgsi_exec_machine *mach,
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
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store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -2349,12 +2342,10 @@ exec_lodq(struct tgsi_exec_machine *mach,
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r[1].f);
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r[1].f);
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if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
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if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
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store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X,
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store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X);
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TGSI_EXEC_DATA_FLOAT);
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}
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}
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if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
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if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
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store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Y,
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store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Y);
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TGSI_EXEC_DATA_FLOAT);
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}
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}
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if (inst->Instruction.Opcode == TGSI_OPCODE_LOD) {
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if (inst->Instruction.Opcode == TGSI_OPCODE_LOD) {
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unsigned char swizzles[4];
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unsigned char swizzles[4];
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@ -2368,21 +2359,19 @@ exec_lodq(struct tgsi_exec_machine *mach,
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (swizzles[chan] >= 2) {
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if (swizzles[chan] >= 2) {
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store_dest(mach, &ZeroVec,
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store_dest(mach, &ZeroVec,
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&inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
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&inst->Dst[0], inst, chan);
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} else {
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} else {
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store_dest(mach, &r[swizzles[chan]],
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store_dest(mach, &r[swizzles[chan]],
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&inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
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&inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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} else {
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} else {
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if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
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if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
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store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X,
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store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X);
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TGSI_EXEC_DATA_FLOAT);
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}
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}
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if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
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if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
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store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Y,
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store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Y);
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TGSI_EXEC_DATA_FLOAT);
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}
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}
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}
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}
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}
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}
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@ -2489,7 +2478,7 @@ exec_txd(struct tgsi_exec_machine *mach,
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
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store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -2567,14 +2556,14 @@ exec_txf(struct tgsi_exec_machine *mach,
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &r[swizzles[chan]],
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store_dest(mach, &r[swizzles[chan]],
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&inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
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&inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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else {
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else {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
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store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -2605,8 +2594,7 @@ exec_txq(struct tgsi_exec_machine *mach,
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &r[chan], &inst->Dst[0], inst, chan,
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store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
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TGSI_EXEC_DATA_INT);
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}
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}
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}
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}
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}
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}
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@ -2740,7 +2728,7 @@ exec_sample(struct tgsi_exec_machine *mach,
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &r[swizzles[chan]],
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store_dest(mach, &r[swizzles[chan]],
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&inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
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&inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -2822,7 +2810,7 @@ exec_sample_d(struct tgsi_exec_machine *mach,
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &r[swizzles[chan]],
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store_dest(mach, &r[swizzles[chan]],
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&inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
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&inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -3048,7 +3036,6 @@ static void
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exec_scalar_unary(struct tgsi_exec_machine *mach,
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exec_scalar_unary(struct tgsi_exec_machine *mach,
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const struct tgsi_full_instruction *inst,
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const struct tgsi_full_instruction *inst,
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micro_unary_op op,
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micro_unary_op op,
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enum tgsi_exec_datatype dst_datatype,
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enum tgsi_exec_datatype src_datatype)
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enum tgsi_exec_datatype src_datatype)
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{
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{
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unsigned int chan;
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unsigned int chan;
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@ -3059,7 +3046,7 @@ exec_scalar_unary(struct tgsi_exec_machine *mach,
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op(&dst, &src);
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op(&dst, &src);
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
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store_dest(mach, &dst, &inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -3068,7 +3055,6 @@ static void
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exec_vector_unary(struct tgsi_exec_machine *mach,
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exec_vector_unary(struct tgsi_exec_machine *mach,
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const struct tgsi_full_instruction *inst,
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const struct tgsi_full_instruction *inst,
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micro_unary_op op,
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micro_unary_op op,
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enum tgsi_exec_datatype dst_datatype,
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enum tgsi_exec_datatype src_datatype)
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enum tgsi_exec_datatype src_datatype)
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{
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{
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unsigned int chan;
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unsigned int chan;
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@ -3084,7 +3070,7 @@ exec_vector_unary(struct tgsi_exec_machine *mach,
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}
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}
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
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store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -3097,7 +3083,6 @@ static void
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exec_scalar_binary(struct tgsi_exec_machine *mach,
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exec_scalar_binary(struct tgsi_exec_machine *mach,
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const struct tgsi_full_instruction *inst,
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const struct tgsi_full_instruction *inst,
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micro_binary_op op,
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micro_binary_op op,
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enum tgsi_exec_datatype dst_datatype,
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enum tgsi_exec_datatype src_datatype)
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enum tgsi_exec_datatype src_datatype)
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{
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{
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unsigned int chan;
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unsigned int chan;
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@ -3109,7 +3094,7 @@ exec_scalar_binary(struct tgsi_exec_machine *mach,
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op(&dst, &src[0], &src[1]);
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op(&dst, &src[0], &src[1]);
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
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store_dest(mach, &dst, &inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -3118,7 +3103,6 @@ static void
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exec_vector_binary(struct tgsi_exec_machine *mach,
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exec_vector_binary(struct tgsi_exec_machine *mach,
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const struct tgsi_full_instruction *inst,
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const struct tgsi_full_instruction *inst,
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micro_binary_op op,
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micro_binary_op op,
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enum tgsi_exec_datatype dst_datatype,
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enum tgsi_exec_datatype src_datatype)
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enum tgsi_exec_datatype src_datatype)
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{
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{
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unsigned int chan;
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unsigned int chan;
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@ -3135,7 +3119,7 @@ exec_vector_binary(struct tgsi_exec_machine *mach,
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}
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}
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
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store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -3149,7 +3133,6 @@ static void
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exec_vector_trinary(struct tgsi_exec_machine *mach,
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exec_vector_trinary(struct tgsi_exec_machine *mach,
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const struct tgsi_full_instruction *inst,
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const struct tgsi_full_instruction *inst,
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micro_trinary_op op,
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micro_trinary_op op,
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enum tgsi_exec_datatype dst_datatype,
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enum tgsi_exec_datatype src_datatype)
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enum tgsi_exec_datatype src_datatype)
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{
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{
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unsigned int chan;
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unsigned int chan;
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@ -3167,7 +3150,7 @@ exec_vector_trinary(struct tgsi_exec_machine *mach,
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}
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}
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
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store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
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store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
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}
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}
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}
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}
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}
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}
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@ -3182,7 +3165,6 @@ static void
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exec_vector_quaternary(struct tgsi_exec_machine *mach,
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exec_vector_quaternary(struct tgsi_exec_machine *mach,
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const struct tgsi_full_instruction *inst,
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const struct tgsi_full_instruction *inst,
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micro_quaternary_op op,
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micro_quaternary_op op,
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enum tgsi_exec_datatype dst_datatype,
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enum tgsi_exec_datatype src_datatype)
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enum tgsi_exec_datatype src_datatype)
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{
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{
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unsigned int chan;
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unsigned int chan;
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|
|
@ -3201,7 +3183,7 @@ exec_vector_quaternary(struct tgsi_exec_machine *mach,
|
||||||
}
|
}
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
|
store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -3225,7 +3207,7 @@ exec_dp3(struct tgsi_exec_machine *mach,
|
||||||
|
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &arg[2], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -3249,7 +3231,7 @@ exec_dp4(struct tgsi_exec_machine *mach,
|
||||||
|
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &arg[2], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -3271,7 +3253,7 @@ exec_dp2(struct tgsi_exec_machine *mach,
|
||||||
|
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &arg[2], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -3291,7 +3273,7 @@ exec_pk2h(struct tgsi_exec_machine *mach,
|
||||||
}
|
}
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &dst, &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_UINT);
|
store_dest(mach, &dst, &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -3310,7 +3292,7 @@ exec_up2h(struct tgsi_exec_machine *mach,
|
||||||
}
|
}
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &dst[chan & 1], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &dst[chan & 1], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -3349,8 +3331,7 @@ exec_ucmp(struct tgsi_exec_machine *mach,
|
||||||
}
|
}
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan,
|
store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
|
||||||
TGSI_EXEC_DATA_FLOAT);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -3375,16 +3356,16 @@ exec_dst(struct tgsi_exec_machine *mach,
|
||||||
}
|
}
|
||||||
|
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
||||||
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_X);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
|
||||||
store_dest(mach, &d[TGSI_CHAN_Y], &inst->Dst[0], inst, TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &d[TGSI_CHAN_Y], &inst->Dst[0], inst, TGSI_CHAN_Y);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
|
||||||
store_dest(mach, &d[TGSI_CHAN_Z], &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &d[TGSI_CHAN_Z], &inst->Dst[0], inst, TGSI_CHAN_Z);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
|
||||||
store_dest(mach, &d[TGSI_CHAN_W], &inst->Dst[0], inst, TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &d[TGSI_CHAN_W], &inst->Dst[0], inst, TGSI_CHAN_W);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -3399,18 +3380,18 @@ exec_log(struct tgsi_exec_machine *mach,
|
||||||
micro_lg2(&r[1], &r[2]); /* r1 = lg2(r2) */
|
micro_lg2(&r[1], &r[2]); /* r1 = lg2(r2) */
|
||||||
micro_flr(&r[0], &r[1]); /* r0 = floor(r1) */
|
micro_flr(&r[0], &r[1]); /* r0 = floor(r1) */
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
||||||
store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
|
||||||
micro_exp2(&r[0], &r[0]); /* r0 = 2 ^ r0 */
|
micro_exp2(&r[0], &r[0]); /* r0 = 2 ^ r0 */
|
||||||
micro_div(&r[0], &r[2], &r[0]); /* r0 = r2 / r0 */
|
micro_div(&r[0], &r[2], &r[0]); /* r0 = r2 / r0 */
|
||||||
store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_Y);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
|
||||||
store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Z);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
|
||||||
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -3424,18 +3405,18 @@ exec_exp(struct tgsi_exec_machine *mach,
|
||||||
micro_flr(&r[1], &r[0]); /* r1 = floor(r0) */
|
micro_flr(&r[1], &r[0]); /* r1 = floor(r0) */
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
||||||
micro_exp2(&r[2], &r[1]); /* r2 = 2 ^ r1 */
|
micro_exp2(&r[2], &r[1]); /* r2 = 2 ^ r1 */
|
||||||
store_dest(mach, &r[2], &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &r[2], &inst->Dst[0], inst, TGSI_CHAN_X);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
|
||||||
micro_sub(&r[2], &r[0], &r[1]); /* r2 = r0 - r1 */
|
micro_sub(&r[2], &r[0], &r[1]); /* r2 = r0 - r1 */
|
||||||
store_dest(mach, &r[2], &inst->Dst[0], inst, TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &r[2], &inst->Dst[0], inst, TGSI_CHAN_Y);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
|
||||||
micro_exp2(&r[2], &r[0]); /* r2 = 2 ^ r0 */
|
micro_exp2(&r[2], &r[0]); /* r2 = 2 ^ r0 */
|
||||||
store_dest(mach, &r[2], &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &r[2], &inst->Dst[0], inst, TGSI_CHAN_Z);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
|
||||||
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -3457,19 +3438,19 @@ exec_lit(struct tgsi_exec_machine *mach,
|
||||||
micro_max(&r[2], &r[2], &M128Vec);
|
micro_max(&r[2], &r[2], &M128Vec);
|
||||||
micro_pow(&r[1], &r[1], &r[2]);
|
micro_pow(&r[1], &r[1], &r[2]);
|
||||||
micro_lt(&d[TGSI_CHAN_Z], &ZeroVec, &r[0], &r[1], &ZeroVec);
|
micro_lt(&d[TGSI_CHAN_Z], &ZeroVec, &r[0], &r[1], &ZeroVec);
|
||||||
store_dest(mach, &d[TGSI_CHAN_Z], &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &d[TGSI_CHAN_Z], &inst->Dst[0], inst, TGSI_CHAN_Z);
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
|
||||||
micro_max(&d[TGSI_CHAN_Y], &r[0], &ZeroVec);
|
micro_max(&d[TGSI_CHAN_Y], &r[0], &ZeroVec);
|
||||||
store_dest(mach, &d[TGSI_CHAN_Y], &inst->Dst[0], inst, TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &d[TGSI_CHAN_Y], &inst->Dst[0], inst, TGSI_CHAN_Y);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
||||||
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_X);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
|
||||||
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -3627,9 +3608,9 @@ store_double_channel(struct tgsi_exec_machine *mach,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
store_dest_double(mach, &dst[0], reg, chan_0, TGSI_EXEC_DATA_UINT);
|
store_dest_double(mach, &dst[0], reg, chan_0);
|
||||||
if (chan_1 != (unsigned)-1)
|
if (chan_1 != (unsigned)-1)
|
||||||
store_dest_double(mach, &dst[1], reg, chan_1, TGSI_EXEC_DATA_UINT);
|
store_dest_double(mach, &dst[1], reg, chan_1);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
|
|
@ -3759,7 +3740,7 @@ exec_dfracexp(struct tgsi_exec_machine *mach,
|
||||||
store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W);
|
store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W);
|
||||||
for (unsigned chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (unsigned chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[1].Register.WriteMask & (1 << chan))
|
if (inst->Dst[1].Register.WriteMask & (1 << chan))
|
||||||
store_dest(mach, &dst_exp, &inst->Dst[1], inst, chan, TGSI_EXEC_DATA_INT);
|
store_dest(mach, &dst_exp, &inst->Dst[1], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -3878,7 +3859,7 @@ exec_load_img(struct tgsi_exec_machine *mach,
|
||||||
}
|
}
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -3932,7 +3913,7 @@ exec_load_membuf(struct tgsi_exec_machine *mach,
|
||||||
|
|
||||||
for (int chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (int chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &rgba[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &rgba[chan], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -4161,7 +4142,7 @@ exec_atomop_img(struct tgsi_exec_machine *mach,
|
||||||
}
|
}
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -4263,7 +4244,7 @@ exec_atomop_membuf(struct tgsi_exec_machine *mach,
|
||||||
}
|
}
|
||||||
|
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++)
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++)
|
||||||
store_dest(mach, &r0, &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &r0, &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
|
|
@ -4303,8 +4284,7 @@ exec_resq_img(struct tgsi_exec_machine *mach,
|
||||||
|
|
||||||
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
|
||||||
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan,
|
store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
|
||||||
TGSI_EXEC_DATA_INT);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -4323,8 +4303,7 @@ exec_resq_buf(struct tgsi_exec_machine *mach,
|
||||||
|
|
||||||
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
|
||||||
for (int chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
for (int chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
|
||||||
store_dest(mach, &r, &inst->Dst[0], inst, TGSI_CHAN_X,
|
store_dest(mach, &r, &inst->Dst[0], inst, TGSI_CHAN_X);
|
||||||
TGSI_EXEC_DATA_INT);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -4463,8 +4442,7 @@ exec_t_2_64(struct tgsi_exec_machine *mach,
|
||||||
static void
|
static void
|
||||||
exec_64_2_t(struct tgsi_exec_machine *mach,
|
exec_64_2_t(struct tgsi_exec_machine *mach,
|
||||||
const struct tgsi_full_instruction *inst,
|
const struct tgsi_full_instruction *inst,
|
||||||
micro_sop_d op,
|
micro_sop_d op)
|
||||||
enum tgsi_exec_datatype dst_datatype)
|
|
||||||
{
|
{
|
||||||
union tgsi_double_channel src;
|
union tgsi_double_channel src;
|
||||||
union tgsi_exec_channel dst;
|
union tgsi_exec_channel dst;
|
||||||
|
|
@ -4480,7 +4458,7 @@ exec_64_2_t(struct tgsi_exec_machine *mach,
|
||||||
else
|
else
|
||||||
fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W);
|
fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W);
|
||||||
op(&dst, &src);
|
op(&dst, &src);
|
||||||
store_dest(mach, &dst, &inst->Dst[0], inst, bit - 1, dst_datatype);
|
store_dest(mach, &dst, &inst->Dst[0], inst, bit - 1);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -5045,7 +5023,7 @@ exec_interp_at_sample(struct tgsi_exec_machine *mach,
|
||||||
assert(pos < TGSI_MAX_PRIM_VERTICES * PIPE_MAX_ATTRIBS);
|
assert(pos < TGSI_MAX_PRIM_VERTICES * PIPE_MAX_ATTRIBS);
|
||||||
mach->InputSampleOffsetApply[pos](mach, pos, chan, x, y, &result[chan]);
|
mach->InputSampleOffsetApply[pos](mach, pos, chan, x, y, &result[chan]);
|
||||||
}
|
}
|
||||||
store_dest(mach, &result[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &result[chan], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -5074,7 +5052,7 @@ exec_interp_at_offset(struct tgsi_exec_machine *mach,
|
||||||
union tgsi_exec_channel result;
|
union tgsi_exec_channel result;
|
||||||
fetch_src_file_channel(mach, TGSI_FILE_INPUT, chan, &index, &index2D, &result);
|
fetch_src_file_channel(mach, TGSI_FILE_INPUT, chan, &index, &index2D, &result);
|
||||||
mach->InputSampleOffsetApply[pos](mach, pos, chan, ofsx.f[chan], ofsy.f[chan], &result);
|
mach->InputSampleOffsetApply[pos](mach, pos, chan, ofsx.f[chan], ofsy.f[chan], &result);
|
||||||
store_dest(mach, &result, &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &result, &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -5110,7 +5088,7 @@ exec_interp_at_centroid(struct tgsi_exec_machine *mach,
|
||||||
*/
|
*/
|
||||||
fetch_src_file_channel(mach, TGSI_FILE_INPUT, chan, &index, &index2D,
|
fetch_src_file_channel(mach, TGSI_FILE_INPUT, chan, &index, &index2D,
|
||||||
&result[chan]);
|
&result[chan]);
|
||||||
store_dest(mach, &result[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
|
store_dest(mach, &result[chan], &inst->Dst[0], inst, chan);
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
@ -5133,11 +5111,11 @@ exec_instruction(
|
||||||
|
|
||||||
switch (inst->Instruction.Opcode) {
|
switch (inst->Instruction.Opcode) {
|
||||||
case TGSI_OPCODE_ARL:
|
case TGSI_OPCODE_ARL:
|
||||||
exec_vector_unary(mach, inst, micro_arl, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_arl, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_MOV:
|
case TGSI_OPCODE_MOV:
|
||||||
exec_vector_unary(mach, inst, micro_mov, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_mov, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_LIT:
|
case TGSI_OPCODE_LIT:
|
||||||
|
|
@ -5145,11 +5123,11 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_RCP:
|
case TGSI_OPCODE_RCP:
|
||||||
exec_scalar_unary(mach, inst, micro_rcp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_scalar_unary(mach, inst, micro_rcp, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_RSQ:
|
case TGSI_OPCODE_RSQ:
|
||||||
exec_scalar_unary(mach, inst, micro_rsq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_scalar_unary(mach, inst, micro_rsq, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_EXP:
|
case TGSI_OPCODE_EXP:
|
||||||
|
|
@ -5161,11 +5139,11 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_MUL:
|
case TGSI_OPCODE_MUL:
|
||||||
exec_vector_binary(mach, inst, micro_mul, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_mul, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_ADD:
|
case TGSI_OPCODE_ADD:
|
||||||
exec_vector_binary(mach, inst, micro_add, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_add, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_DP3:
|
case TGSI_OPCODE_DP3:
|
||||||
|
|
@ -5181,79 +5159,79 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_MIN:
|
case TGSI_OPCODE_MIN:
|
||||||
exec_vector_binary(mach, inst, micro_min, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_min, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_MAX:
|
case TGSI_OPCODE_MAX:
|
||||||
exec_vector_binary(mach, inst, micro_max, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_max, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SLT:
|
case TGSI_OPCODE_SLT:
|
||||||
exec_vector_binary(mach, inst, micro_slt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_slt, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SGE:
|
case TGSI_OPCODE_SGE:
|
||||||
exec_vector_binary(mach, inst, micro_sge, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_sge, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_MAD:
|
case TGSI_OPCODE_MAD:
|
||||||
exec_vector_trinary(mach, inst, micro_mad, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_trinary(mach, inst, micro_mad, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_LRP:
|
case TGSI_OPCODE_LRP:
|
||||||
exec_vector_trinary(mach, inst, micro_lrp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_trinary(mach, inst, micro_lrp, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SQRT:
|
case TGSI_OPCODE_SQRT:
|
||||||
exec_scalar_unary(mach, inst, micro_sqrt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_scalar_unary(mach, inst, micro_sqrt, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_FRC:
|
case TGSI_OPCODE_FRC:
|
||||||
exec_vector_unary(mach, inst, micro_frc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_frc, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_FLR:
|
case TGSI_OPCODE_FLR:
|
||||||
exec_vector_unary(mach, inst, micro_flr, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_flr, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_ROUND:
|
case TGSI_OPCODE_ROUND:
|
||||||
exec_vector_unary(mach, inst, micro_rnd, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_rnd, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_EX2:
|
case TGSI_OPCODE_EX2:
|
||||||
exec_scalar_unary(mach, inst, micro_exp2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_scalar_unary(mach, inst, micro_exp2, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_LG2:
|
case TGSI_OPCODE_LG2:
|
||||||
exec_scalar_unary(mach, inst, micro_lg2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_scalar_unary(mach, inst, micro_lg2, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_POW:
|
case TGSI_OPCODE_POW:
|
||||||
exec_scalar_binary(mach, inst, micro_pow, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_scalar_binary(mach, inst, micro_pow, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_LDEXP:
|
case TGSI_OPCODE_LDEXP:
|
||||||
exec_vector_binary(mach, inst, micro_ldexp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_ldexp, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_COS:
|
case TGSI_OPCODE_COS:
|
||||||
exec_scalar_unary(mach, inst, micro_cos, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_scalar_unary(mach, inst, micro_cos, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_DDX_FINE:
|
case TGSI_OPCODE_DDX_FINE:
|
||||||
exec_vector_unary(mach, inst, micro_ddx_fine, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_ddx_fine, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_DDX:
|
case TGSI_OPCODE_DDX:
|
||||||
exec_vector_unary(mach, inst, micro_ddx, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_ddx, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_DDY_FINE:
|
case TGSI_OPCODE_DDY_FINE:
|
||||||
exec_vector_unary(mach, inst, micro_ddy_fine, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_ddy_fine, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_DDY:
|
case TGSI_OPCODE_DDY:
|
||||||
exec_vector_unary(mach, inst, micro_ddy, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_ddy, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_KILL:
|
case TGSI_OPCODE_KILL:
|
||||||
|
|
@ -5281,23 +5259,23 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SEQ:
|
case TGSI_OPCODE_SEQ:
|
||||||
exec_vector_binary(mach, inst, micro_seq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_seq, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SGT:
|
case TGSI_OPCODE_SGT:
|
||||||
exec_vector_binary(mach, inst, micro_sgt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_sgt, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SIN:
|
case TGSI_OPCODE_SIN:
|
||||||
exec_scalar_unary(mach, inst, micro_sin, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_scalar_unary(mach, inst, micro_sin, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SLE:
|
case TGSI_OPCODE_SLE:
|
||||||
exec_vector_binary(mach, inst, micro_sle, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_sle, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SNE:
|
case TGSI_OPCODE_SNE:
|
||||||
exec_vector_binary(mach, inst, micro_sne, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_sne, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_TEX:
|
case TGSI_OPCODE_TEX:
|
||||||
|
|
@ -5367,7 +5345,7 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_ARR:
|
case TGSI_OPCODE_ARR:
|
||||||
exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_CAL:
|
case TGSI_OPCODE_CAL:
|
||||||
|
|
@ -5463,15 +5441,15 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SSG:
|
case TGSI_OPCODE_SSG:
|
||||||
exec_vector_unary(mach, inst, micro_sgn, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_sgn, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_CMP:
|
case TGSI_OPCODE_CMP:
|
||||||
exec_vector_trinary(mach, inst, micro_cmp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_trinary(mach, inst, micro_cmp, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_DIV:
|
case TGSI_OPCODE_DIV:
|
||||||
exec_vector_binary(mach, inst, micro_div, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_div, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_DP2:
|
case TGSI_OPCODE_DP2:
|
||||||
|
|
@ -5539,39 +5517,39 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_CEIL:
|
case TGSI_OPCODE_CEIL:
|
||||||
exec_vector_unary(mach, inst, micro_ceil, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_ceil, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_I2F:
|
case TGSI_OPCODE_I2F:
|
||||||
exec_vector_unary(mach, inst, micro_i2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_INT);
|
exec_vector_unary(mach, inst, micro_i2f, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_NOT:
|
case TGSI_OPCODE_NOT:
|
||||||
exec_vector_unary(mach, inst, micro_not, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_unary(mach, inst, micro_not, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_TRUNC:
|
case TGSI_OPCODE_TRUNC:
|
||||||
exec_vector_unary(mach, inst, micro_trunc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_trunc, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SHL:
|
case TGSI_OPCODE_SHL:
|
||||||
exec_vector_binary(mach, inst, micro_shl, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_shl, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_AND:
|
case TGSI_OPCODE_AND:
|
||||||
exec_vector_binary(mach, inst, micro_and, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_and, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_OR:
|
case TGSI_OPCODE_OR:
|
||||||
exec_vector_binary(mach, inst, micro_or, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_or, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_MOD:
|
case TGSI_OPCODE_MOD:
|
||||||
exec_vector_binary(mach, inst, micro_mod, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_binary(mach, inst, micro_mod, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_XOR:
|
case TGSI_OPCODE_XOR:
|
||||||
exec_vector_binary(mach, inst, micro_xor, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_xor, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_TXF:
|
case TGSI_OPCODE_TXF:
|
||||||
|
|
@ -5679,115 +5657,115 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_F2I:
|
case TGSI_OPCODE_F2I:
|
||||||
exec_vector_unary(mach, inst, micro_f2i, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_f2i, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_FSEQ:
|
case TGSI_OPCODE_FSEQ:
|
||||||
exec_vector_binary(mach, inst, micro_fseq, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_fseq, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_FSGE:
|
case TGSI_OPCODE_FSGE:
|
||||||
exec_vector_binary(mach, inst, micro_fsge, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_fsge, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_FSLT:
|
case TGSI_OPCODE_FSLT:
|
||||||
exec_vector_binary(mach, inst, micro_fslt, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_fslt, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_FSNE:
|
case TGSI_OPCODE_FSNE:
|
||||||
exec_vector_binary(mach, inst, micro_fsne, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_binary(mach, inst, micro_fsne, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_IDIV:
|
case TGSI_OPCODE_IDIV:
|
||||||
exec_vector_binary(mach, inst, micro_idiv, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_binary(mach, inst, micro_idiv, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_IMAX:
|
case TGSI_OPCODE_IMAX:
|
||||||
exec_vector_binary(mach, inst, micro_imax, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_binary(mach, inst, micro_imax, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_IMIN:
|
case TGSI_OPCODE_IMIN:
|
||||||
exec_vector_binary(mach, inst, micro_imin, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_binary(mach, inst, micro_imin, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_INEG:
|
case TGSI_OPCODE_INEG:
|
||||||
exec_vector_unary(mach, inst, micro_ineg, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_unary(mach, inst, micro_ineg, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_ISGE:
|
case TGSI_OPCODE_ISGE:
|
||||||
exec_vector_binary(mach, inst, micro_isge, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_binary(mach, inst, micro_isge, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_ISHR:
|
case TGSI_OPCODE_ISHR:
|
||||||
exec_vector_binary(mach, inst, micro_ishr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_binary(mach, inst, micro_ishr, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_ISLT:
|
case TGSI_OPCODE_ISLT:
|
||||||
exec_vector_binary(mach, inst, micro_islt, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_binary(mach, inst, micro_islt, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_F2U:
|
case TGSI_OPCODE_F2U:
|
||||||
exec_vector_unary(mach, inst, micro_f2u, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_f2u, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_U2F:
|
case TGSI_OPCODE_U2F:
|
||||||
exec_vector_unary(mach, inst, micro_u2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_UINT);
|
exec_vector_unary(mach, inst, micro_u2f, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UADD:
|
case TGSI_OPCODE_UADD:
|
||||||
exec_vector_binary(mach, inst, micro_uadd, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_binary(mach, inst, micro_uadd, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UDIV:
|
case TGSI_OPCODE_UDIV:
|
||||||
exec_vector_binary(mach, inst, micro_udiv, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_udiv, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UMAD:
|
case TGSI_OPCODE_UMAD:
|
||||||
exec_vector_trinary(mach, inst, micro_umad, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_trinary(mach, inst, micro_umad, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UMAX:
|
case TGSI_OPCODE_UMAX:
|
||||||
exec_vector_binary(mach, inst, micro_umax, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_umax, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UMIN:
|
case TGSI_OPCODE_UMIN:
|
||||||
exec_vector_binary(mach, inst, micro_umin, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_umin, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UMOD:
|
case TGSI_OPCODE_UMOD:
|
||||||
exec_vector_binary(mach, inst, micro_umod, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_umod, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UMUL:
|
case TGSI_OPCODE_UMUL:
|
||||||
exec_vector_binary(mach, inst, micro_umul, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_umul, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_IMUL_HI:
|
case TGSI_OPCODE_IMUL_HI:
|
||||||
exec_vector_binary(mach, inst, micro_imul_hi, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_binary(mach, inst, micro_imul_hi, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UMUL_HI:
|
case TGSI_OPCODE_UMUL_HI:
|
||||||
exec_vector_binary(mach, inst, micro_umul_hi, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_umul_hi, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_USEQ:
|
case TGSI_OPCODE_USEQ:
|
||||||
exec_vector_binary(mach, inst, micro_useq, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_useq, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_USGE:
|
case TGSI_OPCODE_USGE:
|
||||||
exec_vector_binary(mach, inst, micro_usge, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_usge, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_USHR:
|
case TGSI_OPCODE_USHR:
|
||||||
exec_vector_binary(mach, inst, micro_ushr, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_ushr, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_USLT:
|
case TGSI_OPCODE_USLT:
|
||||||
exec_vector_binary(mach, inst, micro_uslt, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_uslt, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_USNE:
|
case TGSI_OPCODE_USNE:
|
||||||
exec_vector_binary(mach, inst, micro_usne, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_binary(mach, inst, micro_usne, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_SWITCH:
|
case TGSI_OPCODE_SWITCH:
|
||||||
|
|
@ -5859,7 +5837,7 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UARL:
|
case TGSI_OPCODE_UARL:
|
||||||
exec_vector_unary(mach, inst, micro_uarl, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_UINT);
|
exec_vector_unary(mach, inst, micro_uarl, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_UCMP:
|
case TGSI_OPCODE_UCMP:
|
||||||
|
|
@ -5867,11 +5845,11 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_IABS:
|
case TGSI_OPCODE_IABS:
|
||||||
exec_vector_unary(mach, inst, micro_iabs, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_unary(mach, inst, micro_iabs, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_ISSG:
|
case TGSI_OPCODE_ISSG:
|
||||||
exec_vector_unary(mach, inst, micro_isgn, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_unary(mach, inst, micro_isgn, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_TEX2:
|
case TGSI_OPCODE_TEX2:
|
||||||
|
|
@ -5897,28 +5875,28 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_IBFE:
|
case TGSI_OPCODE_IBFE:
|
||||||
exec_vector_trinary(mach, inst, micro_ibfe, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_trinary(mach, inst, micro_ibfe, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
case TGSI_OPCODE_UBFE:
|
case TGSI_OPCODE_UBFE:
|
||||||
exec_vector_trinary(mach, inst, micro_ubfe, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_trinary(mach, inst, micro_ubfe, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
case TGSI_OPCODE_BFI:
|
case TGSI_OPCODE_BFI:
|
||||||
exec_vector_quaternary(mach, inst, micro_bfi, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_quaternary(mach, inst, micro_bfi, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
case TGSI_OPCODE_BREV:
|
case TGSI_OPCODE_BREV:
|
||||||
exec_vector_unary(mach, inst, micro_brev, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_unary(mach, inst, micro_brev, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
case TGSI_OPCODE_POPC:
|
case TGSI_OPCODE_POPC:
|
||||||
exec_vector_unary(mach, inst, micro_popc, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
|
exec_vector_unary(mach, inst, micro_popc, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
case TGSI_OPCODE_LSB:
|
case TGSI_OPCODE_LSB:
|
||||||
exec_vector_unary(mach, inst, micro_lsb, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_UINT);
|
exec_vector_unary(mach, inst, micro_lsb, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
case TGSI_OPCODE_IMSB:
|
case TGSI_OPCODE_IMSB:
|
||||||
exec_vector_unary(mach, inst, micro_imsb, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
|
exec_vector_unary(mach, inst, micro_imsb, TGSI_EXEC_DATA_INT);
|
||||||
break;
|
break;
|
||||||
case TGSI_OPCODE_UMSB:
|
case TGSI_OPCODE_UMSB:
|
||||||
exec_vector_unary(mach, inst, micro_umsb, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_UINT);
|
exec_vector_unary(mach, inst, micro_umsb, TGSI_EXEC_DATA_UINT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_F2D:
|
case TGSI_OPCODE_F2D:
|
||||||
|
|
@ -5926,7 +5904,7 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_D2F:
|
case TGSI_OPCODE_D2F:
|
||||||
exec_64_2_t(mach, inst, micro_d2f, TGSI_EXEC_DATA_FLOAT);
|
exec_64_2_t(mach, inst, micro_d2f);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_DABS:
|
case TGSI_OPCODE_DABS:
|
||||||
|
|
@ -6006,19 +5984,19 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_I2D:
|
case TGSI_OPCODE_I2D:
|
||||||
exec_t_2_64(mach, inst, micro_i2d, TGSI_EXEC_DATA_INT);
|
exec_t_2_64(mach, inst, micro_i2d, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_D2I:
|
case TGSI_OPCODE_D2I:
|
||||||
exec_64_2_t(mach, inst, micro_d2i, TGSI_EXEC_DATA_INT);
|
exec_64_2_t(mach, inst, micro_d2i);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_U2D:
|
case TGSI_OPCODE_U2D:
|
||||||
exec_t_2_64(mach, inst, micro_u2d, TGSI_EXEC_DATA_UINT);
|
exec_t_2_64(mach, inst, micro_u2d, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_D2U:
|
case TGSI_OPCODE_D2U:
|
||||||
exec_64_2_t(mach, inst, micro_d2u, TGSI_EXEC_DATA_INT);
|
exec_64_2_t(mach, inst, micro_d2u);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_LOAD:
|
case TGSI_OPCODE_LOAD:
|
||||||
|
|
@ -6149,10 +6127,10 @@ exec_instruction(
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_U642F:
|
case TGSI_OPCODE_U642F:
|
||||||
exec_64_2_t(mach, inst, micro_u642f, TGSI_EXEC_DATA_FLOAT);
|
exec_64_2_t(mach, inst, micro_u642f);
|
||||||
break;
|
break;
|
||||||
case TGSI_OPCODE_I642F:
|
case TGSI_OPCODE_I642F:
|
||||||
exec_64_2_t(mach, inst, micro_i642f, TGSI_EXEC_DATA_FLOAT);
|
exec_64_2_t(mach, inst, micro_i642f);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_U642D:
|
case TGSI_OPCODE_U642D:
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue