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radeonsi: don't allow draw calls with uninitialized VS inputs

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These always hang, because vertex buffer descriptors are not set up.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
This commit is contained in:
Marek Olšák 2020-01-07 18:16:59 -05:00
parent c278c73f13
commit 312e04689a
3 changed files with 8 additions and 1 deletions
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1
src/gallium/drivers/radeonsi/si_shader.h
View file

@ -339,6 +339,7 @@ struct si_shader_selector {
bool vs_needs_prolog;
bool force_correct_derivs_after_kill;
bool prim_discard_cs_allowed;
unsigned num_vs_inputs;
unsigned pa_cl_vs_out_cntl;
ubyte clipdist_mask;
ubyte culldist_mask;

4
src/gallium/drivers/radeonsi/si_state_draw.c
View file

@ -1789,7 +1789,9 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
return;
}
if (unlikely(!sctx->vs_shader.cso ||
struct si_shader_selector *vs = sctx->vs_shader.cso;
if (unlikely(!vs ||
sctx->num_vertex_elements < vs->num_vs_inputs ||
(!sctx->ps_shader.cso && !rs->rasterizer_discard) ||
(!!sctx->tes_shader.cso != (prim == PIPE_PRIM_PATCHES)))) {
assert(0);

4
src/gallium/drivers/radeonsi/si_state_shaders.c
View file

@ -2714,6 +2714,10 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
(sel->so.output[i].stream * 4);
}
sel->num_vs_inputs = sel->type == PIPE_SHADER_VERTEX &&
!sel->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD] ?
sel->info.num_inputs : 0;
/* The prolog is a no-op if there are no inputs. */
sel->vs_needs_prolog = sel->type == PIPE_SHADER_VERTEX &&
sel->info.num_inputs &&