freedreno/ir3: switch PIPE_CAP_TGSI_TEXCOORD

We don't really need the varying remapping, and it seems to somehow
happen twice when shader-cache comes into the picture.  But we can
just choose not to have this problem.

Now that everything is using the ir3_point_sprite() helper, we can
flip this pipe cap without it being a massive flag-day.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5595>
This commit is contained in:
Rob Clark 2020-06-21 13:26:57 -07:00 committed by Marge Bot
parent e6d650353a
commit 3065c4bf92
3 changed files with 11 additions and 6 deletions

View file

@ -70,6 +70,7 @@ static const nir_shader_compiler_options options = {
.lower_rotate = true,
.lower_to_scalar = true,
.has_imul24 = true,
.lower_wpos_pntc = true,
};
/* we don't want to lower vertex_id to _zero_based on newer gpus: */
@ -113,6 +114,7 @@ static const nir_shader_compiler_options options_a6xx = {
.lower_to_scalar = true,
.has_imul24 = true,
.max_unroll_iterations = 32,
.lower_wpos_pntc = true,
};
const nir_shader_compiler_options *

View file

@ -390,6 +390,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
case PIPE_CAP_TGSI_TEXCOORD:
if (is_ir3(screen))
return 1;
return 0;

View file

@ -58,13 +58,15 @@ ir3_point_sprite(const struct ir3_shader_variant *fs, int i,
uint32_t sprite_coord_enable, bool *coord_mode)
{
gl_varying_slot slot = fs->inputs[i].slot;
(void)coord_mode; /* this will be used later */
/* since we don't enable PIPE_CAP_TGSI_TEXCOORD: */
if (slot >= VARYING_SLOT_VAR0) {
unsigned texmask = 1 << (slot - VARYING_SLOT_VAR0);
return !!(sprite_coord_enable & texmask);
switch (slot) {
case VARYING_SLOT_PNTC:
*coord_mode = true;
return true;
case VARYING_SLOT_TEX0 ... VARYING_SLOT_TEX7:
return !!(sprite_coord_enable & BITFIELD_BIT(slot - VARYING_SLOT_TEX0));
default:
return false;
}
return false;
}
#endif /* IR3_GALLIUM_H_ */