freedreno/a5xx: Fix alpha test vs early Z bugs.

Just like with discards, we have to disable early Z writes when alpha test
is enabled.

Fixes rendering on HL2, CS: Source, counter-strike, and minetest.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9957>
This commit is contained in:
Eric Anholt 2021-04-01 10:18:01 -07:00 committed by Marge Bot
parent c9fd8c2570
commit 3043940183
2 changed files with 7 additions and 8 deletions

View file

@ -436,7 +436,7 @@ traces:
- device: freedreno-a306
checksum: 9227cc8d4e6445f2323438340f2a5d9b
- device: freedreno-a530
checksum: 7625ffd782f1aa47e50a8d851b363922
checksum: 76fbd196f69594c927dc994b4492dd50
# Note: Obvious alpha test failure on the tree in the upper left. Also a
# big block around the hand that's not present on a530 or radeonsi.
- device: freedreno-a630
@ -504,10 +504,9 @@ traces:
expectations:
- device: freedreno-a306
checksum: b4af9243e34f3de0153b6855dc9c66b6
# Looks like maybe some Z updates before alpha test discards happening
# (trees on the right side). 23 seconds.
- device: freedreno-a530
checksum: 9e691aa0baf3fcb836e2331118c9dfc3
# Flaky rendering (slight pixel differences around the tree alpha tests)
# - device: freedreno-a530
# checksum: 14e78caf29b6a3341081c8f2e678355f
# Looks like some alpha test failures (trees on the right side)
- device: freedreno-a630
checksum: 5a11d791a5a718d4aa6c84b416b9f2b6
@ -518,7 +517,7 @@ traces:
# checksum: 4b707f385256b380c936186db8c251cb
# 1 minute
- device: freedreno-a530
checksum: 6f15685177bd5ab6c0d6a6f056802cf2
checksum: bbe74b2171d62fc6738086740e1aa0d8
# Alpha test failures (fence on the left hand side of road)
- device: freedreno-a630
checksum: 4b707f385256b380c936186db8c251cb
@ -529,7 +528,7 @@ traces:
# checksum: 8f5929c82e7d990e8c3d2bea14688224
# 2 minutes
- device: freedreno-a530
checksum: bfb17944d38c04e7592d20e1c5b00059
checksum: 5def334bb574b024198ddddb1a069529
# Alpha test failures on the fence. Also, the shadows are much lighter
# than a530, but it's unclear which is right.
- device: freedreno-a630

View file

@ -594,7 +594,7 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_RASTERIZER | FD_DIRTY_PROG)) {
struct fd5_zsa_stateobj *zsa = fd5_zsa_stateobj(ctx->zsa);
bool fragz = fp->no_earlyz || fp->has_kill || fp->writes_pos;
bool fragz = fp->no_earlyz || fp->has_kill || zsa->base.alpha_enabled || fp->writes_pos;
OUT_PKT4(ring, REG_A5XX_RB_DEPTH_CNTL, 1);
OUT_RING(ring, zsa->rb_depth_cntl);