fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 13:58:04 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

intel/brw: Rename brw_inst_bits/set_bits to brw_eu_inst_bits/set_bits

Browse source 
Acked-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32643>
This commit is contained in:
Caio Oliveira 2024-12-06 12:48:09 -08:00 • committed by Marge Bot
parent 06ccaad5f1
commit 3031b22a8a
6 changed files with 443 additions and 443 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/intel/compiler/brw_disasm.c
View file

@ -1570,7 +1570,7 @@ imm(FILE *file, const struct brw_isa_info *isa, enum brw_reg_type type,
format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
break;
case BRW_TYPE_VF:
format(file, "0x%"PRIx64"VF", brw_inst_bits(inst, 127, 96));
format(file, "0x%"PRIx64"VF", brw_eu_inst_bits(inst, 127, 96));
pad(file, 48);
format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */",
brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
@ -1585,7 +1585,7 @@ imm(FILE *file, const struct brw_isa_info *isa, enum brw_reg_type type,
/* The DIM instruction's src0 uses an F type but contains a
* 64-bit immediate
*/
format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96));
format(file, "0x%"PRIx64"F", brw_eu_inst_bits(inst, 127, 96));
pad(file, 48);
format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst));
break;

618
src/intel/compiler/brw_eu_compact.c
View file

@ -932,32 +932,32 @@ set_control_index(const struct compaction_state *c,
uint32_t uncompacted; /* 19b/IVB+; 21b/TGL+ */
if (devinfo->ver >= 20) {
uncompacted = (brw_inst_bits(src, 95, 92) << 14) | /* 4b */
(brw_inst_bits(src, 34, 34) << 13) | /* 1b */
(brw_inst_bits(src, 32, 32) << 12) | /* 1b */
(brw_inst_bits(src, 31, 31) << 11) | /* 1b */
(brw_inst_bits(src, 28, 28) << 10) | /* 1b */
(brw_inst_bits(src, 27, 26) << 8) | /* 2b */
(brw_inst_bits(src, 25, 24) << 6) | /* 2b */
(brw_inst_bits(src, 23, 21) << 3) | /* 3b */
(brw_inst_bits(src, 20, 18)); /* 3b */
uncompacted = (brw_eu_inst_bits(src, 95, 92) << 14) | /* 4b */
(brw_eu_inst_bits(src, 34, 34) << 13) | /* 1b */
(brw_eu_inst_bits(src, 32, 32) << 12) | /* 1b */
(brw_eu_inst_bits(src, 31, 31) << 11) | /* 1b */
(brw_eu_inst_bits(src, 28, 28) << 10) | /* 1b */
(brw_eu_inst_bits(src, 27, 26) << 8) | /* 2b */
(brw_eu_inst_bits(src, 25, 24) << 6) | /* 2b */
(brw_eu_inst_bits(src, 23, 21) << 3) | /* 3b */
(brw_eu_inst_bits(src, 20, 18)); /* 3b */
} else if (devinfo->ver >= 12) {
uncompacted = (brw_inst_bits(src, 95, 92) << 17) | /* 4b */
(brw_inst_bits(src, 34, 34) << 16) | /* 1b */
(brw_inst_bits(src, 33, 33) << 15) | /* 1b */
(brw_inst_bits(src, 32, 32) << 14) | /* 1b */
(brw_inst_bits(src, 31, 31) << 13) | /* 1b */
(brw_inst_bits(src, 28, 28) << 12) | /* 1b */
(brw_inst_bits(src, 27, 24) << 8) | /* 4b */
(brw_inst_bits(src, 23, 22) << 6) | /* 2b */
(brw_inst_bits(src, 21, 19) << 3) | /* 3b */
(brw_inst_bits(src, 18, 16)); /* 3b */
uncompacted = (brw_eu_inst_bits(src, 95, 92) << 17) | /* 4b */
(brw_eu_inst_bits(src, 34, 34) << 16) | /* 1b */
(brw_eu_inst_bits(src, 33, 33) << 15) | /* 1b */
(brw_eu_inst_bits(src, 32, 32) << 14) | /* 1b */
(brw_eu_inst_bits(src, 31, 31) << 13) | /* 1b */
(brw_eu_inst_bits(src, 28, 28) << 12) | /* 1b */
(brw_eu_inst_bits(src, 27, 24) << 8) | /* 4b */
(brw_eu_inst_bits(src, 23, 22) << 6) | /* 2b */
(brw_eu_inst_bits(src, 21, 19) << 3) | /* 3b */
(brw_eu_inst_bits(src, 18, 16)); /* 3b */
} else {
uncompacted = (brw_inst_bits(src, 33, 31) << 16) | /* 3b */
(brw_inst_bits(src, 23, 12) << 4) | /* 12b */
(brw_inst_bits(src, 10, 9) << 2) | /* 2b */
(brw_inst_bits(src, 34, 34) << 1) | /* 1b */
(brw_inst_bits(src, 8, 8)); /* 1b */
uncompacted = (brw_eu_inst_bits(src, 33, 31) << 16) | /* 3b */
(brw_eu_inst_bits(src, 23, 12) << 4) | /* 12b */
(brw_eu_inst_bits(src, 10, 9) << 2) | /* 2b */
(brw_eu_inst_bits(src, 34, 34) << 1) | /* 1b */
(brw_eu_inst_bits(src, 8, 8)); /* 1b */
}
for (int i = 0; i < 32; i++) {
@ -978,26 +978,26 @@ set_datatype_index(const struct compaction_state *c, brw_eu_compact_inst *dst,
uint32_t uncompacted; /* 18b/G45+; 21b/BDW+; 20b/TGL+ */
if (devinfo->ver >= 12) {
uncompacted = (brw_inst_bits(src, 91, 88) << 15) | /* 4b */
(brw_inst_bits(src, 66, 66) << 14) | /* 1b */
(brw_inst_bits(src, 50, 50) << 13) | /* 1b */
(brw_inst_bits(src, 49, 48) << 11) | /* 2b */
(brw_inst_bits(src, 47, 47) << 10) | /* 1b */
(brw_inst_bits(src, 46, 46) << 9) | /* 1b */
(brw_inst_bits(src, 43, 40) << 5) | /* 4b */
(brw_inst_bits(src, 39, 36) << 1) | /* 4b */
(brw_inst_bits(src, 35, 35)); /* 1b */
uncompacted = (brw_eu_inst_bits(src, 91, 88) << 15) | /* 4b */
(brw_eu_inst_bits(src, 66, 66) << 14) | /* 1b */
(brw_eu_inst_bits(src, 50, 50) << 13) | /* 1b */
(brw_eu_inst_bits(src, 49, 48) << 11) | /* 2b */
(brw_eu_inst_bits(src, 47, 47) << 10) | /* 1b */
(brw_eu_inst_bits(src, 46, 46) << 9) | /* 1b */
(brw_eu_inst_bits(src, 43, 40) << 5) | /* 4b */
(brw_eu_inst_bits(src, 39, 36) << 1) | /* 4b */
(brw_eu_inst_bits(src, 35, 35)); /* 1b */
/* Src1.RegFile overlaps with the immediate, so ignore it if an immediate
* is present
*/
if (!is_immediate) {
uncompacted |= brw_inst_bits(src, 98, 98) << 19; /* 1b */
uncompacted |= brw_eu_inst_bits(src, 98, 98) << 19; /* 1b */
}
} else {
uncompacted = (brw_inst_bits(src, 63, 61) << 18) | /* 3b */
(brw_inst_bits(src, 94, 89) << 12) | /* 6b */
(brw_inst_bits(src, 46, 35)); /* 12b */
uncompacted = (brw_eu_inst_bits(src, 63, 61) << 18) | /* 3b */
(brw_eu_inst_bits(src, 94, 89) << 12) | /* 6b */
(brw_eu_inst_bits(src, 46, 35)); /* 12b */
}
for (int i = 0; i < 32; i++) {
@ -1020,22 +1020,22 @@ set_subreg_index(const struct compaction_state *c, brw_eu_compact_inst *dst,
uint16_t uncompacted; /* 15b/G45+; 12b/Xe2+ */
if (devinfo->ver >= 20) {
uncompacted = (brw_inst_bits(src, 33, 33) << 0) | /* 1b */
(brw_inst_bits(src, 55, 51) << 1) | /* 5b */
(brw_inst_bits(src, 71, 67) << 6) | /* 5b */
(brw_inst_bits(src, 87, 87) << 11); /* 1b */
uncompacted = (brw_eu_inst_bits(src, 33, 33) << 0) | /* 1b */
(brw_eu_inst_bits(src, 55, 51) << 1) | /* 5b */
(brw_eu_inst_bits(src, 71, 67) << 6) | /* 5b */
(brw_eu_inst_bits(src, 87, 87) << 11); /* 1b */
} else if (devinfo->ver >= 12) {
uncompacted = (brw_inst_bits(src, 55, 51) << 0) | /* 5b */
(brw_inst_bits(src, 71, 67) << 5); /* 5b */
uncompacted = (brw_eu_inst_bits(src, 55, 51) << 0) | /* 5b */
(brw_eu_inst_bits(src, 71, 67) << 5); /* 5b */
if (!is_immediate)
uncompacted |= brw_inst_bits(src, 103, 99) << 10; /* 5b */
uncompacted |= brw_eu_inst_bits(src, 103, 99) << 10; /* 5b */
} else {
uncompacted = (brw_inst_bits(src, 52, 48) << 0) | /* 5b */
(brw_inst_bits(src, 68, 64) << 5); /* 5b */
uncompacted = (brw_eu_inst_bits(src, 52, 48) << 0) | /* 5b */
(brw_eu_inst_bits(src, 68, 64) << 5); /* 5b */
if (!is_immediate)
uncompacted |= brw_inst_bits(src, 100, 96) << 10; /* 5b */
uncompacted |= brw_eu_inst_bits(src, 100, 96) << 10; /* 5b */
}
for (int i = 0; i < table_len; i++) {
@ -1060,15 +1060,15 @@ set_src0_index(const struct compaction_state *c, brw_eu_compact_inst *dst,
table_len = (devinfo->ver >= 20 ? ARRAY_SIZE(xe2_src0_index_table) :
ARRAY_SIZE(gfx12_src0_index_table));
uncompacted = (devinfo->ver >= 20 ? 0 :
brw_inst_bits(src, 87, 87) << 11) | /* 1b */
(brw_inst_bits(src, 86, 84) << 8) | /* 3b */
(brw_inst_bits(src, 83, 81) << 5) | /* 3b */
(brw_inst_bits(src, 80, 80) << 4) | /* 1b */
(brw_inst_bits(src, 65, 64) << 2) | /* 2b */
(brw_inst_bits(src, 45, 44)); /* 2b */
brw_eu_inst_bits(src, 87, 87) << 11) | /* 1b */
(brw_eu_inst_bits(src, 86, 84) << 8) | /* 3b */
(brw_eu_inst_bits(src, 83, 81) << 5) | /* 3b */
(brw_eu_inst_bits(src, 80, 80) << 4) | /* 1b */
(brw_eu_inst_bits(src, 65, 64) << 2) | /* 2b */
(brw_eu_inst_bits(src, 45, 44)); /* 2b */
} else {
table_len = ARRAY_SIZE(gfx8_src_index_table);
uncompacted = brw_inst_bits(src, 88, 77); /* 12b */
uncompacted = brw_eu_inst_bits(src, 88, 77); /* 12b */
}
for (int i = 0; i < table_len; i++) {
@ -1101,22 +1101,22 @@ set_src1_index(const struct compaction_state *c, brw_eu_compact_inst *dst,
if (devinfo->ver >= 20) {
table_len = ARRAY_SIZE(xe2_src1_index_table);
uncompacted = (brw_inst_bits(src, 121, 120) << 14) | /* 2b */
(brw_inst_bits(src, 118, 116) << 11) | /* 3b */
(brw_inst_bits(src, 115, 113) << 8) | /* 3b */
(brw_inst_bits(src, 112, 112) << 7) | /* 1b */
(brw_inst_bits(src, 103, 99) << 2) | /* 5b */
(brw_inst_bits(src, 97, 96)); /* 2b */
uncompacted = (brw_eu_inst_bits(src, 121, 120) << 14) | /* 2b */
(brw_eu_inst_bits(src, 118, 116) << 11) | /* 3b */
(brw_eu_inst_bits(src, 115, 113) << 8) | /* 3b */
(brw_eu_inst_bits(src, 112, 112) << 7) | /* 1b */
(brw_eu_inst_bits(src, 103, 99) << 2) | /* 5b */
(brw_eu_inst_bits(src, 97, 96)); /* 2b */
} else if (devinfo->ver >= 12) {
table_len = ARRAY_SIZE(gfx12_src0_index_table);
uncompacted = (brw_inst_bits(src, 121, 120) << 10) | /* 2b */
(brw_inst_bits(src, 119, 116) << 6) | /* 4b */
(brw_inst_bits(src, 115, 113) << 3) | /* 3b */
(brw_inst_bits(src, 112, 112) << 2) | /* 1b */
(brw_inst_bits(src, 97, 96)); /* 2b */
uncompacted = (brw_eu_inst_bits(src, 121, 120) << 10) | /* 2b */
(brw_eu_inst_bits(src, 119, 116) << 6) | /* 4b */
(brw_eu_inst_bits(src, 115, 113) << 3) | /* 3b */
(brw_eu_inst_bits(src, 112, 112) << 2) | /* 1b */
(brw_eu_inst_bits(src, 97, 96)); /* 2b */
} else {
table_len = ARRAY_SIZE(gfx8_src_index_table);
uncompacted = brw_inst_bits(src, 120, 109); /* 12b */
uncompacted = brw_eu_inst_bits(src, 120, 109); /* 12b */
}
for (int i = 0; i < table_len; i++) {
@ -1136,25 +1136,25 @@ set_3src_control_index(const struct intel_device_info *devinfo,
bool is_dpas)
{
if (devinfo->ver >= 20) {
assert(is_dpas || !brw_inst_bits(src, 49, 49));
assert(is_dpas || !brw_eu_inst_bits(src, 49, 49));
const uint64_t uncompacted = /* 34b/Xe2+ */
(brw_inst_bits(src, 95, 92) << 30) | /* 4b */
(brw_inst_bits(src, 90, 88) << 27) | /* 3b */
(brw_inst_bits(src, 82, 80) << 24) | /* 3b */
(brw_inst_bits(src, 50, 50) << 23) | /* 1b */
(brw_inst_bits(src, 49, 48) << 21) | /* 2b */
(brw_inst_bits(src, 42, 40) << 18) | /* 3b */
(brw_inst_bits(src, 39, 39) << 17) | /* 1b */
(brw_inst_bits(src, 38, 36) << 14) | /* 3b */
(brw_inst_bits(src, 34, 34) << 13) | /* 1b */
(brw_inst_bits(src, 32, 32) << 12) | /* 1b */
(brw_inst_bits(src, 31, 31) << 11) | /* 1b */
(brw_inst_bits(src, 28, 28) << 10) | /* 1b */
(brw_inst_bits(src, 27, 26) << 8) | /* 2b */
(brw_inst_bits(src, 25, 24) << 6) | /* 2b */
(brw_inst_bits(src, 23, 21) << 3) | /* 3b */
(brw_inst_bits(src, 20, 18)); /* 3b */
(brw_eu_inst_bits(src, 95, 92) << 30) | /* 4b */
(brw_eu_inst_bits(src, 90, 88) << 27) | /* 3b */
(brw_eu_inst_bits(src, 82, 80) << 24) | /* 3b */
(brw_eu_inst_bits(src, 50, 50) << 23) | /* 1b */
(brw_eu_inst_bits(src, 49, 48) << 21) | /* 2b */
(brw_eu_inst_bits(src, 42, 40) << 18) | /* 3b */
(brw_eu_inst_bits(src, 39, 39) << 17) | /* 1b */
(brw_eu_inst_bits(src, 38, 36) << 14) | /* 3b */
(brw_eu_inst_bits(src, 34, 34) << 13) | /* 1b */
(brw_eu_inst_bits(src, 32, 32) << 12) | /* 1b */
(brw_eu_inst_bits(src, 31, 31) << 11) | /* 1b */
(brw_eu_inst_bits(src, 28, 28) << 10) | /* 1b */
(brw_eu_inst_bits(src, 27, 26) << 8) | /* 2b */
(brw_eu_inst_bits(src, 25, 24) << 6) | /* 2b */
(brw_eu_inst_bits(src, 23, 21) << 3) | /* 3b */
(brw_eu_inst_bits(src, 20, 18)); /* 3b */
/* The bits used to index the tables for 3src and 3src-dpas
* are the same, so just need to pick the right one.
@ -1171,24 +1171,24 @@ set_3src_control_index(const struct intel_device_info *devinfo,
}
} else if (devinfo->verx10 >= 125) {
uint64_t uncompacted = /* 37b/XeHP+ */
(brw_inst_bits(src, 95, 92) << 33) | /* 4b */
(brw_inst_bits(src, 90, 88) << 30) | /* 3b */
(brw_inst_bits(src, 82, 80) << 27) | /* 3b */
(brw_inst_bits(src, 50, 50) << 26) | /* 1b */
(brw_inst_bits(src, 49, 48) << 24) | /* 2b */
(brw_inst_bits(src, 42, 40) << 21) | /* 3b */
(brw_inst_bits(src, 39, 39) << 20) | /* 1b */
(brw_inst_bits(src, 38, 36) << 17) | /* 3b */
(brw_inst_bits(src, 34, 34) << 16) | /* 1b */
(brw_inst_bits(src, 33, 33) << 15) | /* 1b */
(brw_inst_bits(src, 32, 32) << 14) | /* 1b */
(brw_inst_bits(src, 31, 31) << 13) | /* 1b */
(brw_inst_bits(src, 28, 28) << 12) | /* 1b */
(brw_inst_bits(src, 27, 24) << 8) | /* 4b */
(brw_inst_bits(src, 23, 23) << 7) | /* 1b */
(brw_inst_bits(src, 22, 22) << 6) | /* 1b */
(brw_inst_bits(src, 21, 19) << 3) | /* 3b */
(brw_inst_bits(src, 18, 16)); /* 3b */
(brw_eu_inst_bits(src, 95, 92) << 33) | /* 4b */
(brw_eu_inst_bits(src, 90, 88) << 30) | /* 3b */
(brw_eu_inst_bits(src, 82, 80) << 27) | /* 3b */
(brw_eu_inst_bits(src, 50, 50) << 26) | /* 1b */
(brw_eu_inst_bits(src, 49, 48) << 24) | /* 2b */
(brw_eu_inst_bits(src, 42, 40) << 21) | /* 3b */
(brw_eu_inst_bits(src, 39, 39) << 20) | /* 1b */
(brw_eu_inst_bits(src, 38, 36) << 17) | /* 3b */
(brw_eu_inst_bits(src, 34, 34) << 16) | /* 1b */
(brw_eu_inst_bits(src, 33, 33) << 15) | /* 1b */
(brw_eu_inst_bits(src, 32, 32) << 14) | /* 1b */
(brw_eu_inst_bits(src, 31, 31) << 13) | /* 1b */
(brw_eu_inst_bits(src, 28, 28) << 12) | /* 1b */
(brw_eu_inst_bits(src, 27, 24) << 8) | /* 4b */
(brw_eu_inst_bits(src, 23, 23) << 7) | /* 1b */
(brw_eu_inst_bits(src, 22, 22) << 6) | /* 1b */
(brw_eu_inst_bits(src, 21, 19) << 3) | /* 3b */
(brw_eu_inst_bits(src, 18, 16)); /* 3b */
for (unsigned i = 0; i < ARRAY_SIZE(xehp_3src_control_index_table); i++) {
if (xehp_3src_control_index_table[i] == uncompacted) {
@ -1198,24 +1198,24 @@ set_3src_control_index(const struct intel_device_info *devinfo,
}
} else if (devinfo->ver >= 12) {
uint64_t uncompacted = /* 36b/TGL+ */
(brw_inst_bits(src, 95, 92) << 32) | /* 4b */
(brw_inst_bits(src, 90, 88) << 29) | /* 3b */
(brw_inst_bits(src, 82, 80) << 26) | /* 3b */
(brw_inst_bits(src, 50, 50) << 25) | /* 1b */
(brw_inst_bits(src, 48, 48) << 24) | /* 1b */
(brw_inst_bits(src, 42, 40) << 21) | /* 3b */
(brw_inst_bits(src, 39, 39) << 20) | /* 1b */
(brw_inst_bits(src, 38, 36) << 17) | /* 3b */
(brw_inst_bits(src, 34, 34) << 16) | /* 1b */
(brw_inst_bits(src, 33, 33) << 15) | /* 1b */
(brw_inst_bits(src, 32, 32) << 14) | /* 1b */
(brw_inst_bits(src, 31, 31) << 13) | /* 1b */
(brw_inst_bits(src, 28, 28) << 12) | /* 1b */
(brw_inst_bits(src, 27, 24) << 8) | /* 4b */
(brw_inst_bits(src, 23, 23) << 7) | /* 1b */
(brw_inst_bits(src, 22, 22) << 6) | /* 1b */
(brw_inst_bits(src, 21, 19) << 3) | /* 3b */
(brw_inst_bits(src, 18, 16)); /* 3b */
(brw_eu_inst_bits(src, 95, 92) << 32) | /* 4b */
(brw_eu_inst_bits(src, 90, 88) << 29) | /* 3b */
(brw_eu_inst_bits(src, 82, 80) << 26) | /* 3b */
(brw_eu_inst_bits(src, 50, 50) << 25) | /* 1b */
(brw_eu_inst_bits(src, 48, 48) << 24) | /* 1b */
(brw_eu_inst_bits(src, 42, 40) << 21) | /* 3b */
(brw_eu_inst_bits(src, 39, 39) << 20) | /* 1b */
(brw_eu_inst_bits(src, 38, 36) << 17) | /* 3b */
(brw_eu_inst_bits(src, 34, 34) << 16) | /* 1b */
(brw_eu_inst_bits(src, 33, 33) << 15) | /* 1b */
(brw_eu_inst_bits(src, 32, 32) << 14) | /* 1b */
(brw_eu_inst_bits(src, 31, 31) << 13) | /* 1b */
(brw_eu_inst_bits(src, 28, 28) << 12) | /* 1b */
(brw_eu_inst_bits(src, 27, 24) << 8) | /* 4b */
(brw_eu_inst_bits(src, 23, 23) << 7) | /* 1b */
(brw_eu_inst_bits(src, 22, 22) << 6) | /* 1b */
(brw_eu_inst_bits(src, 21, 19) << 3) | /* 3b */
(brw_eu_inst_bits(src, 18, 16)); /* 3b */
for (unsigned i = 0; i < ARRAY_SIZE(gfx12_3src_control_index_table); i++) {
if (gfx12_3src_control_index_table[i] == uncompacted) {
@ -1225,9 +1225,9 @@ set_3src_control_index(const struct intel_device_info *devinfo,
}
} else {
uint32_t uncompacted = /* 26b/SKL+ */
(brw_inst_bits(src, 36, 35) << 24) | /* 2b */
(brw_inst_bits(src, 34, 32) << 21) | /* 3b */
(brw_inst_bits(src, 28, 8)); /* 21b */
(brw_eu_inst_bits(src, 36, 35) << 24) | /* 2b */
(brw_eu_inst_bits(src, 34, 32) << 21) | /* 3b */
(brw_eu_inst_bits(src, 28, 8)); /* 21b */
for (unsigned i = 0; i < ARRAY_SIZE(gfx8_3src_control_index_table); i++) {
if (gfx8_3src_control_index_table[i] == uncompacted) {
@ -1247,21 +1247,21 @@ set_3src_source_index(const struct intel_device_info *devinfo,
{
if (devinfo->ver >= 12) {
uint32_t uncompacted = /* 21b/TGL+ */
(brw_inst_bits(src, 114, 114) << 20) | /* 1b */
(brw_inst_bits(src, 113, 112) << 18) | /* 2b */
(brw_inst_bits(src, 98, 98) << 17) | /* 1b */
(brw_inst_bits(src, 97, 96) << 15) | /* 2b */
(brw_inst_bits(src, 91, 91) << 14) | /* 1b */
(brw_inst_bits(src, 87, 86) << 12) | /* 2b */
(brw_inst_bits(src, 85, 84) << 10) | /* 2b */
(brw_inst_bits(src, 83, 83) << 9) | /* 1b */
(brw_inst_bits(src, 66, 66) << 8) | /* 1b */
(brw_inst_bits(src, 65, 64) << 6) | /* 2b */
(brw_inst_bits(src, 47, 47) << 5) | /* 1b */
(brw_inst_bits(src, 46, 46) << 4) | /* 1b */
(brw_inst_bits(src, 45, 44) << 2) | /* 2b */
(brw_inst_bits(src, 43, 43) << 1) | /* 1b */
(brw_inst_bits(src, 35, 35)); /* 1b */
(brw_eu_inst_bits(src, 114, 114) << 20) | /* 1b */
(brw_eu_inst_bits(src, 113, 112) << 18) | /* 2b */
(brw_eu_inst_bits(src, 98, 98) << 17) | /* 1b */
(brw_eu_inst_bits(src, 97, 96) << 15) | /* 2b */
(brw_eu_inst_bits(src, 91, 91) << 14) | /* 1b */
(brw_eu_inst_bits(src, 87, 86) << 12) | /* 2b */
(brw_eu_inst_bits(src, 85, 84) << 10) | /* 2b */
(brw_eu_inst_bits(src, 83, 83) << 9) | /* 1b */
(brw_eu_inst_bits(src, 66, 66) << 8) | /* 1b */
(brw_eu_inst_bits(src, 65, 64) << 6) | /* 2b */
(brw_eu_inst_bits(src, 47, 47) << 5) | /* 1b */
(brw_eu_inst_bits(src, 46, 46) << 4) | /* 1b */
(brw_eu_inst_bits(src, 45, 44) << 2) | /* 2b */
(brw_eu_inst_bits(src, 43, 43) << 1) | /* 1b */
(brw_eu_inst_bits(src, 35, 35)); /* 1b */
/* In Xe2, the bits used to index the tables for 3src and 3src-dpas
* are the same, so just need to pick the right one.
@ -1285,14 +1285,14 @@ set_3src_source_index(const struct intel_device_info *devinfo,
}
} else {
uint64_t uncompacted = /* 49b/SKL+ */
(brw_inst_bits(src, 126, 125) << 47) | /* 2b */
(brw_inst_bits(src, 105, 104) << 45) | /* 2b */
(brw_inst_bits(src, 84, 84) << 44) | /* 1b */
(brw_inst_bits(src, 83, 83) << 43) | /* 1b */
(brw_inst_bits(src, 114, 107) << 35) | /* 8b */
(brw_inst_bits(src, 93, 86) << 27) | /* 8b */
(brw_inst_bits(src, 72, 65) << 19) | /* 8b */
(brw_inst_bits(src, 55, 37)); /* 19b */
(brw_eu_inst_bits(src, 126, 125) << 47) | /* 2b */
(brw_eu_inst_bits(src, 105, 104) << 45) | /* 2b */
(brw_eu_inst_bits(src, 84, 84) << 44) | /* 1b */
(brw_eu_inst_bits(src, 83, 83) << 43) | /* 1b */
(brw_eu_inst_bits(src, 114, 107) << 35) | /* 8b */
(brw_eu_inst_bits(src, 93, 86) << 27) | /* 8b */
(brw_eu_inst_bits(src, 72, 65) << 19) | /* 8b */
(brw_eu_inst_bits(src, 55, 37)); /* 19b */
for (unsigned i = 0; i < ARRAY_SIZE(gfx8_3src_source_index_table); i++) {
if (gfx8_3src_source_index_table[i] == uncompacted) {
@ -1312,10 +1312,10 @@ set_3src_subreg_index(const struct intel_device_info *devinfo,
assert(devinfo->ver >= 12);
uint32_t uncompacted = /* 20b/TGL+ */
(brw_inst_bits(src, 119, 115) << 15) | /* 5b */
(brw_inst_bits(src, 103, 99) << 10) | /* 5b */
(brw_inst_bits(src, 71, 67) << 5) | /* 5b */
(brw_inst_bits(src, 55, 51)); /* 5b */
(brw_eu_inst_bits(src, 119, 115) << 15) | /* 5b */
(brw_eu_inst_bits(src, 103, 99) << 10) | /* 5b */
(brw_eu_inst_bits(src, 71, 67) << 5) | /* 5b */
(brw_eu_inst_bits(src, 55, 51)); /* 5b */
const uint32_t *table = devinfo->ver >= 20 ? xe2_3src_subreg_table :
gfx12_3src_subreg_table;
@ -1354,13 +1354,13 @@ has_unmapped_bits(const struct brw_isa_info *isa, const brw_eu_inst *src)
* - UIP[31] (bit 95 on Gfx8)
*/
if (devinfo->ver >= 12) {
assert(!brw_inst_bits(src, 7, 7));
assert(!brw_eu_inst_bits(src, 7, 7));
return false;
} else {
assert(!brw_inst_bits(src, 7, 7));
return brw_inst_bits(src, 95, 95) ||
brw_inst_bits(src, 47, 47) ||
brw_inst_bits(src, 11, 11);
assert(!brw_eu_inst_bits(src, 7, 7));
return brw_eu_inst_bits(src, 95, 95) ||
brw_eu_inst_bits(src, 47, 47) ||
brw_eu_inst_bits(src, 11, 11);
}
}
@ -1373,15 +1373,15 @@ has_3src_unmapped_bits(const struct intel_device_info *devinfo,
* bits currently.
*/
if (devinfo->ver >= 20) {
assert(is_dpas || !brw_inst_bits(src, 49, 49));
assert(!brw_inst_bits(src, 33, 33));
assert(!brw_inst_bits(src, 7, 7));
assert(is_dpas || !brw_eu_inst_bits(src, 49, 49));
assert(!brw_eu_inst_bits(src, 33, 33));
assert(!brw_eu_inst_bits(src, 7, 7));
} else if (devinfo->ver >= 12) {
assert(is_dpas || !brw_inst_bits(src, 49, 49));
assert(!brw_inst_bits(src, 7, 7));
assert(is_dpas || !brw_eu_inst_bits(src, 49, 49));
assert(!brw_eu_inst_bits(src, 7, 7));
} else {
assert(!brw_inst_bits(src, 127, 127) &&
!brw_inst_bits(src, 7, 7));
assert(!brw_eu_inst_bits(src, 127, 127) &&
!brw_eu_inst_bits(src, 7, 7));
}
return false;
@ -1806,32 +1806,32 @@ set_uncompacted_control(const struct compaction_state *c, brw_eu_inst *dst,
c->control_index_table[brw_compact_inst_control_index(devinfo, src)];
if (devinfo->ver >= 20) {
brw_inst_set_bits(dst, 95, 92, (uncompacted >> 14) & 0xf);
brw_inst_set_bits(dst, 34, 34, (uncompacted >> 13) & 0x1);
brw_inst_set_bits(dst, 32, 32, (uncompacted >> 12) & 0x1);
brw_inst_set_bits(dst, 31, 31, (uncompacted >> 11) & 0x1);
brw_inst_set_bits(dst, 28, 28, (uncompacted >> 10) & 0x1);
brw_inst_set_bits(dst, 27, 26, (uncompacted >> 8) & 0x3);
brw_inst_set_bits(dst, 25, 24, (uncompacted >> 6) & 0x3);
brw_inst_set_bits(dst, 23, 21, (uncompacted >> 3) & 0x7);
brw_inst_set_bits(dst, 20, 18, (uncompacted >> 0) & 0x7);
brw_eu_inst_set_bits(dst, 95, 92, (uncompacted >> 14) & 0xf);
brw_eu_inst_set_bits(dst, 34, 34, (uncompacted >> 13) & 0x1);
brw_eu_inst_set_bits(dst, 32, 32, (uncompacted >> 12) & 0x1);
brw_eu_inst_set_bits(dst, 31, 31, (uncompacted >> 11) & 0x1);
brw_eu_inst_set_bits(dst, 28, 28, (uncompacted >> 10) & 0x1);
brw_eu_inst_set_bits(dst, 27, 26, (uncompacted >> 8) & 0x3);
brw_eu_inst_set_bits(dst, 25, 24, (uncompacted >> 6) & 0x3);
brw_eu_inst_set_bits(dst, 23, 21, (uncompacted >> 3) & 0x7);
brw_eu_inst_set_bits(dst, 20, 18, (uncompacted >> 0) & 0x7);
} else if (devinfo->ver >= 12) {
brw_inst_set_bits(dst, 95, 92, (uncompacted >> 17));
brw_inst_set_bits(dst, 34, 34, (uncompacted >> 16) & 0x1);
brw_inst_set_bits(dst, 33, 33, (uncompacted >> 15) & 0x1);
brw_inst_set_bits(dst, 32, 32, (uncompacted >> 14) & 0x1);
brw_inst_set_bits(dst, 31, 31, (uncompacted >> 13) & 0x1);
brw_inst_set_bits(dst, 28, 28, (uncompacted >> 12) & 0x1);
brw_inst_set_bits(dst, 27, 24, (uncompacted >> 8) & 0xf);
brw_inst_set_bits(dst, 23, 22, (uncompacted >> 6) & 0x3);
brw_inst_set_bits(dst, 21, 19, (uncompacted >> 3) & 0x7);
brw_inst_set_bits(dst, 18, 16, (uncompacted >> 0) & 0x7);
brw_eu_inst_set_bits(dst, 95, 92, (uncompacted >> 17));
brw_eu_inst_set_bits(dst, 34, 34, (uncompacted >> 16) & 0x1);
brw_eu_inst_set_bits(dst, 33, 33, (uncompacted >> 15) & 0x1);
brw_eu_inst_set_bits(dst, 32, 32, (uncompacted >> 14) & 0x1);
brw_eu_inst_set_bits(dst, 31, 31, (uncompacted >> 13) & 0x1);
brw_eu_inst_set_bits(dst, 28, 28, (uncompacted >> 12) & 0x1);
brw_eu_inst_set_bits(dst, 27, 24, (uncompacted >> 8) & 0xf);
brw_eu_inst_set_bits(dst, 23, 22, (uncompacted >> 6) & 0x3);
brw_eu_inst_set_bits(dst, 21, 19, (uncompacted >> 3) & 0x7);
brw_eu_inst_set_bits(dst, 18, 16, (uncompacted >> 0) & 0x7);
} else {
brw_inst_set_bits(dst, 33, 31, (uncompacted >> 16));
brw_inst_set_bits(dst, 23, 12, (uncompacted >> 4) & 0xfff);
brw_inst_set_bits(dst, 10, 9, (uncompacted >> 2) & 0x3);
brw_inst_set_bits(dst, 34, 34, (uncompacted >> 1) & 0x1);
brw_inst_set_bits(dst, 8, 8, (uncompacted >> 0) & 0x1);
brw_eu_inst_set_bits(dst, 33, 31, (uncompacted >> 16));
brw_eu_inst_set_bits(dst, 23, 12, (uncompacted >> 4) & 0xfff);
brw_eu_inst_set_bits(dst, 10, 9, (uncompacted >> 2) & 0x3);
brw_eu_inst_set_bits(dst, 34, 34, (uncompacted >> 1) & 0x1);
brw_eu_inst_set_bits(dst, 8, 8, (uncompacted >> 0) & 0x1);
}
}
@ -1844,20 +1844,20 @@ set_uncompacted_datatype(const struct compaction_state *c, brw_eu_inst *dst,
c->datatype_table[brw_compact_inst_datatype_index(devinfo, src)];
if (devinfo->ver >= 12) {
brw_inst_set_bits(dst, 98, 98, (uncompacted >> 19));
brw_inst_set_bits(dst, 91, 88, (uncompacted >> 15) & 0xf);
brw_inst_set_bits(dst, 66, 66, (uncompacted >> 14) & 0x1);
brw_inst_set_bits(dst, 50, 50, (uncompacted >> 13) & 0x1);
brw_inst_set_bits(dst, 49, 48, (uncompacted >> 11) & 0x3);
brw_inst_set_bits(dst, 47, 47, (uncompacted >> 10) & 0x1);
brw_inst_set_bits(dst, 46, 46, (uncompacted >> 9) & 0x1);
brw_inst_set_bits(dst, 43, 40, (uncompacted >> 5) & 0xf);
brw_inst_set_bits(dst, 39, 36, (uncompacted >> 1) & 0xf);
brw_inst_set_bits(dst, 35, 35, (uncompacted >> 0) & 0x1);
brw_eu_inst_set_bits(dst, 98, 98, (uncompacted >> 19));
brw_eu_inst_set_bits(dst, 91, 88, (uncompacted >> 15) & 0xf);
brw_eu_inst_set_bits(dst, 66, 66, (uncompacted >> 14) & 0x1);
brw_eu_inst_set_bits(dst, 50, 50, (uncompacted >> 13) & 0x1);
brw_eu_inst_set_bits(dst, 49, 48, (uncompacted >> 11) & 0x3);
brw_eu_inst_set_bits(dst, 47, 47, (uncompacted >> 10) & 0x1);
brw_eu_inst_set_bits(dst, 46, 46, (uncompacted >> 9) & 0x1);
brw_eu_inst_set_bits(dst, 43, 40, (uncompacted >> 5) & 0xf);
brw_eu_inst_set_bits(dst, 39, 36, (uncompacted >> 1) & 0xf);
brw_eu_inst_set_bits(dst, 35, 35, (uncompacted >> 0) & 0x1);
} else {
brw_inst_set_bits(dst, 63, 61, (uncompacted >> 18));
brw_inst_set_bits(dst, 94, 89, (uncompacted >> 12) & 0x3f);
brw_inst_set_bits(dst, 46, 35, (uncompacted >> 0) & 0xfff);
brw_eu_inst_set_bits(dst, 63, 61, (uncompacted >> 18));
brw_eu_inst_set_bits(dst, 94, 89, (uncompacted >> 12) & 0x3f);
brw_eu_inst_set_bits(dst, 46, 35, (uncompacted >> 0) & 0xfff);
}
}
@ -1870,18 +1870,18 @@ set_uncompacted_subreg(const struct compaction_state *c, brw_eu_inst *dst,
c->subreg_table[brw_compact_inst_subreg_index(devinfo, src)];
if (devinfo->ver >= 20) {
brw_inst_set_bits(dst, 33, 33, (uncompacted >> 0) & 0x1);
brw_inst_set_bits(dst, 55, 51, (uncompacted >> 1) & 0x1f);
brw_inst_set_bits(dst, 71, 67, (uncompacted >> 6) & 0x1f);
brw_inst_set_bits(dst, 87, 87, (uncompacted >> 11) & 0x1);
brw_eu_inst_set_bits(dst, 33, 33, (uncompacted >> 0) & 0x1);
brw_eu_inst_set_bits(dst, 55, 51, (uncompacted >> 1) & 0x1f);
brw_eu_inst_set_bits(dst, 71, 67, (uncompacted >> 6) & 0x1f);
brw_eu_inst_set_bits(dst, 87, 87, (uncompacted >> 11) & 0x1);
} else if (devinfo->ver >= 12) {
brw_inst_set_bits(dst, 103, 99, (uncompacted >> 10));
brw_inst_set_bits(dst, 71, 67, (uncompacted >> 5) & 0x1f);
brw_inst_set_bits(dst, 55, 51, (uncompacted >> 0) & 0x1f);
brw_eu_inst_set_bits(dst, 103, 99, (uncompacted >> 10));
brw_eu_inst_set_bits(dst, 71, 67, (uncompacted >> 5) & 0x1f);
brw_eu_inst_set_bits(dst, 55, 51, (uncompacted >> 0) & 0x1f);
} else {
brw_inst_set_bits(dst, 100, 96, (uncompacted >> 10));
brw_inst_set_bits(dst, 68, 64, (uncompacted >> 5) & 0x1f);
brw_inst_set_bits(dst, 52, 48, (uncompacted >> 0) & 0x1f);
brw_eu_inst_set_bits(dst, 100, 96, (uncompacted >> 10));
brw_eu_inst_set_bits(dst, 68, 64, (uncompacted >> 5) & 0x1f);
brw_eu_inst_set_bits(dst, 52, 48, (uncompacted >> 0) & 0x1f);
}
}
@ -1895,14 +1895,14 @@ set_uncompacted_src0(const struct compaction_state *c, brw_eu_inst *dst,
if (devinfo->ver >= 12) {
if (devinfo->ver < 20)
brw_inst_set_bits(dst, 87, 87, (uncompacted >> 11) & 0x1);
brw_inst_set_bits(dst, 86, 84, (uncompacted >> 8) & 0x7);
brw_inst_set_bits(dst, 83, 81, (uncompacted >> 5) & 0x7);
brw_inst_set_bits(dst, 80, 80, (uncompacted >> 4) & 0x1);
brw_inst_set_bits(dst, 65, 64, (uncompacted >> 2) & 0x3);
brw_inst_set_bits(dst, 45, 44, (uncompacted >> 0) & 0x3);
brw_eu_inst_set_bits(dst, 87, 87, (uncompacted >> 11) & 0x1);
brw_eu_inst_set_bits(dst, 86, 84, (uncompacted >> 8) & 0x7);
brw_eu_inst_set_bits(dst, 83, 81, (uncompacted >> 5) & 0x7);
brw_eu_inst_set_bits(dst, 80, 80, (uncompacted >> 4) & 0x1);
brw_eu_inst_set_bits(dst, 65, 64, (uncompacted >> 2) & 0x3);
brw_eu_inst_set_bits(dst, 45, 44, (uncompacted >> 0) & 0x3);
} else {
brw_inst_set_bits(dst, 88, 77, uncompacted);
brw_eu_inst_set_bits(dst, 88, 77, uncompacted);
}
}
@ -1915,20 +1915,20 @@ set_uncompacted_src1(const struct compaction_state *c, brw_eu_inst *dst,
c->src1_index_table[brw_compact_inst_src1_index(devinfo, src)];
if (devinfo->ver >= 20) {
brw_inst_set_bits(dst, 121, 120, (uncompacted >> 14) & 0x3);
brw_inst_set_bits(dst, 118, 116, (uncompacted >> 11) & 0x7);
brw_inst_set_bits(dst, 115, 113, (uncompacted >> 8) & 0x7);
brw_inst_set_bits(dst, 112, 112, (uncompacted >> 7) & 0x1);
brw_inst_set_bits(dst, 103, 99, (uncompacted >> 2) & 0x1f);
brw_inst_set_bits(dst, 97, 96, (uncompacted >> 0) & 0x3);
brw_eu_inst_set_bits(dst, 121, 120, (uncompacted >> 14) & 0x3);
brw_eu_inst_set_bits(dst, 118, 116, (uncompacted >> 11) & 0x7);
brw_eu_inst_set_bits(dst, 115, 113, (uncompacted >> 8) & 0x7);
brw_eu_inst_set_bits(dst, 112, 112, (uncompacted >> 7) & 0x1);
brw_eu_inst_set_bits(dst, 103, 99, (uncompacted >> 2) & 0x1f);
brw_eu_inst_set_bits(dst, 97, 96, (uncompacted >> 0) & 0x3);
} else if (devinfo->ver >= 12) {
brw_inst_set_bits(dst, 121, 120, (uncompacted >> 10));
brw_inst_set_bits(dst, 119, 116, (uncompacted >> 6) & 0xf);
brw_inst_set_bits(dst, 115, 113, (uncompacted >> 3) & 0x7);
brw_inst_set_bits(dst, 112, 112, (uncompacted >> 2) & 0x1);
brw_inst_set_bits(dst, 97, 96, (uncompacted >> 0) & 0x3);
brw_eu_inst_set_bits(dst, 121, 120, (uncompacted >> 10));
brw_eu_inst_set_bits(dst, 119, 116, (uncompacted >> 6) & 0xf);
brw_eu_inst_set_bits(dst, 115, 113, (uncompacted >> 3) & 0x7);
brw_eu_inst_set_bits(dst, 112, 112, (uncompacted >> 2) & 0x1);
brw_eu_inst_set_bits(dst, 97, 96, (uncompacted >> 0) & 0x3);
} else {
brw_inst_set_bits(dst, 120, 109, uncompacted);
brw_eu_inst_set_bits(dst, 120, 109, uncompacted);
}
}
@ -1944,76 +1944,76 @@ set_uncompacted_3src_control_index(const struct compaction_state *c,
uint64_t uncompacted = is_dpas ? xe2_3src_dpas_control_index_table[compacted] :
xe2_3src_control_index_table[compacted];
brw_inst_set_bits(dst, 95, 92, (uncompacted >> 30) & 0xf);
brw_inst_set_bits(dst, 90, 88, (uncompacted >> 27) & 0x7);
brw_inst_set_bits(dst, 82, 80, (uncompacted >> 24) & 0x7);
brw_inst_set_bits(dst, 50, 50, (uncompacted >> 23) & 0x1);
brw_inst_set_bits(dst, 49, 48, (uncompacted >> 21) & 0x3);
brw_inst_set_bits(dst, 42, 40, (uncompacted >> 18) & 0x7);
brw_inst_set_bits(dst, 39, 39, (uncompacted >> 17) & 0x1);
brw_inst_set_bits(dst, 38, 36, (uncompacted >> 14) & 0x7);
brw_inst_set_bits(dst, 34, 34, (uncompacted >> 13) & 0x1);
brw_inst_set_bits(dst, 32, 32, (uncompacted >> 12) & 0x1);
brw_inst_set_bits(dst, 31, 31, (uncompacted >> 11) & 0x1);
brw_inst_set_bits(dst, 28, 28, (uncompacted >> 10) & 0x1);
brw_inst_set_bits(dst, 27, 26, (uncompacted >> 8) & 0x3);
brw_inst_set_bits(dst, 25, 24, (uncompacted >> 6) & 0x3);
brw_inst_set_bits(dst, 23, 21, (uncompacted >> 3) & 0x7);
brw_inst_set_bits(dst, 20, 18, (uncompacted >> 0) & 0x7);
brw_eu_inst_set_bits(dst, 95, 92, (uncompacted >> 30) & 0xf);
brw_eu_inst_set_bits(dst, 90, 88, (uncompacted >> 27) & 0x7);
brw_eu_inst_set_bits(dst, 82, 80, (uncompacted >> 24) & 0x7);
brw_eu_inst_set_bits(dst, 50, 50, (uncompacted >> 23) & 0x1);
brw_eu_inst_set_bits(dst, 49, 48, (uncompacted >> 21) & 0x3);
brw_eu_inst_set_bits(dst, 42, 40, (uncompacted >> 18) & 0x7);
brw_eu_inst_set_bits(dst, 39, 39, (uncompacted >> 17) & 0x1);
brw_eu_inst_set_bits(dst, 38, 36, (uncompacted >> 14) & 0x7);
brw_eu_inst_set_bits(dst, 34, 34, (uncompacted >> 13) & 0x1);
brw_eu_inst_set_bits(dst, 32, 32, (uncompacted >> 12) & 0x1);
brw_eu_inst_set_bits(dst, 31, 31, (uncompacted >> 11) & 0x1);
brw_eu_inst_set_bits(dst, 28, 28, (uncompacted >> 10) & 0x1);
brw_eu_inst_set_bits(dst, 27, 26, (uncompacted >> 8) & 0x3);
brw_eu_inst_set_bits(dst, 25, 24, (uncompacted >> 6) & 0x3);
brw_eu_inst_set_bits(dst, 23, 21, (uncompacted >> 3) & 0x7);
brw_eu_inst_set_bits(dst, 20, 18, (uncompacted >> 0) & 0x7);
} else if (devinfo->verx10 >= 125) {
uint64_t compacted = brw_compact_inst_3src_control_index(devinfo, src);
uint64_t uncompacted = xehp_3src_control_index_table[compacted];
brw_inst_set_bits(dst, 95, 92, (uncompacted >> 33));
brw_inst_set_bits(dst, 90, 88, (uncompacted >> 30) & 0x7);
brw_inst_set_bits(dst, 82, 80, (uncompacted >> 27) & 0x7);
brw_inst_set_bits(dst, 50, 50, (uncompacted >> 26) & 0x1);
brw_inst_set_bits(dst, 49, 48, (uncompacted >> 24) & 0x3);
brw_inst_set_bits(dst, 42, 40, (uncompacted >> 21) & 0x7);
brw_inst_set_bits(dst, 39, 39, (uncompacted >> 20) & 0x1);
brw_inst_set_bits(dst, 38, 36, (uncompacted >> 17) & 0x7);
brw_inst_set_bits(dst, 34, 34, (uncompacted >> 16) & 0x1);
brw_inst_set_bits(dst, 33, 33, (uncompacted >> 15) & 0x1);
brw_inst_set_bits(dst, 32, 32, (uncompacted >> 14) & 0x1);
brw_inst_set_bits(dst, 31, 31, (uncompacted >> 13) & 0x1);
brw_inst_set_bits(dst, 28, 28, (uncompacted >> 12) & 0x1);
brw_inst_set_bits(dst, 27, 24, (uncompacted >> 8) & 0xf);
brw_inst_set_bits(dst, 23, 23, (uncompacted >> 7) & 0x1);
brw_inst_set_bits(dst, 22, 22, (uncompacted >> 6) & 0x1);
brw_inst_set_bits(dst, 21, 19, (uncompacted >> 3) & 0x7);
brw_inst_set_bits(dst, 18, 16, (uncompacted >> 0) & 0x7);
brw_eu_inst_set_bits(dst, 95, 92, (uncompacted >> 33));
brw_eu_inst_set_bits(dst, 90, 88, (uncompacted >> 30) & 0x7);
brw_eu_inst_set_bits(dst, 82, 80, (uncompacted >> 27) & 0x7);
brw_eu_inst_set_bits(dst, 50, 50, (uncompacted >> 26) & 0x1);
brw_eu_inst_set_bits(dst, 49, 48, (uncompacted >> 24) & 0x3);
brw_eu_inst_set_bits(dst, 42, 40, (uncompacted >> 21) & 0x7);
brw_eu_inst_set_bits(dst, 39, 39, (uncompacted >> 20) & 0x1);
brw_eu_inst_set_bits(dst, 38, 36, (uncompacted >> 17) & 0x7);
brw_eu_inst_set_bits(dst, 34, 34, (uncompacted >> 16) & 0x1);
brw_eu_inst_set_bits(dst, 33, 33, (uncompacted >> 15) & 0x1);
brw_eu_inst_set_bits(dst, 32, 32, (uncompacted >> 14) & 0x1);
brw_eu_inst_set_bits(dst, 31, 31, (uncompacted >> 13) & 0x1);
brw_eu_inst_set_bits(dst, 28, 28, (uncompacted >> 12) & 0x1);
brw_eu_inst_set_bits(dst, 27, 24, (uncompacted >> 8) & 0xf);
brw_eu_inst_set_bits(dst, 23, 23, (uncompacted >> 7) & 0x1);
brw_eu_inst_set_bits(dst, 22, 22, (uncompacted >> 6) & 0x1);
brw_eu_inst_set_bits(dst, 21, 19, (uncompacted >> 3) & 0x7);
brw_eu_inst_set_bits(dst, 18, 16, (uncompacted >> 0) & 0x7);
} else if (devinfo->ver >= 12) {
uint64_t compacted = brw_compact_inst_3src_control_index(devinfo, src);
uint64_t uncompacted = gfx12_3src_control_index_table[compacted];
brw_inst_set_bits(dst, 95, 92, (uncompacted >> 32));
brw_inst_set_bits(dst, 90, 88, (uncompacted >> 29) & 0x7);
brw_inst_set_bits(dst, 82, 80, (uncompacted >> 26) & 0x7);
brw_inst_set_bits(dst, 50, 50, (uncompacted >> 25) & 0x1);
brw_inst_set_bits(dst, 48, 48, (uncompacted >> 24) & 0x1);
brw_inst_set_bits(dst, 42, 40, (uncompacted >> 21) & 0x7);
brw_inst_set_bits(dst, 39, 39, (uncompacted >> 20) & 0x1);
brw_inst_set_bits(dst, 38, 36, (uncompacted >> 17) & 0x7);
brw_inst_set_bits(dst, 34, 34, (uncompacted >> 16) & 0x1);
brw_inst_set_bits(dst, 33, 33, (uncompacted >> 15) & 0x1);
brw_inst_set_bits(dst, 32, 32, (uncompacted >> 14) & 0x1);
brw_inst_set_bits(dst, 31, 31, (uncompacted >> 13) & 0x1);
brw_inst_set_bits(dst, 28, 28, (uncompacted >> 12) & 0x1);
brw_inst_set_bits(dst, 27, 24, (uncompacted >> 8) & 0xf);
brw_inst_set_bits(dst, 23, 23, (uncompacted >> 7) & 0x1);
brw_inst_set_bits(dst, 22, 22, (uncompacted >> 6) & 0x1);
brw_inst_set_bits(dst, 21, 19, (uncompacted >> 3) & 0x7);
brw_inst_set_bits(dst, 18, 16, (uncompacted >> 0) & 0x7);
brw_eu_inst_set_bits(dst, 95, 92, (uncompacted >> 32));
brw_eu_inst_set_bits(dst, 90, 88, (uncompacted >> 29) & 0x7);
brw_eu_inst_set_bits(dst, 82, 80, (uncompacted >> 26) & 0x7);
brw_eu_inst_set_bits(dst, 50, 50, (uncompacted >> 25) & 0x1);
brw_eu_inst_set_bits(dst, 48, 48, (uncompacted >> 24) & 0x1);
brw_eu_inst_set_bits(dst, 42, 40, (uncompacted >> 21) & 0x7);
brw_eu_inst_set_bits(dst, 39, 39, (uncompacted >> 20) & 0x1);
brw_eu_inst_set_bits(dst, 38, 36, (uncompacted >> 17) & 0x7);
brw_eu_inst_set_bits(dst, 34, 34, (uncompacted >> 16) & 0x1);
brw_eu_inst_set_bits(dst, 33, 33, (uncompacted >> 15) & 0x1);
brw_eu_inst_set_bits(dst, 32, 32, (uncompacted >> 14) & 0x1);
brw_eu_inst_set_bits(dst, 31, 31, (uncompacted >> 13) & 0x1);
brw_eu_inst_set_bits(dst, 28, 28, (uncompacted >> 12) & 0x1);
brw_eu_inst_set_bits(dst, 27, 24, (uncompacted >> 8) & 0xf);
brw_eu_inst_set_bits(dst, 23, 23, (uncompacted >> 7) & 0x1);
brw_eu_inst_set_bits(dst, 22, 22, (uncompacted >> 6) & 0x1);
brw_eu_inst_set_bits(dst, 21, 19, (uncompacted >> 3) & 0x7);
brw_eu_inst_set_bits(dst, 18, 16, (uncompacted >> 0) & 0x7);
} else {
uint32_t compacted = brw_compact_inst_3src_control_index(devinfo, src);
uint32_t uncompacted = gfx8_3src_control_index_table[compacted];
brw_inst_set_bits(dst, 34, 32, (uncompacted >> 21) & 0x7);
brw_inst_set_bits(dst, 28, 8, (uncompacted >> 0) & 0x1fffff);
brw_eu_inst_set_bits(dst, 34, 32, (uncompacted >> 21) & 0x7);
brw_eu_inst_set_bits(dst, 28, 8, (uncompacted >> 0) & 0x1fffff);
brw_inst_set_bits(dst, 36, 35, (uncompacted >> 24) & 0x3);
brw_eu_inst_set_bits(dst, 36, 35, (uncompacted >> 24) & 0x3);
}
}
@ -2032,33 +2032,33 @@ set_uncompacted_3src_source_index(const struct intel_device_info *devinfo,
gfx12_3src_source_index_table;
uint32_t uncompacted = three_src_source_index_table[compacted];
brw_inst_set_bits(dst, 114, 114, (uncompacted >> 20));
brw_inst_set_bits(dst, 113, 112, (uncompacted >> 18) & 0x3);
brw_inst_set_bits(dst, 98, 98, (uncompacted >> 17) & 0x1);
brw_inst_set_bits(dst, 97, 96, (uncompacted >> 15) & 0x3);
brw_inst_set_bits(dst, 91, 91, (uncompacted >> 14) & 0x1);
brw_inst_set_bits(dst, 87, 86, (uncompacted >> 12) & 0x3);
brw_inst_set_bits(dst, 85, 84, (uncompacted >> 10) & 0x3);
brw_inst_set_bits(dst, 83, 83, (uncompacted >> 9) & 0x1);
brw_inst_set_bits(dst, 66, 66, (uncompacted >> 8) & 0x1);
brw_inst_set_bits(dst, 65, 64, (uncompacted >> 6) & 0x3);
brw_inst_set_bits(dst, 47, 47, (uncompacted >> 5) & 0x1);
brw_inst_set_bits(dst, 46, 46, (uncompacted >> 4) & 0x1);
brw_inst_set_bits(dst, 45, 44, (uncompacted >> 2) & 0x3);
brw_inst_set_bits(dst, 43, 43, (uncompacted >> 1) & 0x1);
brw_inst_set_bits(dst, 35, 35, (uncompacted >> 0) & 0x1);
brw_eu_inst_set_bits(dst, 114, 114, (uncompacted >> 20));
brw_eu_inst_set_bits(dst, 113, 112, (uncompacted >> 18) & 0x3);
brw_eu_inst_set_bits(dst, 98, 98, (uncompacted >> 17) & 0x1);
brw_eu_inst_set_bits(dst, 97, 96, (uncompacted >> 15) & 0x3);
brw_eu_inst_set_bits(dst, 91, 91, (uncompacted >> 14) & 0x1);
brw_eu_inst_set_bits(dst, 87, 86, (uncompacted >> 12) & 0x3);
brw_eu_inst_set_bits(dst, 85, 84, (uncompacted >> 10) & 0x3);
brw_eu_inst_set_bits(dst, 83, 83, (uncompacted >> 9) & 0x1);
brw_eu_inst_set_bits(dst, 66, 66, (uncompacted >> 8) & 0x1);
brw_eu_inst_set_bits(dst, 65, 64, (uncompacted >> 6) & 0x3);
brw_eu_inst_set_bits(dst, 47, 47, (uncompacted >> 5) & 0x1);
brw_eu_inst_set_bits(dst, 46, 46, (uncompacted >> 4) & 0x1);
brw_eu_inst_set_bits(dst, 45, 44, (uncompacted >> 2) & 0x3);
brw_eu_inst_set_bits(dst, 43, 43, (uncompacted >> 1) & 0x1);
brw_eu_inst_set_bits(dst, 35, 35, (uncompacted >> 0) & 0x1);
} else {
uint64_t uncompacted = gfx8_3src_source_index_table[compacted];
brw_inst_set_bits(dst, 83, 83, (uncompacted >> 43) & 0x1);
brw_inst_set_bits(dst, 114, 107, (uncompacted >> 35) & 0xff);
brw_inst_set_bits(dst, 93, 86, (uncompacted >> 27) & 0xff);
brw_inst_set_bits(dst, 72, 65, (uncompacted >> 19) & 0xff);
brw_inst_set_bits(dst, 55, 37, (uncompacted >> 0) & 0x7ffff);
brw_eu_inst_set_bits(dst, 83, 83, (uncompacted >> 43) & 0x1);
brw_eu_inst_set_bits(dst, 114, 107, (uncompacted >> 35) & 0xff);
brw_eu_inst_set_bits(dst, 93, 86, (uncompacted >> 27) & 0xff);
brw_eu_inst_set_bits(dst, 72, 65, (uncompacted >> 19) & 0xff);
brw_eu_inst_set_bits(dst, 55, 37, (uncompacted >> 0) & 0x7ffff);
brw_inst_set_bits(dst, 126, 125, (uncompacted >> 47) & 0x3);
brw_inst_set_bits(dst, 105, 104, (uncompacted >> 45) & 0x3);
brw_inst_set_bits(dst, 84, 84, (uncompacted >> 44) & 0x1);
brw_eu_inst_set_bits(dst, 126, 125, (uncompacted >> 47) & 0x3);
brw_eu_inst_set_bits(dst, 105, 104, (uncompacted >> 45) & 0x3);
brw_eu_inst_set_bits(dst, 84, 84, (uncompacted >> 44) & 0x1);
}
}
@ -2072,10 +2072,10 @@ set_uncompacted_3src_subreg_index(const struct intel_device_info *devinfo,
uint32_t uncompacted = (devinfo->ver >= 20 ? xe2_3src_subreg_table[compacted]:
gfx12_3src_subreg_table[compacted]);
brw_inst_set_bits(dst, 119, 115, (uncompacted >> 15));
brw_inst_set_bits(dst, 103, 99, (uncompacted >> 10) & 0x1f);
brw_inst_set_bits(dst, 71, 67, (uncompacted >> 5) & 0x1f);
brw_inst_set_bits(dst, 55, 51, (uncompacted >> 0) & 0x1f);
brw_eu_inst_set_bits(dst, 119, 115, (uncompacted >> 15));
brw_eu_inst_set_bits(dst, 103, 99, (uncompacted >> 10) & 0x1f);
brw_eu_inst_set_bits(dst, 71, 67, (uncompacted >> 5) & 0x1f);
brw_eu_inst_set_bits(dst, 55, 51, (uncompacted >> 0) & 0x1f);
}
static void

2
src/intel/compiler/brw_eu_emit.c
View file

@ -1631,7 +1631,7 @@ brw_send_indirect_split_message(struct brw_codegen *p,
if (devinfo->ver >= 20 && sfid == GFX12_SFID_UGM) {
const unsigned ex_mlen = brw_message_ex_desc_ex_mlen(devinfo, ex_desc_imm);
brw_inst_set_bits(send, 103, 99, ex_mlen / reg_unit(devinfo));
brw_eu_inst_set_bits(send, 103, 99, ex_mlen / reg_unit(devinfo));
}
}

256
src/intel/compiler/brw_eu_inst.h
View file

@ -47,11 +47,11 @@ typedef struct brw_eu_inst {
uint64_t data[2];
} brw_eu_inst;
static inline uint64_t brw_inst_bits(const brw_eu_inst *inst,
unsigned high, unsigned low);
static inline void brw_inst_set_bits(brw_eu_inst *inst,
unsigned high, unsigned low,
uint64_t value);
static inline uint64_t brw_eu_inst_bits(const brw_eu_inst *inst,
unsigned high, unsigned low);
static inline void brw_eu_inst_set_bits(brw_eu_inst *inst,
unsigned high, unsigned low,
uint64_t value);
#define FC(name, hi9, lo9, hi12, lo12, assertions) \
static inline void \
@ -60,9 +60,9 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \
{ \
assert(assertions); \
if (devinfo->ver >= 12) \
brw_inst_set_bits(inst, hi12, lo12, v); \
brw_eu_inst_set_bits(inst, hi12, lo12, v); \
else \
brw_inst_set_bits(inst, hi9, lo9, v); \
brw_eu_inst_set_bits(inst, hi9, lo9, v); \
} \
static inline uint64_t \
brw_inst_##name(const struct intel_device_info *devinfo, \
@ -70,9 +70,9 @@ brw_inst_##name(const struct intel_device_info *devinfo, \
{ \
assert(assertions); \
if (devinfo->ver >= 12) \
return brw_inst_bits(inst, hi12, lo12); \
return brw_eu_inst_bits(inst, hi12, lo12); \
else \
return brw_inst_bits(inst, hi9, lo9); \
return brw_eu_inst_bits(inst, hi9, lo9); \
}
/* A simple macro for fields which stay in the same place on all generations,
@ -89,22 +89,22 @@ brw_inst_##name(const struct intel_device_info *devinfo, \
brw_eu_inst *inst, uint64_t v) \
{ \
if (devinfo->ver >= 20) \
brw_inst_set_bits(inst, hi20, lo20, v); \
brw_eu_inst_set_bits(inst, hi20, lo20, v); \
else if (devinfo->ver >= 12) \
brw_inst_set_bits(inst, hi12, lo12, v); \
brw_eu_inst_set_bits(inst, hi12, lo12, v); \
else \
brw_inst_set_bits(inst, hi9, lo9, v); \
brw_eu_inst_set_bits(inst, hi9, lo9, v); \
} \
static inline uint64_t \
brw_inst_##name(const struct intel_device_info *devinfo, \
const brw_eu_inst *inst) \
{ \
if (devinfo->ver >= 20) \
return brw_inst_bits(inst, hi20, lo20); \
return brw_eu_inst_bits(inst, hi20, lo20); \
else if (devinfo->ver >= 12) \
return brw_inst_bits(inst, hi12, lo12); \
return brw_eu_inst_bits(inst, hi12, lo12); \
else \
return brw_inst_bits(inst, hi9, lo9); \
return brw_eu_inst_bits(inst, hi9, lo9); \
}
#define FV20(name, hi9, lo9, hi12, lo12, hi20, lo20) \
@ -113,23 +113,23 @@ brw_inst_##name(const struct intel_device_info *devinfo, \
brw_eu_inst *inst, uint64_t v) \
{ \
if (devinfo->ver >= 20) \
brw_inst_set_bits(inst, hi20, lo20, v & 0x7); \
brw_eu_inst_set_bits(inst, hi20, lo20, v & 0x7); \
else if (devinfo->ver >= 12) \
brw_inst_set_bits(inst, hi12, lo12, v); \
brw_eu_inst_set_bits(inst, hi12, lo12, v); \
else \
brw_inst_set_bits(inst, hi9, lo9, v); \
brw_eu_inst_set_bits(inst, hi9, lo9, v); \
} \
static inline uint64_t \
brw_inst_##name(const struct intel_device_info *devinfo, \
const brw_eu_inst *inst) \
{ \
if (devinfo->ver >= 20) \
return brw_inst_bits(inst, hi20, lo20) == 0x7 ? 0xF : \
brw_inst_bits(inst, hi20, lo20); \
return brw_eu_inst_bits(inst, hi20, lo20) == 0x7 ? 0xF : \
brw_eu_inst_bits(inst, hi20, lo20); \
else if (devinfo->ver >= 12) \
return brw_inst_bits(inst, hi12, lo12); \
return brw_eu_inst_bits(inst, hi12, lo12); \
else \
return brw_inst_bits(inst, hi9, lo9); \
return brw_eu_inst_bits(inst, hi9, lo9); \
}
#define FD20(name, hi9, lo9, hi12, lo12, hi20, lo20, zero20) \
@ -138,28 +138,28 @@ brw_inst_##name(const struct intel_device_info *devinfo, \
brw_eu_inst *inst, uint64_t v) \
{ \
if (devinfo->ver >= 20) { \
brw_inst_set_bits(inst, hi20, lo20, v >> 1); \
brw_eu_inst_set_bits(inst, hi20, lo20, v >> 1); \
if (zero20 == -1) \
assert((v & 1) == 0); \
else \
brw_inst_set_bits(inst, zero20, zero20, v & 1); \
brw_eu_inst_set_bits(inst, zero20, zero20, v & 1); \
} else if (devinfo->ver >= 12) \
brw_inst_set_bits(inst, hi12, lo12, v); \
brw_eu_inst_set_bits(inst, hi12, lo12, v); \
else \
brw_inst_set_bits(inst, hi9, lo9, v); \
brw_eu_inst_set_bits(inst, hi9, lo9, v); \
} \
static inline uint64_t \
brw_inst_##name(const struct intel_device_info *devinfo, \
const brw_eu_inst *inst) \
{ \
if (devinfo->ver >= 20) \
return (brw_inst_bits(inst, hi20, lo20) << 1) | \
return (brw_eu_inst_bits(inst, hi20, lo20) << 1) | \
(zero20 == -1 ? 0 : \
brw_inst_bits(inst, zero20, zero20)); \
brw_eu_inst_bits(inst, zero20, zero20)); \
else if (devinfo->ver >= 12) \
return brw_inst_bits(inst, hi12, lo12); \
return brw_eu_inst_bits(inst, hi12, lo12); \
else \
return brw_inst_bits(inst, hi9, lo9); \
return brw_eu_inst_bits(inst, hi9, lo9); \
}
/* Macro for fields that gained extra discontiguous MSBs in Gfx12 (specified
@ -174,10 +174,10 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \
if (devinfo->ver >= 12) { \
const unsigned k = hi12 - lo12 + 1; \
if (hi12ex != -1 && lo12ex != -1) \
brw_inst_set_bits(inst, hi12ex, lo12ex, value >> k); \
brw_inst_set_bits(inst, hi12, lo12, value & ((1ull << k) - 1)); \
brw_eu_inst_set_bits(inst, hi12ex, lo12ex, value >> k); \
brw_eu_inst_set_bits(inst, hi12, lo12, value & ((1ull << k) - 1)); \
} else { \
brw_inst_set_bits(inst, hi9, lo9, value); \
brw_eu_inst_set_bits(inst, hi9, lo9, value); \
} \
} \
static inline uint64_t \
@ -188,10 +188,10 @@ brw_inst_##name(const struct intel_device_info *devinfo, \
if (devinfo->ver >= 12) { \
const unsigned k = hi12 - lo12 + 1; \
return (hi12ex == -1 || lo12ex == -1 ? 0 : \
brw_inst_bits(inst, hi12ex, lo12ex) << k) | \
brw_inst_bits(inst, hi12, lo12); \
brw_eu_inst_bits(inst, hi12ex, lo12ex) << k) | \
brw_eu_inst_bits(inst, hi12, lo12); \
} else { \
return brw_inst_bits(inst, hi9, lo9); \
return brw_eu_inst_bits(inst, hi9, lo9); \
} \
}
@ -255,13 +255,13 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \
assert(file == FIXED_GRF || file == ARF); \
value = file == FIXED_GRF ? 0 : 1; \
} \
brw_inst_set_bits(inst, hi9, lo9, value); \
brw_eu_inst_set_bits(inst, hi9, lo9, value); \
} else if (hi12 == lo12) { \
brw_inst_set_bits(inst, hi12, lo12, value); \
brw_eu_inst_set_bits(inst, hi12, lo12, value); \
} else { \
brw_inst_set_bits(inst, hi12, hi12, value >> 1); \
brw_eu_inst_set_bits(inst, hi12, hi12, value >> 1); \
if ((value >> 1) == 0) \
brw_inst_set_bits(inst, lo12, lo12, value & 1); \
brw_eu_inst_set_bits(inst, lo12, lo12, value & 1); \
} \
} \
static inline uint64_t \
@ -276,17 +276,17 @@ brw_inst_##name(const struct intel_device_info *devinfo, \
} args = { ._ = false, __VA_ARGS__ }; \
uint64_t value; \
if (devinfo->ver < 12) { \
value = brw_inst_bits(inst, hi9, lo9); \
value = brw_eu_inst_bits(inst, hi9, lo9); \
if (devinfo->ver == 11 && args.grf_or_imm) \
return value ? IMM : FIXED_GRF; \
else if (devinfo->ver == 11 && args.grf_or_acc) \
return value ? ARF : FIXED_GRF; \
} else if (hi12 == lo12) { \
value = brw_inst_bits(inst, hi12, lo12); \
value = brw_eu_inst_bits(inst, hi12, lo12); \
} else { \
value = (brw_inst_bits(inst, hi12, hi12) << 1) | \
(brw_inst_bits(inst, hi12, hi12) == 0 ? \
brw_inst_bits(inst, lo12, lo12) : 1); \
value = (brw_eu_inst_bits(inst, hi12, hi12) << 1) | \
(brw_eu_inst_bits(inst, hi12, hi12) == 0 ? \
brw_eu_inst_bits(inst, lo12, lo12) : 1); \
} \
return hw_reg_file_to_brw_reg_file(value); \
}
@ -304,7 +304,7 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \
if (devinfo->ver >= 12) \
assert(v == (const12)); \
else \
brw_inst_set_bits(inst, hi9, lo9, v); \
brw_eu_inst_set_bits(inst, hi9, lo9, v); \
} \
static inline uint64_t \
brw_inst_##name(const struct intel_device_info *devinfo, \
@ -313,7 +313,7 @@ brw_inst_##name(const struct intel_device_info *devinfo, \
if (devinfo->ver >= 12) \
return (const12); \
else \
return brw_inst_bits(inst, hi9, lo9); \
return brw_eu_inst_bits(inst, hi9, lo9); \
}
FV20(src1_vstride, /* 9+ */ 120, 117, /* 12+ */ 119, 116, /* 20+ */ 118, 116)
@ -445,8 +445,8 @@ brw_inst_set_3src_a16_##srcN##_subreg_nr(const struct \
{ \
assert(devinfo->ver == 9); \
assert((value & ~0b11110) == 0); \
brw_inst_set_bits(inst, src_base + 11, src_base + 9, value >> 2); \
brw_inst_set_bits(inst, src_base + 20, src_base + 20, (value >> 1) & 1); \
brw_eu_inst_set_bits(inst, src_base + 11, src_base + 9, value >> 2); \
brw_eu_inst_set_bits(inst, src_base + 20, src_base + 20, (value >> 1) & 1); \
} \
static inline unsigned \
brw_inst_3src_a16_##srcN##_subreg_nr(const struct \
@ -454,8 +454,8 @@ brw_inst_3src_a16_##srcN##_subreg_nr(const struct \
const brw_eu_inst *inst) \
{ \
assert(devinfo->ver == 9); \
return brw_inst_bits(inst, src_base + 11, src_base + 9) << 2 | \
brw_inst_bits(inst, src_base + 20, src_base + 20) << 1; \
return brw_eu_inst_bits(inst, src_base + 11, src_base + 9) << 2 | \
brw_eu_inst_bits(inst, src_base + 20, src_base + 20) << 1; \
}
F_3SRC_A16_SUBREG_NR(src0, 64)
@ -569,9 +569,9 @@ brw_inst_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo,
{
assert(devinfo->ver >= 10);
if (devinfo->ver >= 12)
return brw_inst_bits(insn, 79, 64);
return brw_eu_inst_bits(insn, 79, 64);
else
return brw_inst_bits(insn, 82, 67);
return brw_eu_inst_bits(insn, 82, 67);
}
static inline uint16_t
@ -580,9 +580,9 @@ brw_inst_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo,
{
assert(devinfo->ver >= 10);
if (devinfo->ver >= 12)
return brw_inst_bits(insn, 127, 112);
return brw_eu_inst_bits(insn, 127, 112);
else
return brw_inst_bits(insn, 124, 109);
return brw_eu_inst_bits(insn, 124, 109);
}
static inline void
@ -591,9 +591,9 @@ brw_inst_set_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo,
{
assert(devinfo->ver >= 10);
if (devinfo->ver >= 12)
brw_inst_set_bits(insn, 79, 64, value);
brw_eu_inst_set_bits(insn, 79, 64, value);
else
brw_inst_set_bits(insn, 82, 67, value);
brw_eu_inst_set_bits(insn, 82, 67, value);
}
static inline void
@ -602,9 +602,9 @@ brw_inst_set_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo,
{
assert(devinfo->ver >= 10);
if (devinfo->ver >= 12)
brw_inst_set_bits(insn, 127, 112, value);
brw_eu_inst_set_bits(insn, 127, 112, value);
else
brw_inst_set_bits(insn, 124, 109, value);
brw_eu_inst_set_bits(insn, 124, 109, value);
}
/** @} */
@ -680,13 +680,13 @@ brw_inst_set_uip(const struct intel_device_info *devinfo,
if (devinfo->ver >= 12)
brw_inst_set_src1_is_imm(devinfo, inst, 1);
brw_inst_set_bits(inst, 95, 64, (uint32_t)value);
brw_eu_inst_set_bits(inst, 95, 64, (uint32_t)value);
}
static inline int32_t
brw_inst_uip(const struct intel_device_info *devinfo, const brw_eu_inst *inst)
{
return brw_inst_bits(inst, 95, 64);
return brw_eu_inst_bits(inst, 95, 64);
}
static inline void
@ -696,13 +696,13 @@ brw_inst_set_jip(const struct intel_device_info *devinfo,
if (devinfo->ver >= 12)
brw_inst_set_src0_is_imm(devinfo, inst, 1);
brw_inst_set_bits(inst, 127, 96, (uint32_t)value);
brw_eu_inst_set_bits(inst, 127, 96, (uint32_t)value);
}
static inline int32_t
brw_inst_jip(const struct intel_device_info *devinfo, const brw_eu_inst *inst)
{
return brw_inst_bits(inst, 127, 96);
return brw_eu_inst_bits(inst, 127, 96);
}
/** @} */
@ -749,13 +749,13 @@ brw_inst_set_send_desc(const struct intel_device_info *devinfo,
brw_eu_inst *inst, uint32_t value)
{
if (devinfo->ver >= 12) {
brw_inst_set_bits(inst, 123, 122, GET_BITS(value, 31, 30));
brw_inst_set_bits(inst, 71, 67, GET_BITS(value, 29, 25));
brw_inst_set_bits(inst, 55, 51, GET_BITS(value, 24, 20));
brw_inst_set_bits(inst, 121, 113, GET_BITS(value, 19, 11));
brw_inst_set_bits(inst, 91, 81, GET_BITS(value, 10, 0));
brw_eu_inst_set_bits(inst, 123, 122, GET_BITS(value, 31, 30));
brw_eu_inst_set_bits(inst, 71, 67, GET_BITS(value, 29, 25));
brw_eu_inst_set_bits(inst, 55, 51, GET_BITS(value, 24, 20));
brw_eu_inst_set_bits(inst, 121, 113, GET_BITS(value, 19, 11));
brw_eu_inst_set_bits(inst, 91, 81, GET_BITS(value, 10, 0));
} else {
brw_inst_set_bits(inst, 126, 96, value);
brw_eu_inst_set_bits(inst, 126, 96, value);
assert(value >> 31 == 0);
}
}
@ -770,13 +770,13 @@ brw_inst_send_desc(const struct intel_device_info *devinfo,
const brw_eu_inst *inst)
{
if (devinfo->ver >= 12) {
return (brw_inst_bits(inst, 123, 122) << 30 |
brw_inst_bits(inst, 71, 67) << 25 |
brw_inst_bits(inst, 55, 51) << 20 |
brw_inst_bits(inst, 121, 113) << 11 |
brw_inst_bits(inst, 91, 81));
return (brw_eu_inst_bits(inst, 123, 122) << 30 |
brw_eu_inst_bits(inst, 71, 67) << 25 |
brw_eu_inst_bits(inst, 55, 51) << 20 |
brw_eu_inst_bits(inst, 121, 113) << 11 |
brw_eu_inst_bits(inst, 91, 81));
} else {
return brw_inst_bits(inst, 126, 96);
return brw_eu_inst_bits(inst, 126, 96);
}
}
@ -796,10 +796,10 @@ brw_inst_set_send_ex_desc(const struct intel_device_info *devinfo,
assert(!gather || devinfo->ver >= 30);
if (devinfo->ver >= 12) {
brw_inst_set_bits(inst, 127, 124, GET_BITS(value, 31, 28));
brw_inst_set_bits(inst, 97, 96, GET_BITS(value, 27, 26));
brw_inst_set_bits(inst, 65, 64, GET_BITS(value, 25, 24));
brw_inst_set_bits(inst, 47, 35, GET_BITS(value, 23, 11));
brw_eu_inst_set_bits(inst, 127, 124, GET_BITS(value, 31, 28));
brw_eu_inst_set_bits(inst, 97, 96, GET_BITS(value, 27, 26));
brw_eu_inst_set_bits(inst, 65, 64, GET_BITS(value, 25, 24));
brw_eu_inst_set_bits(inst, 47, 35, GET_BITS(value, 23, 11));
/* SEND gather uses these bits for src0 subreg nr, so they
* are not part of the ex_desc.
@ -808,16 +808,16 @@ brw_inst_set_send_ex_desc(const struct intel_device_info *devinfo,
assert(devinfo->ver >= 30);
assert(GET_BITS(value, 10, 6) == 0);
} else {
brw_inst_set_bits(inst, 103, 99, GET_BITS(value, 10, 6));
brw_eu_inst_set_bits(inst, 103, 99, GET_BITS(value, 10, 6));
}
assert(GET_BITS(value, 5, 0) == 0);
} else {
assert(devinfo->ver >= 9);
brw_inst_set_bits(inst, 94, 91, GET_BITS(value, 31, 28));
brw_inst_set_bits(inst, 88, 85, GET_BITS(value, 27, 24));
brw_inst_set_bits(inst, 83, 80, GET_BITS(value, 23, 20));
brw_inst_set_bits(inst, 67, 64, GET_BITS(value, 19, 16));
brw_eu_inst_set_bits(inst, 94, 91, GET_BITS(value, 31, 28));
brw_eu_inst_set_bits(inst, 88, 85, GET_BITS(value, 27, 24));
brw_eu_inst_set_bits(inst, 83, 80, GET_BITS(value, 23, 20));
brw_eu_inst_set_bits(inst, 67, 64, GET_BITS(value, 19, 16));
assert(GET_BITS(value, 15, 0) == 0);
}
}
@ -838,9 +838,9 @@ brw_inst_set_sends_ex_desc(const struct intel_device_info *devinfo,
if (devinfo->ver >= 12) {
brw_inst_set_send_ex_desc(devinfo, inst, value, gather);
} else {
brw_inst_set_bits(inst, 95, 80, GET_BITS(value, 31, 16));
brw_eu_inst_set_bits(inst, 95, 80, GET_BITS(value, 31, 16));
assert(GET_BITS(value, 15, 10) == 0);
brw_inst_set_bits(inst, 67, 64, GET_BITS(value, 9, 6));
brw_eu_inst_set_bits(inst, 67, 64, GET_BITS(value, 9, 6));
assert(GET_BITS(value, 5, 0) == 0);
}
}
@ -857,17 +857,17 @@ brw_inst_send_ex_desc(const struct intel_device_info *devinfo,
assert(!gather || devinfo->ver >= 30);
if (devinfo->ver >= 12) {
return (brw_inst_bits(inst, 127, 124) << 28 |
brw_inst_bits(inst, 97, 96) << 26 |
brw_inst_bits(inst, 65, 64) << 24 |
brw_inst_bits(inst, 47, 35) << 11 |
(!gather ? brw_inst_bits(inst, 103, 99) << 6 : 0));
return (brw_eu_inst_bits(inst, 127, 124) << 28 |
brw_eu_inst_bits(inst, 97, 96) << 26 |
brw_eu_inst_bits(inst, 65, 64) << 24 |
brw_eu_inst_bits(inst, 47, 35) << 11 |
(!gather ? brw_eu_inst_bits(inst, 103, 99) << 6 : 0));
} else {
assert(devinfo->ver >= 9);
return (brw_inst_bits(inst, 94, 91) << 28 |
brw_inst_bits(inst, 88, 85) << 24 |
brw_inst_bits(inst, 83, 80) << 20 |
brw_inst_bits(inst, 67, 64) << 16);
return (brw_eu_inst_bits(inst, 94, 91) << 28 |
brw_eu_inst_bits(inst, 88, 85) << 24 |
brw_eu_inst_bits(inst, 83, 80) << 20 |
brw_eu_inst_bits(inst, 67, 64) << 16);
}
}
@ -884,8 +884,8 @@ brw_inst_sends_ex_desc(const struct intel_device_info *devinfo,
return brw_inst_send_ex_desc(devinfo, inst, gather);
} else {
assert(!gather);
return (brw_inst_bits(inst, 95, 80) << 16 |
brw_inst_bits(inst, 67, 64) << 6);
return (brw_eu_inst_bits(inst, 95, 80) << 16 |
brw_eu_inst_bits(inst, 67, 64) << 6);
}
}
@ -982,14 +982,14 @@ static inline int
brw_inst_imm_d(const struct intel_device_info *devinfo, const brw_eu_inst *insn)
{
(void) devinfo;
return brw_inst_bits(insn, 127, 96);
return brw_eu_inst_bits(insn, 127, 96);
}
static inline unsigned
brw_inst_imm_ud(const struct intel_device_info *devinfo, const brw_eu_inst *insn)
{
(void) devinfo;
return brw_inst_bits(insn, 127, 96);
return brw_eu_inst_bits(insn, 127, 96);
}
static inline uint64_t
@ -997,10 +997,10 @@ brw_inst_imm_uq(const struct intel_device_info *devinfo,
const brw_eu_inst *insn)
{
if (devinfo->ver >= 12) {
return brw_inst_bits(insn, 95, 64) << 32 |
brw_inst_bits(insn, 127, 96);
return brw_eu_inst_bits(insn, 95, 64) << 32 |
brw_eu_inst_bits(insn, 127, 96);
} else {
return brw_inst_bits(insn, 127, 64);
return brw_eu_inst_bits(insn, 127, 64);
}
}
@ -1012,7 +1012,7 @@ brw_inst_imm_f(const struct intel_device_info *devinfo, const brw_eu_inst *insn)
uint32_t u;
} ft;
(void) devinfo;
ft.u = brw_inst_bits(insn, 127, 96);
ft.u = brw_eu_inst_bits(insn, 127, 96);
return ft.f;
}
@ -1032,7 +1032,7 @@ brw_inst_set_imm_d(const struct intel_device_info *devinfo,
brw_eu_inst *insn, int value)
{
(void) devinfo;
return brw_inst_set_bits(insn, 127, 96, value);
return brw_eu_inst_set_bits(insn, 127, 96, value);
}
static inline void
@ -1040,7 +1040,7 @@ brw_inst_set_imm_ud(const struct intel_device_info *devinfo,
brw_eu_inst *insn, unsigned value)
{
(void) devinfo;
return brw_inst_set_bits(insn, 127, 96, value);
return brw_eu_inst_set_bits(insn, 127, 96, value);
}
static inline void
@ -1053,7 +1053,7 @@ brw_inst_set_imm_f(const struct intel_device_info *devinfo,
} ft;
(void) devinfo;
ft.f = value;
brw_inst_set_bits(insn, 127, 96, ft.u);
brw_eu_inst_set_bits(insn, 127, 96, ft.u);
}
static inline void
@ -1068,10 +1068,10 @@ brw_inst_set_imm_df(const struct intel_device_info *devinfo,
dt.d = value;
if (devinfo->ver >= 12) {
brw_inst_set_bits(insn, 95, 64, dt.u >> 32);
brw_inst_set_bits(insn, 127, 96, dt.u & 0xFFFFFFFF);
brw_eu_inst_set_bits(insn, 95, 64, dt.u >> 32);
brw_eu_inst_set_bits(insn, 127, 96, dt.u & 0xFFFFFFFF);
} else {
brw_inst_set_bits(insn, 127, 64, dt.u);
brw_eu_inst_set_bits(insn, 127, 64, dt.u);
}
}
@ -1081,10 +1081,10 @@ brw_inst_set_imm_uq(const struct intel_device_info *devinfo,
{
(void) devinfo;
if (devinfo->ver >= 12) {
brw_inst_set_bits(insn, 95, 64, value >> 32);
brw_inst_set_bits(insn, 127, 96, value & 0xFFFFFFFF);
brw_eu_inst_set_bits(insn, 95, 64, value >> 32);
brw_eu_inst_set_bits(insn, 127, 96, value & 0xFFFFFFFF);
} else {
brw_inst_set_bits(insn, 127, 64, value);
brw_eu_inst_set_bits(insn, 127, 64, value);
}
}
@ -1130,18 +1130,18 @@ brw_inst_set_##reg##_ia1_addr_imm(const struct \
{ \
if (devinfo->ver >= 20) { \
assert((value & ~0x7ff) == 0); \
brw_inst_set_bits(inst, g20_high, g20_low, value >> 1); \
brw_eu_inst_set_bits(inst, g20_high, g20_low, value >> 1); \
if (g20_zero == -1) \
assert((value & 1) == 0); \
else \
brw_inst_set_bits(inst, g20_zero, g20_zero, value & 1); \
brw_eu_inst_set_bits(inst, g20_zero, g20_zero, value & 1); \
} else if (devinfo->ver >= 12) { \
assert((value & ~0x3ff) == 0); \
brw_inst_set_bits(inst, g12_high, g12_low, value); \
brw_eu_inst_set_bits(inst, g12_high, g12_low, value); \
} else { \
assert((value & ~0x3ff) == 0); \
brw_inst_set_bits(inst, g9_high, g9_low, value & 0x1ff); \
brw_inst_set_bits(inst, g9_nine, g9_nine, value >> 9); \
brw_eu_inst_set_bits(inst, g9_high, g9_low, value & 0x1ff); \
brw_eu_inst_set_bits(inst, g9_nine, g9_nine, value >> 9); \
} \
} \
static inline unsigned \
@ -1149,14 +1149,14 @@ brw_inst_##reg##_ia1_addr_imm(const struct intel_device_info *devinfo, \
const brw_eu_inst *inst) \
{ \
if (devinfo->ver >= 20) { \
return brw_inst_bits(inst, g20_high, g20_low) << 1 | \
return brw_eu_inst_bits(inst, g20_high, g20_low) << 1 | \
(g20_zero == -1 ? 0 : \
brw_inst_bits(inst, g20_zero, g20_zero)); \
brw_eu_inst_bits(inst, g20_zero, g20_zero)); \
} else if (devinfo->ver >= 12) { \
return brw_inst_bits(inst, g12_high, g12_low); \
return brw_eu_inst_bits(inst, g12_high, g12_low); \
} else { \
return brw_inst_bits(inst, g9_high, g9_low) | \
(brw_inst_bits(inst, g9_nine, g9_nine) << 9); \
return brw_eu_inst_bits(inst, g9_high, g9_low) | \
(brw_eu_inst_bits(inst, g9_nine, g9_nine) << 9); \
} \
}
@ -1175,16 +1175,16 @@ brw_inst_set_##reg##_ia16_addr_imm(const struct \
assert(devinfo->ver < 12); \
assert((value & ~0x3ff) == 0); \
assert(GET_BITS(value, 3, 0) == 0); \
brw_inst_set_bits(inst, g9_high, g9_low, GET_BITS(value, 8, 4)); \
brw_inst_set_bits(inst, g9_nine, g9_nine, GET_BITS(value, 9, 9)); \
brw_eu_inst_set_bits(inst, g9_high, g9_low, GET_BITS(value, 8, 4)); \
brw_eu_inst_set_bits(inst, g9_nine, g9_nine, GET_BITS(value, 9, 9)); \
} \
static inline unsigned \
brw_inst_##reg##_ia16_addr_imm(const struct intel_device_info *devinfo, \
const brw_eu_inst *inst) \
{ \
assert(devinfo->ver < 12); \
return (brw_inst_bits(inst, g9_high, g9_low) << 4) | \
(brw_inst_bits(inst, g9_nine, g9_nine) << 9); \
return (brw_eu_inst_bits(inst, g9_high, g9_low) << 4) | \
(brw_eu_inst_bits(inst, g9_nine, g9_nine) << 9); \
}
/* AddrImm[9:0] for Align16 Indirect Addressing:
@ -1203,7 +1203,7 @@ BRW_IA16_ADDR_IMM(send_dst, 62, 56, 52)
* Bits indices range from 0..127; fields may not cross 64-bit boundaries.
*/
static inline uint64_t
brw_inst_bits(const brw_eu_inst *inst, unsigned high, unsigned low)
brw_eu_inst_bits(const brw_eu_inst *inst, unsigned high, unsigned low)
{
assume(high < 128);
assume(high >= low);
@ -1225,7 +1225,7 @@ brw_inst_bits(const brw_eu_inst *inst, unsigned high, unsigned low)
* Bits indices range from 0..127; fields may not cross 64-bit boundaries.
*/
static inline void
brw_inst_set_bits(brw_eu_inst *inst, unsigned high, unsigned low, uint64_t value)
brw_eu_inst_set_bits(brw_eu_inst *inst, unsigned high, unsigned low, uint64_t value)
{
assume(high < 128);
assume(high >= low);

4
src/intel/compiler/brw_gram.y
View file

@ -895,7 +895,7 @@ sendinstruction:
brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
brw_set_dest(p, brw_last_inst, $4);
brw_set_src0(p, brw_last_inst, $5);
brw_inst_set_bits(brw_last_inst, 127, 96, $6);
brw_eu_inst_set_bits(brw_last_inst, 127, 96, $6);
brw_inst_set_src1_file_type(p->devinfo, brw_last_inst,
IMM,
BRW_TYPE_UD);
@ -913,7 +913,7 @@ sendinstruction:
brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
brw_set_dest(p, brw_last_inst, $4);
brw_set_src0(p, brw_last_inst, $5);
brw_inst_set_bits(brw_last_inst, 127, 96, $7);
brw_eu_inst_set_bits(brw_last_inst, 127, 96, $7);
brw_inst_set_sfid(p->devinfo, brw_last_inst, $8);
brw_inst_set_eot(p->devinfo, brw_last_inst, $10.end_of_thread);
brw_inst_set_group(p->devinfo, brw_last_inst, $10.chan_offset);

2
src/intel/compiler/test_eu_compact.cpp
View file

@ -99,7 +99,7 @@ clear_pad_bits(const struct brw_isa_info *isa, brw_eu_inst *inst)
brw_inst_opcode(isa, inst) != BRW_OPCODE_SENDC &&
brw_inst_src0_reg_file(devinfo, inst) != IMM &&
brw_inst_src1_reg_file(devinfo, inst) != IMM) {
brw_inst_set_bits(inst, 127, 111, 0);
brw_eu_inst_set_bits(inst, 127, 111, 0);
}
}