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vec4: use DIM instruction when loading DF immediates in HSW

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Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Samuel Iglesias Gonsálvez 2016-12-07 10:32:38 +01:00
parent 3fbdac28d5
commit 301fdfd838
1 changed files with 9 additions and 0 deletions
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9
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
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@ -1208,6 +1208,15 @@ vec4_visitor::setup_imm_df(double v)
if (devinfo->gen >= 8)
return brw_imm_df(v);
/* gen7.5 does not support DF immediates straighforward but the DIM
* instruction allows to set the 64-bit immediate value.
*/
if (devinfo->is_haswell) {
dst_reg dst = retype(dst_reg(VGRF, alloc.allocate(2)), BRW_REGISTER_TYPE_DF);
emit(DIM(dst, brw_imm_df(v)))->force_writemask_all = true;
return swizzle(src_reg(retype(dst, BRW_REGISTER_TYPE_DF)), BRW_SWIZZLE_XXXX);
}
/* gen7 does not support DF immediates */
union {
double d;