diff --git a/src/amd/compiler/aco_optimizer.cpp b/src/amd/compiler/aco_optimizer.cpp
index 590749ccf5b..42f50cae8fc 100644
--- a/src/amd/compiler/aco_optimizer.cpp
+++ b/src/amd/compiler/aco_optimizer.cpp
@@ -715,7 +715,7 @@ bool pseudo_propagate_temp(opt_ctx& ctx, aco_ptr<Instruction>& instr,
 
 bool can_apply_sgprs(opt_ctx& ctx, aco_ptr<Instruction>& instr)
 {
-   if (instr->isSDWA() && ctx.program->chip_class < GFX9)
+   if ((instr->isSDWA() && ctx.program->chip_class < GFX9) || instr->isDPP())
       return false;
    return instr->opcode != aco_opcode::v_readfirstlane_b32 &&
           instr->opcode != aco_opcode::v_readlane_b32 &&
diff --git a/src/amd/compiler/aco_validate.cpp b/src/amd/compiler/aco_validate.cpp
index d2d748c62fa..1bcd6c4f017 100644
--- a/src/amd/compiler/aco_validate.cpp
+++ b/src/amd/compiler/aco_validate.cpp
@@ -253,6 +253,8 @@ bool validate_ir(Program* program)
                uint32_t scalar_mask = instr->isVOP3() || instr->isVOP3P() ? 0x7 : 0x5;
                if (instr->isSDWA())
                   scalar_mask = program->chip_class >= GFX9 ? 0x7 : 0x4;
+               else if (instr->isDPP())
+                  scalar_mask = 0x0;
 
                if (instr->isVOPC() ||
                    instr->opcode == aco_opcode::v_readfirstlane_b32 ||