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panvk: Add support for CmdDispatchIndirect
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11885 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31370>
This commit is contained in:
John Anthony
Marge Bot
parent
8855f31962
commit
2ffc05d8d2
1 changed files with 105 additions and 22 deletions
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@ -1,5 +1,6 @@
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/*
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* Copyright © 2024 Collabora Ltd.
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* Copyright © 2024 Arm Ltd.
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*
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* Derived from tu_cmd_buffer.c which is:
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* Copyright © 2016 Red Hat.
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@ -11,6 +12,7 @@
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#include "genxml/gen_macros.h"
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#include "panvk_buffer.h"
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#include "panvk_cmd_alloc.h"
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#include "panvk_cmd_buffer.h"
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#include "panvk_cmd_desc_state.h"
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@ -78,6 +80,9 @@ struct panvk_dispatch_info {
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uint32_t groupCountY;
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uint32_t groupCountZ;
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} direct;
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struct {
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uint64_t buffer_dev_addr;
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} indirect;
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};
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static void
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@ -123,6 +128,27 @@ calculate_task_axis_and_increment(const struct panvk_shader *shader,
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assert(*task_increment > 0);
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}
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static unsigned
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calculate_workgroups_per_task(const struct panvk_shader *shader,
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struct panvk_physical_device *phys_dev)
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{
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/* Each shader core can run N tasks and a total of M threads at any single
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* time, thus each task should ideally have no more than M/N threads. */
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unsigned max_threads_per_task = phys_dev->kmod.props.max_threads_per_core /
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phys_dev->kmod.props.max_tasks_per_core;
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/* To achieve the best utilization, we should aim for as many workgroups
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* per tasks as we can fit without exceeding the above thread limit */
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unsigned threads_per_wg =
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shader->local_size.x * shader->local_size.y * shader->local_size.z;
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assert(threads_per_wg > 0 &&
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threads_per_wg <= phys_dev->kmod.props.max_threads_per_wg);
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unsigned wg_per_task = DIV_ROUND_UP(max_threads_per_task, threads_per_wg);
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assert(wg_per_task > 0 && wg_per_task <= max_threads_per_task);
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return wg_per_task;
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}
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static void
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cmd_dispatch(struct panvk_cmd_buffer *cmdbuf, struct panvk_dispatch_info *info)
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{
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@ -149,22 +175,48 @@ cmd_dispatch(struct panvk_cmd_buffer *cmdbuf, struct panvk_dispatch_info *info)
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.wls.size = shader->info.wls_size,
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};
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unsigned core_id_range;
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unsigned core_count =
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panfrost_query_core_count(&phys_dev->kmod.props, &core_id_range);
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panfrost_query_core_count(&phys_dev->kmod.props, &core_id_range);
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bool indirect = info->indirect.buffer_dev_addr != 0;
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/* Only used for indirect dispatch */
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unsigned wg_per_task = 0;
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if (indirect)
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wg_per_task = calculate_workgroups_per_task(shader, phys_dev);
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if (tlsinfo.wls.size) {
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/* NOTE: If the instance count is lower than the number of workgroups
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* being dispatched, the HW will hold back workgroups until instances
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* can be reused. */
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/* NOTE: There is no benefit from allocating more instances than what
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* can concurrently be used by the HW */
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if (indirect) {
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/* Assume we utilize all shader cores to the max */
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tlsinfo.wls.instances = util_next_power_of_two(
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wg_per_task * phys_dev->kmod.props.max_tasks_per_core * core_count);
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} else {
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/* TODO: Similar to what we are doing for indirect this should change
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* to calculate the maximum number of workgroups we can execute
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* concurrently. */
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struct pan_compute_dim dim = {
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info->direct.groupCountX,
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info->direct.groupCountY,
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info->direct.groupCountZ,
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};
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tlsinfo.wls.instances = pan_wls_instances(&dim);
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}
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/* TODO: Clamp WLS instance to some maximum WLS budget. */
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struct pan_compute_dim dim = {
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info->direct.groupCountX,
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info->direct.groupCountY,
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info->direct.groupCountZ,
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};
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tlsinfo.wls.instances = pan_wls_instances(&dim);
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unsigned wls_total_size = pan_wls_adjust_size(tlsinfo.wls.size) *
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tlsinfo.wls.instances * core_id_range;
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/* TODO: Reuse WLS allocation for all dispatch commands in the command
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* buffer, similar to what we do for TLS in draw. As WLS size (and
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* instance count) might differ significantly between dispatch commands,
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* rather than track a single maximum size, we might want to consider
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* multiple allocations for different size buckets. */
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tlsinfo.wls.ptr =
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panvk_cmd_alloc_dev_mem(cmdbuf, tls, wls_total_size, 4096).gpu;
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if (!tlsinfo.wls.ptr)
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@ -188,9 +240,12 @@ cmd_dispatch(struct panvk_cmd_buffer *cmdbuf, struct panvk_dispatch_info *info)
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return;
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struct panvk_compute_sysvals *sysvals = &cmdbuf->state.compute.sysvals;
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sysvals->num_work_groups.x = info->direct.groupCountX;
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sysvals->num_work_groups.y = info->direct.groupCountY;
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sysvals->num_work_groups.z = info->direct.groupCountZ;
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/* If indirect, sysvals->num_work_groups will be written by the CS */
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if (!indirect) {
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sysvals->num_work_groups.x = info->direct.groupCountX;
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sysvals->num_work_groups.y = info->direct.groupCountY;
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sysvals->num_work_groups.z = info->direct.groupCountZ;
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}
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sysvals->local_group_size.x = shader->local_size.x;
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sysvals->local_group_size.y = shader->local_size.y;
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sysvals->local_group_size.z = shader->local_size.z;
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@ -248,20 +303,42 @@ cmd_dispatch(struct panvk_cmd_buffer *cmdbuf, struct panvk_dispatch_info *info)
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info->baseGroupY * shader->local_size.y);
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cs_move32_to(b, cs_sr_reg32(b, 36),
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info->baseGroupZ * shader->local_size.z);
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cs_move32_to(b, cs_sr_reg32(b, 37), info->direct.groupCountX);
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cs_move32_to(b, cs_sr_reg32(b, 38), info->direct.groupCountY);
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cs_move32_to(b, cs_sr_reg32(b, 39), info->direct.groupCountZ);
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if (indirect) {
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/* Load parameters from indirect buffer and update workgroup count
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* registers and sysvals */
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cs_move64_to(b, cs_scratch_reg64(b, 0),
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info->indirect.buffer_dev_addr);
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cs_load_to(b, cs_sr_reg_tuple(b, 37, 3), cs_scratch_reg64(b, 0),
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BITFIELD_MASK(3), 0);
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cs_move64_to(b, cs_scratch_reg64(b, 0),
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cmdbuf->state.compute.push_uniforms);
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cs_wait_slot(b, SB_ID(LS), false);
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cs_store(
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b, cs_sr_reg_tuple(b, 37, 3), cs_scratch_reg64(b, 0),
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BITFIELD_MASK(3),
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256 + offsetof(struct panvk_compute_sysvals, num_work_groups));
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cs_wait_slot(b, SB_ID(LS), false);
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} else {
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cs_move32_to(b, cs_sr_reg32(b, 37), info->direct.groupCountX);
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cs_move32_to(b, cs_sr_reg32(b, 38), info->direct.groupCountY);
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cs_move32_to(b, cs_sr_reg32(b, 39), info->direct.groupCountZ);
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}
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}
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panvk_per_arch(cs_pick_iter_sb)(cmdbuf, PANVK_SUBQUEUE_COMPUTE);
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cs_req_res(b, CS_COMPUTE_RES);
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unsigned task_axis = MALI_TASK_AXIS_X;
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unsigned task_increment = 0;
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calculate_task_axis_and_increment(shader, phys_dev, &task_axis,
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&task_increment);
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cs_run_compute(b, task_increment, task_axis, false,
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cs_shader_res_sel(0, 0, 0, 0));
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if (indirect)
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cs_run_compute_indirect(b, wg_per_task, false,
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cs_shader_res_sel(0, 0, 0, 0));
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else {
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unsigned task_axis = MALI_TASK_AXIS_X;
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unsigned task_increment = 0;
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calculate_task_axis_and_increment(shader, phys_dev, &task_axis,
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&task_increment);
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cs_run_compute(b, task_increment, task_axis, false,
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cs_shader_res_sel(0, 0, 0, 0));
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}
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cs_req_res(b, 0);
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struct cs_index sync_addr = cs_scratch_reg64(b, 0);
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@ -321,5 +398,11 @@ VKAPI_ATTR void VKAPI_CALL
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panvk_per_arch(CmdDispatchIndirect)(VkCommandBuffer commandBuffer,
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VkBuffer _buffer, VkDeviceSize offset)
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{
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panvk_stub();
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VK_FROM_HANDLE(panvk_cmd_buffer, cmdbuf, commandBuffer);
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VK_FROM_HANDLE(panvk_buffer, buffer, _buffer);
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uint64_t buffer_gpu = panvk_buffer_gpu_ptr(buffer, offset);
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struct panvk_dispatch_info info = {
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.indirect.buffer_dev_addr = buffer_gpu,
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};
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cmd_dispatch(cmdbuf, &info);
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}
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