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r600/sfn: allow source mods for per source with multi-slot ops
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23702>
This commit is contained in:
parent
0ff3c4bef2
commit
2f6ded1098
8 changed files with 159 additions and 76 deletions
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@ -242,13 +242,8 @@ enum EAluOp {
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};
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enum AluModifiers {
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alu_src0_neg,
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alu_src0_abs,
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alu_src0_rel,
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alu_src1_neg,
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alu_src1_abs,
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alu_src1_rel,
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alu_src2_neg,
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alu_src2_rel,
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alu_dst_clamp,
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alu_dst_rel,
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@ -265,6 +260,7 @@ enum AluModifiers {
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alu_lds_address,
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alu_no_schedule_bias,
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alu_64bit_op,
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alu_flag_none,
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alu_flag_count
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};
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@ -338,9 +338,9 @@ AssamblerVisitor::emit_alu_op(const AluInstr& ai)
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for (unsigned i = 0; i < ai.n_sources(); ++i) {
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buffer_offset = copy_src(alu.src[i], ai.src(i));
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alu.src[i].neg = ai.has_alu_flag(AluInstr::src_neg_flags[i]);
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alu.src[i].neg = ai.has_source_mod(i, AluInstr::mod_neg);
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if (!alu.is_op3)
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alu.src[i].abs = ai.has_alu_flag(AluInstr::src_abs_flags[i]);
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alu.src[i].abs = ai.has_source_mod(i, AluInstr::mod_abs);
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if (buffer_offset && kcache_index_mode == bim_none) {
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auto idx_reg = buffer_offset->as_register();
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@ -217,9 +217,6 @@ const std::map<AluBankSwizzle, std::string> AluInstr::bank_swizzle_map = {
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{alu_vec_210, "VEC_210"}
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};
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const AluModifiers AluInstr::src_abs_flags[2] = {alu_src0_abs, alu_src1_abs};
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const AluModifiers AluInstr::src_neg_flags[3] = {
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alu_src0_neg, alu_src1_neg, alu_src2_neg};
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const AluModifiers AluInstr::src_rel_flags[3] = {
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alu_src0_rel, alu_src1_rel, alu_src2_rel};
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@ -275,6 +272,7 @@ AluInstr::do_print(std::ostream& os) const
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const int n_source_per_slot =
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has_alu_flag(alu_is_lds) ? m_src.size() : alu_ops.at(m_opcode).nsrc;
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for (int s = 0; s < m_alu_slots; ++s) {
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if (s > 0)
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@ -284,12 +282,12 @@ AluInstr::do_print(std::ostream& os) const
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int pflags = 0;
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if (i)
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os << ' ';
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if (has_alu_flag(src_neg_flags[k]))
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if (has_source_mod(i, mod_neg))
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pflags |= ValuePrintFlags::has_neg;
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if (has_alu_flag(src_rel_flags[k]))
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pflags |= ValuePrintFlags::is_rel;
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if (i < 2)
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if (has_alu_flag(src_abs_flags[k]))
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if (n_source_per_slot <= 2)
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if (has_source_mod(i, mod_abs))
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pflags |= ValuePrintFlags::has_abs;
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if (pflags & ValuePrintFlags::has_neg)
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@ -434,7 +432,7 @@ AluInstr::can_copy_propagate() const
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if (m_opcode != op1_mov)
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return false;
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if (has_alu_flag(alu_src0_abs) || has_alu_flag(alu_src0_neg) ||
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if (has_source_mod(0, mod_abs) || has_source_mod(0, mod_neg) ||
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has_alu_flag(alu_dst_clamp))
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return false;
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@ -834,16 +832,16 @@ AluInstr::split(ValueFactory& vf)
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instr->set_blockid(block_id(), index());
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if (s == 0 || !m_alu_flags.test(alu_64bit_op)) {
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if (has_alu_flag(alu_src0_neg))
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instr->set_alu_flag(alu_src0_neg);
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if (has_alu_flag(alu_src1_neg))
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instr->set_alu_flag(alu_src1_neg);
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if (has_alu_flag(alu_src2_neg))
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instr->set_alu_flag(alu_src2_neg);
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if (has_alu_flag(alu_src0_abs))
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instr->set_alu_flag(alu_src0_abs);
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if (has_alu_flag(alu_src1_abs))
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instr->set_alu_flag(alu_src1_abs);
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if (has_source_mod(nsrc * k + 0, mod_neg))
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instr->set_source_mod(0, mod_neg);
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if (has_source_mod(nsrc * k + 1, mod_neg))
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instr->set_source_mod(1, mod_neg);
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if (has_source_mod(nsrc * k + 2, mod_neg))
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instr->set_source_mod(2, mod_neg);
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if (has_source_mod(nsrc * k + 0, mod_abs))
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instr->set_source_mod(0, mod_abs);
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if (has_source_mod(nsrc * k + 1, mod_abs))
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instr->set_source_mod(1, mod_abs);
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}
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if (has_alu_flag(alu_dst_clamp))
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instr->set_alu_flag(alu_dst_clamp);
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@ -1077,7 +1075,7 @@ AluInstr::from_string(istream& is, ValueFactory& value_factory, AluGroup *group,
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int slots = 0;
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uint32_t src_mods = 0;
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SrcValues sources;
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do {
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++t;
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@ -1085,19 +1083,13 @@ AluInstr::from_string(istream& is, ValueFactory& value_factory, AluGroup *group,
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string srcstr = *t++;
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if (srcstr[0] == '-') {
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if (!slots)
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flags.insert(AluInstr::src_neg_flags[i]);
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else
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assert(flags.find(AluInstr::src_neg_flags[i]) != flags.end());
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src_mods |= AluInstr::mod_neg << (2 * sources.size());
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srcstr = srcstr.substr(1);
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}
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if (srcstr[0] == '|') {
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assert(srcstr[srcstr.length() - 1] == '|');
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if (!slots)
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flags.insert(AluInstr::src_abs_flags[i]);
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else
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assert(flags.find(AluInstr::src_abs_flags[i]) != flags.end());
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src_mods |= AluInstr::mod_abs << (2 * sources.size());
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srcstr = srcstr.substr(1, srcstr.length() - 2);
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}
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@ -1197,6 +1189,7 @@ AluInstr::from_string(istream& is, ValueFactory& value_factory, AluGroup *group,
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else
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retval = new AluInstr(op_descr.alu_opcode, dest, sources, flags, slots);
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retval->m_source_modifiers = src_mods;
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retval->set_bank_swizzle(bank_swizzle);
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retval->set_cf_type(cf);
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if (group) {
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@ -1303,14 +1296,23 @@ bool AluInstr::is_kill() const
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}
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}
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enum AluMods {
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mod_none,
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mod_src0_abs,
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mod_src0_neg,
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mod_dest_clamp,
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};
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static bool
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emit_alu_b2x(const nir_alu_instr& alu, AluInlineConstants mask, Shader& shader);
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static bool
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emit_alu_op1(const nir_alu_instr& alu,
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EAluOp opcode,
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Shader& shader,
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const AluOpFlags& flags = 0);
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AluMods mod = mod_none);
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static bool
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emit_alu_op1_64bit(const nir_alu_instr& alu,
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EAluOp opcode,
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@ -1658,7 +1660,7 @@ AluInstr::from_nir(nir_alu_instr *alu, Shader& shader)
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return emit_alu_op3(*alu, op3_cnde_int, shader, {0, 2, 1});
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case nir_op_fabs:
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return emit_alu_op1(*alu, op1_mov, shader, {1 << alu_src0_abs});
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return emit_alu_op1(*alu, op1_mov, shader, mod_src0_abs);
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case nir_op_fadd:
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return emit_alu_op2(*alu, op2_add, shader);
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case nir_op_fceil:
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@ -1716,7 +1718,7 @@ AluInstr::from_nir(nir_alu_instr *alu, Shader& shader)
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return emit_alu_op2(*alu, op2_mul, shader);
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case nir_op_fneg:
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return emit_alu_op1(*alu, op1_mov, shader, {1 << alu_src0_neg});
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return emit_alu_op1(*alu, op1_mov, shader, mod_src0_neg);
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case nir_op_fneu32:
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return emit_alu_op2(*alu, op2_setne_dx10, shader);
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case nir_op_fneu:
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@ -1725,7 +1727,7 @@ AluInstr::from_nir(nir_alu_instr *alu, Shader& shader)
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case nir_op_fround_even:
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return emit_alu_op1(*alu, op1_rndne, shader);
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case nir_op_fsat:
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return emit_alu_op1(*alu, op1_mov, shader, {1 << alu_dst_clamp});
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return emit_alu_op1(*alu, op1_mov, shader, mod_dest_clamp);
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case nir_op_fsub:
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return emit_alu_op2(*alu, op2_add, shader, op2_opt_neg_src1);
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case nir_op_ftrunc:
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@ -1939,7 +1941,7 @@ emit_alu_neg(const nir_alu_instr& alu, Shader& shader)
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{alu_write});
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group->add_instruction(ir);
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}
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ir->set_alu_flag(alu_src0_neg);
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ir->set_source_mod(0, AluInstr::mod_neg);
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}
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if (ir)
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ir->set_alu_flag(alu_last_instr);
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@ -1963,7 +1965,7 @@ emit_alu_abs64(const nir_alu_instr& alu, Shader& shader)
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value_factory.dest(alu.dest, 1, pin_chan),
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value_factory.src64(alu.src[0], 0, 1),
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AluInstr::last_write);
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ir->set_alu_flag(alu_src0_abs);
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ir->set_source_mod(0, AluInstr::mod_abs);
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shader.emit_instruction(ir);
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return true;
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}
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@ -2066,6 +2068,8 @@ emit_alu_op1_64bit_trans(const nir_alu_instr& alu, EAluOp opcode, Shader& shader
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value_factory.src64(alu.src[0], 0, 0),
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i < 2 ? AluInstr::write : AluInstr::empty);
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if (opcode == op1_sqrt_64)
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ir->set_source_mod(0, AluInstr::mod_abs);
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group->add_instruction(ir);
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}
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if (ir)
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@ -2262,7 +2266,7 @@ static bool
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emit_alu_op1(const nir_alu_instr& alu,
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EAluOp opcode,
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Shader& shader,
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const AluOpFlags& flags)
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AluMods mod)
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{
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auto& value_factory = shader.value_factory();
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@ -2271,13 +2275,20 @@ emit_alu_op1(const nir_alu_instr& alu,
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for (unsigned i = 0; i < nir_dest_num_components(alu.dest.dest); ++i) {
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if (alu.dest.write_mask & (1 << i)) {
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ir = new AluInstr(opcode,
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value_factory.dest(alu.dest, i, pin),
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value_factory.src(alu.src[0], i),
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{alu_write});
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if (flags.test(alu_dst_clamp) || alu.dest.saturate)
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switch (mod) {
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case mod_src0_abs:
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ir->set_source_mod(0, AluInstr::mod_abs); break;
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case mod_src0_neg:
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ir->set_source_mod(0, AluInstr::mod_neg); break;
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case mod_dest_clamp:
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ir->set_alu_flag(alu_dst_clamp);
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default:;
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}
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shader.emit_instruction(ir);
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}
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}
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@ -2315,7 +2326,7 @@ emit_alu_op2(const nir_alu_instr& alu,
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value_factory.src(*src1, i),
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{alu_write});
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if (src1_negate)
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ir->set_alu_flag(alu_src1_neg);
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ir->set_source_mod(1, AluInstr::mod_neg);
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shader.emit_instruction(ir);
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}
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}
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@ -2426,8 +2437,12 @@ emit_any_all_fcomp(const nir_alu_instr& alu, EAluOp op, int nc, bool all, Shader
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ir = new AluInstr(op1_max4, max_val, s, AluInstr::last_write, 4);
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if (all)
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ir->set_alu_flag(alu_src0_neg);
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if (all) {
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ir->set_source_mod(0, AluInstr::mod_neg);
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ir->set_source_mod(1, AluInstr::mod_neg);
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ir->set_source_mod(2, AluInstr::mod_neg);
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ir->set_source_mod(3, AluInstr::mod_neg);
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}
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shader.emit_instruction(ir);
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@ -2442,7 +2457,7 @@ emit_any_all_fcomp(const nir_alu_instr& alu, EAluOp op, int nc, bool all, Shader
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value_factory.inline_const(ALU_SRC_1, 0),
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AluInstr::last_write);
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if (all)
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ir->set_alu_flag(alu_src1_neg);
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ir->set_source_mod(1, AluInstr::mod_neg);
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shader.emit_instruction(ir);
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return true;
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@ -49,6 +49,13 @@ public:
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op2_opt_abs_src0 = 1 << 2
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};
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enum SourceMod {
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mod_none = 0,
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mod_abs = 1,
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mod_neg = 2
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};
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static constexpr const AluBankSwizzle bs[6] = {
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alu_vec_012, alu_vec_021, alu_vec_120, alu_vec_102, alu_vec_201, alu_vec_210};
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@ -192,6 +199,16 @@ public:
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void inc_ar_uses() { ++m_num_ar_uses;}
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auto num_ar_uses() const {return m_num_ar_uses;}
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void set_source_mod(int src, SourceMod mod) {
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m_source_modifiers |= mod << (2 * src);
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}
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auto has_source_mod(int src, SourceMod mod) const {
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return (m_source_modifiers & (mod << (2 * src))) != 0;
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}
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void reset_source_mod(int src, SourceMod mod) {
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m_source_modifiers &= ~(mod << (2 * src));
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}
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private:
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friend class AluGroup;
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@ -228,6 +245,7 @@ private:
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AluGroup *m_parent_group{nullptr};
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unsigned m_allowed_dest_mask{0xf};
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unsigned m_num_ar_uses{0};
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uint32_t m_source_modifiers{0};
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};
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class AluInstrVisitor : public InstrVisitor {
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@ -478,8 +478,8 @@ CopyPropFwdVisitor::propagate_to(RegisterVec4& value, Instr *instr)
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return;
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if ((parents[i]->opcode() != op1_mov) ||
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parents[i]->has_alu_flag(alu_src0_neg) ||
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parents[i]->has_alu_flag(alu_src0_abs) ||
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parents[i]->has_source_mod(0, AluInstr::mod_neg) ||
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parents[i]->has_source_mod(0, AluInstr::mod_abs) ||
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parents[i]->has_alu_flag(alu_dst_clamp) ||
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parents[i]->has_alu_flag(alu_src0_rel))
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return;
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@ -854,7 +854,8 @@ ReplaceConstSource::visit(AluInstr *alu)
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if (alu->opcode() != op1_mov)
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return;
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if (alu->has_alu_flag(alu_src0_abs) || alu->has_alu_flag(alu_src0_neg))
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if (alu->has_source_mod(0, AluInstr::mod_abs) ||
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alu->has_source_mod(0, AluInstr::mod_neg))
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return;
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auto src = alu->psrc(0);
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@ -263,16 +263,14 @@ ReplacePredicate::visit(AluInstr *alu)
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m_pred->set_op(new_op);
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m_pred->set_sources(alu->sources());
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if (alu->has_alu_flag(alu_src0_abs))
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m_pred->set_alu_flag(alu_src0_abs);
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if (alu->has_alu_flag(alu_src1_abs))
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m_pred->set_alu_flag(alu_src1_abs);
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std::array<AluInstr::SourceMod, 2> mods = { AluInstr::mod_abs, AluInstr::mod_neg };
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if (alu->has_alu_flag(alu_src0_neg))
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m_pred->set_alu_flag(alu_src0_neg);
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if (alu->has_alu_flag(alu_src1_neg))
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m_pred->set_alu_flag(alu_src1_neg);
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for (int i = 0; i < 2; ++i) {
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for (auto m : mods) {
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if (alu->has_source_mod(i, m))
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m_pred->set_source_mod(i, m);
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}
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}
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success = true;
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}
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@ -44,8 +44,8 @@ TEST_F(InstrTest, test_alu_uni_op_mov)
|
|||
EXPECT_FALSE(alu.has_alu_flag(alu_last_instr));
|
||||
EXPECT_FALSE(alu.end_group());
|
||||
EXPECT_FALSE(alu.has_alu_flag(alu_op3));
|
||||
EXPECT_FALSE(alu.has_alu_flag(alu_src0_abs));
|
||||
EXPECT_FALSE(alu.has_alu_flag(alu_src0_neg));
|
||||
EXPECT_FALSE(alu.has_source_mod(0, AluInstr::mod_abs));
|
||||
EXPECT_FALSE(alu.has_source_mod(0, AluInstr::mod_neg));
|
||||
|
||||
EXPECT_EQ(alu.opcode(), op1_mov);
|
||||
|
||||
|
|
@ -69,11 +69,11 @@ TEST_F(InstrTest, test_alu_uni_op_mov)
|
|||
EXPECT_FALSE(alu.psrc(1));
|
||||
EXPECT_FALSE(alu.psrc(2));
|
||||
|
||||
alu.set_alu_flag(alu_src0_abs);
|
||||
EXPECT_TRUE(alu.has_alu_flag(alu_src0_abs));
|
||||
alu.set_source_mod(0, AluInstr::mod_abs);;
|
||||
EXPECT_TRUE(alu.has_source_mod(0, AluInstr::mod_abs));
|
||||
|
||||
alu.set_alu_flag(alu_src0_neg);
|
||||
EXPECT_TRUE(alu.has_alu_flag(alu_src0_neg));
|
||||
alu.set_source_mod(0, AluInstr::mod_neg);
|
||||
EXPECT_TRUE(alu.has_source_mod(0, AluInstr::mod_neg));
|
||||
}
|
||||
|
||||
TEST_F(InstrTest, test_alu_op2)
|
||||
|
|
@ -89,9 +89,9 @@ TEST_F(InstrTest, test_alu_op2)
|
|||
EXPECT_TRUE(alu.has_alu_flag(alu_last_instr));
|
||||
EXPECT_FALSE(alu.has_alu_flag(alu_op3));
|
||||
|
||||
EXPECT_FALSE(alu.has_alu_flag(alu_src0_neg));
|
||||
EXPECT_FALSE(alu.has_alu_flag(alu_src1_neg));
|
||||
EXPECT_FALSE(alu.has_alu_flag(alu_src2_neg));
|
||||
EXPECT_FALSE(alu.has_source_mod(0, AluInstr::mod_neg));
|
||||
EXPECT_FALSE(alu.has_source_mod(1, AluInstr::mod_neg));
|
||||
EXPECT_FALSE(alu.has_source_mod(2, AluInstr::mod_neg));
|
||||
|
||||
EXPECT_FALSE(alu.has_alu_flag(alu_src0_rel));
|
||||
EXPECT_FALSE(alu.has_alu_flag(alu_src1_rel));
|
||||
|
|
|
|||
|
|
@ -72,7 +72,8 @@ TEST_F(TestInstrFromString, test_alu_mov_neg)
|
|||
AluInstr expect(op1_mov,
|
||||
new Register(2000, 1, pin_none),
|
||||
new Register(1999, 0, pin_none),
|
||||
{alu_write, alu_last_instr, alu_src0_neg});
|
||||
{alu_write, alu_last_instr});
|
||||
expect.set_source_mod(0, AluInstr::mod_neg);
|
||||
|
||||
check("ALU MOV R2000.y : -R1999.x {WL}", expect);
|
||||
}
|
||||
|
|
@ -83,7 +84,8 @@ TEST_F(TestInstrFromString, test_alu_mov_abs)
|
|||
AluInstr expect(op1_mov,
|
||||
new Register(2000, 1, pin_none),
|
||||
new Register(1999, 0, pin_none),
|
||||
{alu_write, alu_last_instr, alu_src0_abs});
|
||||
{alu_write, alu_last_instr});
|
||||
expect.set_source_mod(0, AluInstr::mod_abs);
|
||||
|
||||
check("ALU MOV R2000.y : |R1999.x| {WL}", expect);
|
||||
}
|
||||
|
|
@ -94,7 +96,10 @@ TEST_F(TestInstrFromString, test_alu_mov_neg_abs)
|
|||
AluInstr expect(op1_mov,
|
||||
new Register(2000, 1, pin_none),
|
||||
new Register(1999, 0, pin_none),
|
||||
{alu_write, alu_src0_neg, alu_src0_abs});
|
||||
{alu_write});
|
||||
expect.set_source_mod(0, AluInstr::mod_abs);
|
||||
expect.set_source_mod(0, AluInstr::mod_neg);
|
||||
|
||||
check("ALU MOV R2000.y : -|R1999.x| {W}", expect);
|
||||
}
|
||||
|
||||
|
|
@ -131,7 +136,9 @@ TEST_F(TestInstrFromString, test_alu_add_neg2)
|
|||
new Register(2000, 1, pin_none),
|
||||
new Register(1999, 3, pin_none),
|
||||
new Register(1998, 2, pin_none),
|
||||
{alu_last_instr, alu_src1_neg});
|
||||
{alu_last_instr});
|
||||
expect.set_source_mod(1, AluInstr::mod_neg);
|
||||
|
||||
check("ALU ADD __.y : R1999.w -R1998.z {L}", expect);
|
||||
}
|
||||
|
||||
|
|
@ -143,7 +150,8 @@ TEST_F(TestInstrFromString, test_alu_sete_update_pref)
|
|||
new Register(2000, 1, pin_none),
|
||||
new Register(1999, 3, pin_none),
|
||||
new Register(1998, 2, pin_none),
|
||||
{alu_last_instr, alu_src1_neg, alu_update_pred});
|
||||
{alu_last_instr, alu_update_pred});
|
||||
expect.set_source_mod(1, AluInstr::mod_neg);
|
||||
check("ALU SETE __.y : R1999.w -R1998.z {LP}", expect);
|
||||
}
|
||||
|
||||
|
|
@ -167,7 +175,8 @@ TEST_F(TestInstrFromString, test_alu_setne_update_exec)
|
|||
new Register(2000, 1, pin_none),
|
||||
new Register(1999, 3, pin_none),
|
||||
new Register(1998, 2, pin_none),
|
||||
{alu_last_instr, alu_src1_neg, alu_update_exec});
|
||||
{alu_last_instr, alu_update_exec});
|
||||
expect.set_source_mod(1, AluInstr::mod_neg);
|
||||
check("ALU SETNE __.y : R1999.w -R1998.z {LE}", expect);
|
||||
}
|
||||
|
||||
|
|
@ -179,7 +188,8 @@ TEST_F(TestInstrFromString, test_alu_add_abs2)
|
|||
new Register(2000, 1, pin_none),
|
||||
new Register(1999, 3, pin_none),
|
||||
new Register(1998, 2, pin_none),
|
||||
{alu_write, alu_last_instr, alu_src1_abs});
|
||||
{alu_write, alu_last_instr});
|
||||
expect.set_source_mod(1, AluInstr::mod_abs);
|
||||
check("ALU ADD R2000.y : R1999.w |R1998.z| {WL}", expect);
|
||||
}
|
||||
|
||||
|
|
@ -191,7 +201,10 @@ TEST_F(TestInstrFromString, test_alu_add_abs2_neg2)
|
|||
new Register(2000, 1, pin_none),
|
||||
new Register(1999, 3, pin_none),
|
||||
new Register(1998, 2, pin_none),
|
||||
{alu_write, alu_last_instr, alu_src1_abs, alu_src1_neg});
|
||||
{alu_write, alu_last_instr});
|
||||
expect.set_source_mod(1, AluInstr::mod_neg);
|
||||
expect.set_source_mod(1, AluInstr::mod_abs);
|
||||
|
||||
check("ALU ADD R2000.y : R1999.w -|R1998.z| {WL}", expect);
|
||||
}
|
||||
|
||||
|
|
@ -219,7 +232,7 @@ TEST_F(TestInstrFromString, test_alu_muladd_neg3)
|
|||
new Register(1999, 3, pin_none),
|
||||
new Register(1998, 2, pin_none),
|
||||
new Register(2000, 1, pin_none),
|
||||
{alu_last_instr, alu_src2_neg});
|
||||
{alu_last_instr});
|
||||
check("ALU MULADD_IEEE __.y : R1999.w R1998.z -R2000.y {L}", expect);
|
||||
}
|
||||
|
||||
|
|
@ -268,6 +281,48 @@ TEST_F(TestInstrFromString, test_alu_dot4_ieee)
|
|||
check(init, expect);
|
||||
}
|
||||
|
||||
TEST_F(TestInstrFromString, test_alu_dot4_with_mods)
|
||||
{
|
||||
add_dest_from_string("R199.x");
|
||||
add_dest_from_string("R199.y");
|
||||
add_dest_from_string("R199.z");
|
||||
add_dest_from_string("R199.w");
|
||||
add_dest_from_string("R198.x");
|
||||
add_dest_from_string("R198.y");
|
||||
add_dest_from_string("R198.z");
|
||||
add_dest_from_string("R198.w");
|
||||
auto init = std::string("ALU DOT4_IEEE R2000.y : -R199.x R198.w + R199.y |R198.z| + "
|
||||
"-|R199.z| R198.y + -R199.w R198.x {WL}");
|
||||
|
||||
AluInstr expect(op2_dot4_ieee,
|
||||
new Register(2000, 1, pin_none),
|
||||
{new Register(199, 0, pin_none),
|
||||
new Register(198, 3, pin_none),
|
||||
new Register(199, 1, pin_none),
|
||||
new Register(198, 2, pin_none),
|
||||
new Register(199, 2, pin_none),
|
||||
new Register(198, 1, pin_none),
|
||||
new Register(199, 3, pin_none),
|
||||
new Register(198, 0, pin_none)},
|
||||
{alu_write, alu_last_instr},
|
||||
4);
|
||||
|
||||
expect.set_source_mod(0, AluInstr::mod_neg);
|
||||
expect.set_source_mod(3, AluInstr::mod_abs);
|
||||
expect.set_source_mod(4, AluInstr::mod_neg);
|
||||
expect.set_source_mod(4, AluInstr::mod_abs);
|
||||
expect.set_source_mod(7, AluInstr::mod_neg);
|
||||
|
||||
check(init, expect);
|
||||
auto instr = from_string(init);
|
||||
|
||||
std::ostringstream print_str;
|
||||
print_str << *instr;
|
||||
EXPECT_EQ(print_str.str(), init);
|
||||
|
||||
}
|
||||
|
||||
|
||||
TEST_F(TestInstrFromString, test_alu_mov_cf)
|
||||
{
|
||||
add_dest_from_string("R1999.x");
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue