diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build index 3d5bc764630..4989e94675b 100644 --- a/src/compiler/nir/meson.build +++ b/src/compiler/nir/meson.build @@ -124,7 +124,7 @@ else 'nir_gather_tcs_info.c', 'nir_gather_types.c', 'nir_gather_xfb_info.c', - 'nir_group_loads.c', + 'nir_opt_group_loads.c', 'nir_gs_count_vertices.c', 'nir_inline_uniforms.c', 'nir_instr_set.c', diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index a30d7ea89d1..940bb6707ea 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -4885,8 +4885,8 @@ typedef enum { nir_group_same_resource_only, } nir_load_grouping; -bool nir_group_loads(nir_shader *shader, nir_load_grouping grouping, - unsigned max_distance); +bool nir_opt_group_loads(nir_shader *shader, nir_load_grouping grouping, + unsigned max_distance); bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes); bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes); diff --git a/src/compiler/nir/nir_group_loads.c b/src/compiler/nir/nir_opt_group_loads.c similarity index 99% rename from src/compiler/nir/nir_group_loads.c rename to src/compiler/nir/nir_opt_group_loads.c index adafbe5a927..0e79ecaf25a 100644 --- a/src/compiler/nir/nir_group_loads.c +++ b/src/compiler/nir/nir_opt_group_loads.c @@ -454,8 +454,8 @@ process_block(nir_block *block, nir_load_grouping grouping, * in a group. */ bool -nir_group_loads(nir_shader *shader, nir_load_grouping grouping, - unsigned max_distance) +nir_opt_group_loads(nir_shader *shader, nir_load_grouping grouping, + unsigned max_distance) { /* Temporary space for instruction info. */ struct util_dynarray infos_scratch; diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index ed7b0c0c7ec..05aab8c98fd 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -222,7 +222,7 @@ i915_optimize_nir(struct nir_shader *s) /* Group texture loads together to try to avoid hitting the * texture indirection phase limit. */ - NIR_PASS(_, s, nir_group_loads, nir_group_all, ~0); + NIR_PASS(_, s, nir_opt_group_loads, nir_group_all, ~0); } static void diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index c4b21e4c8d4..9d833e6dde7 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1730,7 +1730,7 @@ static void run_late_optimization_and_lowering_passes(struct si_nir_shader_ctx * /* This helps LLVM form VMEM clauses and thus get more GPU cache hits. * 200 is tuned for Viewperf. It should be done last. */ - NIR_PASS(_, nir, nir_group_loads, nir_group_same_resource_only, 200); + NIR_PASS(_, nir, nir_opt_group_loads, nir_group_same_resource_only, 200); } static void get_input_nir(struct si_shader *shader, struct si_nir_shader_ctx *ctx)