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etnaviv: fix tile status interaction with write mappings
This fixes a longstanding bug in the interaction between TS and a write
mapping. The write does not update TS regardless of the way the update
is done. Update via etna_copy_resource would just set the target ts_valid
to false without actually writing back any dirty TS to the resource.
Writes via the CPU would update the resource, but keep ts_valid at true
even if the tile status may now not match the actually written tiles of
the resource anymore.
Fix this by writing back a dirty TS to the target resource if needed
before updating the level with the write data. Always invalidate TS,
even when the update is done by the CPU.
Cc: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19846>
(cherry picked from commit 0fb813526e)
This commit is contained in:
parent
39e9ea1419
commit
2e6fd24b7c
3 changed files with 11 additions and 2 deletions
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@ -2335,7 +2335,7 @@
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"description": "etnaviv: fix tile status interaction with write mappings",
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"description": "etnaviv: fix tile status interaction with write mappings",
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"nominated": true,
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"nominated": true,
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"nomination_type": 0,
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"nomination_type": 0,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"main_sha": null,
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"because_sha": null
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"because_sha": null
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},
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},
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@ -230,6 +230,7 @@ etna_copy_resource_box(struct pipe_context *pctx, struct pipe_resource *dst,
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{
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{
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assert(src->format == dst->format);
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assert(src->format == dst->format);
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assert(src->array_size == dst->array_size);
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assert(src->array_size == dst->array_size);
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assert(!etna_resource_needs_flush(etna_resource(dst)));
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struct pipe_blit_info blit = {};
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struct pipe_blit_info blit = {};
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blit.mask = util_format_get_mask(dst->format);
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blit.mask = util_format_get_mask(dst->format);
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@ -124,10 +124,17 @@ etna_transfer_unmap(struct pipe_context *pctx, struct pipe_transfer *ptrans)
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etna_bo_cpu_fini(etna_resource(trans->rsc)->bo);
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etna_bo_cpu_fini(etna_resource(trans->rsc)->bo);
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if (ptrans->usage & PIPE_MAP_WRITE) {
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if (ptrans->usage & PIPE_MAP_WRITE) {
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if (etna_resource_needs_flush(rsc)) {
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if (ptrans->usage & PIPE_MAP_DISCARD_WHOLE_RESOURCE)
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rsc->flush_seqno = rsc->seqno;
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else
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etna_copy_resource(pctx, &rsc->base, &rsc->base, 0, rsc->base.last_level);
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}
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if (trans->rsc) {
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if (trans->rsc) {
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/* We have a temporary resource due to either tile status or
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/* We have a temporary resource due to either tile status or
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* tiling format. Write back the updated buffer contents.
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* tiling format. Write back the updated buffer contents.
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* FIXME: we need to invalidate the tile status. */
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*/
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etna_copy_resource_box(pctx, ptrans->resource, trans->rsc, ptrans->level, &ptrans->box);
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etna_copy_resource_box(pctx, ptrans->resource, trans->rsc, ptrans->level, &ptrans->box);
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} else if (trans->staging) {
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} else if (trans->staging) {
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/* map buffer object */
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/* map buffer object */
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@ -156,6 +163,7 @@ etna_transfer_unmap(struct pipe_context *pctx, struct pipe_transfer *ptrans)
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FREE(trans->staging);
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FREE(trans->staging);
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}
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}
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rsc->levels[ptrans->level].ts_valid = false;
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rsc->seqno++;
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rsc->seqno++;
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if (rsc->base.bind & PIPE_BIND_SAMPLER_VIEW) {
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if (rsc->base.bind & PIPE_BIND_SAMPLER_VIEW) {
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