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freedreno: Add gmem_reason_mask

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Older gens had more restrictions about GMEM bypass which do not apply to
newer generations.  Add a bitmask so we know which bits are not a hard
requirement for using GMEM.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
This commit is contained in:
Rob Clark 2021-03-15 12:27:33 -07:00 • committed by Marge Bot
parent 1c24e9500b
commit 2e529ed7ef
3 changed files with 27 additions and 9 deletions
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9
src/gallium/drivers/freedreno/a6xx/fd6_screen.c
View file

@ -131,7 +131,16 @@ void
fd6_screen_init(struct pipe_screen *pscreen)
{
struct fd_screen *screen = fd_screen(pscreen);
screen->max_rts = A6XX_MAX_RENDER_TARGETS;
/* Currently only FB_READ forces GMEM path, mostly because we'd have to
* deal with cmdstream patching otherwise..
*/
screen->gmem_reason_mask = FD_GMEM_CLEARS_DEPTH_STENCIL |
FD_GMEM_DEPTH_ENABLED | FD_GMEM_STENCIL_ENABLED |
FD_GMEM_BLEND_ENABLED | FD_GMEM_LOGICOP_ENABLED;
pscreen->context_create = fd6_context_create;
pscreen->is_format_supported = fd6_screen_is_format_supported;

10
src/gallium/drivers/freedreno/freedreno_batch.h
View file

@ -110,15 +110,7 @@ struct fd_batch {
* color_logic_Op (since those functions are disabled when by-
* passing GMEM.
*/
enum {
FD_GMEM_CLEARS_DEPTH_STENCIL = 0x01,
FD_GMEM_DEPTH_ENABLED = 0x02,
FD_GMEM_STENCIL_ENABLED = 0x04,
FD_GMEM_BLEND_ENABLED = 0x10,
FD_GMEM_LOGICOP_ENABLED = 0x20,
FD_GMEM_FB_READ = 0x40,
} gmem_reason;
enum fd_gmem_reason gmem_reason;
/* At submit time, once we've decided that this batch will use GMEM
* rendering, the appropriate gmem state is looked up:

17
src/gallium/drivers/freedreno/freedreno_screen.h
View file

@ -46,6 +46,18 @@
struct fd_bo;
/* Potential reasons for needing to skip bypass path and use GMEM, the
* generation backend can override this with screen->gmem_reason_mask
*/
enum fd_gmem_reason {
FD_GMEM_CLEARS_DEPTH_STENCIL = BIT(0),
FD_GMEM_DEPTH_ENABLED = BIT(1),
FD_GMEM_STENCIL_ENABLED = BIT(2),
FD_GMEM_BLEND_ENABLED = BIT(3),
FD_GMEM_LOGICOP_ENABLED = BIT(4),
FD_GMEM_FB_READ = BIT(5),
};
struct fd_screen {
struct pipe_screen base;
@ -80,6 +92,11 @@ struct fd_screen {
struct freedreno_dev_info info;
/* Bitmask of gmem_reasons that do not force GMEM path over bypass
* for current generation.
*/
enum fd_gmem_reason gmem_reason_mask;
unsigned num_perfcntr_groups;
const struct fd_perfcntr_group *perfcntr_groups;